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authorLinus Torvalds <torvalds@linux-foundation.org>2009-09-18 12:19:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-18 12:19:26 -0400
commit73c583e4e2dd0fbbf2fafe0cc57ff75314fe72df (patch)
treeb2fb05a6d199c0f6653fff84b67159af8f228760 /arch/arm
parent5ce00289875a853280985aee671258795b77e089 (diff)
parent1f685b36dbf27db55072fb738aac57aaf37d2c71 (diff)
Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (47 commits) OMAP clock: use debugfs_remove_recursive() for rewinding OMAP2/3/4 core: create omap_device layer OMAP: omap_hwmod: call omap_hwmod init at boot; create interconnects OMAP2/3/4: create omap_hwmod layer OMAP2/3 board-*.c files: read bootloader configuration earlier OMAP2/3/4 PRCM: add module IDLEST wait code OMAP2/3 PM: create the OMAP PM interface and add a default OMAP PM no-op layer OMAP3 clock: remove superfluous calls to omap2_init_clk_clkdm OMAP clock: associate MPU clocks with the mpu_clkdm OMAP3 clock: Fixed processing of bootarg 'mpurate' OMAP: SDRC: Add several new register definitions OMAP: powerdomain: Fix overflow when doing powerdomain deps lookups. OMAP: PM: Added suspend target state control to debugfs for OMAP3 OMAP: PM debug: Add PRCM register dump support OMAP: PM debug: make powerdomains use PM-debug counters OMAP: PM: Add pm-debug counters OMAP: PM: Add closures to clkdm_for_each and pwrdm_for_each. OMAP: PM: Hook into PM counters OMAP: PM counter infrastructure. OMAP3: PM: fix lockdep warning caused by omap3_pm_init ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/configs/n8x0_defconfig1104
-rw-r--r--arch/arm/configs/omap3_beagle_defconfig41
-rw-r--r--arch/arm/configs/omap_3430sdp_defconfig20
-rw-r--r--arch/arm/configs/omap_zoom2_defconfig484
-rw-r--r--arch/arm/configs/rx51_defconfig1
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c43
-rw-r--r--arch/arm/mach-omap1/board-fsample.c5
-rw-r--r--arch/arm/mach-omap1/board-generic.c5
-rw-r--r--arch/arm/mach-omap1/board-h2.c5
-rw-r--r--arch/arm/mach-omap1/board-h3.c5
-rw-r--r--arch/arm/mach-omap1/board-innovator.c5
-rw-r--r--arch/arm/mach-omap1/board-osk.c5
-rw-r--r--arch/arm/mach-omap1/board-palmte.c5
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c5
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c5
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c5
-rw-r--r--arch/arm/mach-omap1/board-sx1.c5
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c5
-rw-r--r--arch/arm/mach-omap1/devices.c2
-rw-r--r--arch/arm/mach-omap1/io.c6
-rw-r--r--arch/arm/mach-omap1/pm.h4
-rw-r--r--arch/arm/mach-omap1/serial.c17
-rw-r--r--arch/arm/mach-omap1/sram.S12
-rw-r--r--arch/arm/mach-omap1/time.c4
-rw-r--r--arch/arm/mach-omap2/Kconfig9
-rw-r--r--arch/arm/mach-omap2/Makefile10
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c18
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c29
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c5
-rw-r--r--arch/arm/mach-omap2/board-apollon.c25
-rw-r--r--arch/arm/mach-omap2/board-generic.c15
-rw-r--r--arch/arm/mach-omap2/board-h4.c25
-rw-r--r--arch/arm/mach-omap2/board-ldp.c25
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c150
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c36
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c17
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c25
-rw-r--r--arch/arm/mach-omap2/board-overo.c24
-rw-r--r--arch/arm/mach-omap2/board-rx51.c9
-rw-r--r--arch/arm/mach-omap2/board-zoom-debugboard.c11
-rw-r--r--arch/arm/mach-omap2/board-zoom2.c218
-rw-r--r--arch/arm/mach-omap2/clock.c2
-rw-r--r--arch/arm/mach-omap2/clock34xx.c17
-rw-r--r--arch/arm/mach-omap2/clock34xx.h21
-rw-r--r--arch/arm/mach-omap2/clockdomain.c10
-rw-r--r--arch/arm/mach-omap2/cm.c70
-rw-r--r--arch/arm/mach-omap2/cm.h10
-rw-r--r--arch/arm/mach-omap2/cm4xxx.c68
-rw-r--r--arch/arm/mach-omap2/devices.c41
-rw-r--r--arch/arm/mach-omap2/io.c23
-rw-r--r--arch/arm/mach-omap2/iommu2.c19
-rw-r--r--arch/arm/mach-omap2/mux.c55
-rw-r--r--arch/arm/mach-omap2/omap-smp.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c1554
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420.h141
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430.h143
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_34xx.h168
-rw-r--r--arch/arm/mach-omap2/pm-debug.c431
-rw-r--r--arch/arm/mach-omap2/pm.h11
-rw-r--r--arch/arm/mach-omap2/pm24xx.c4
-rw-r--r--arch/arm/mach-omap2/pm34xx.c40
-rw-r--r--arch/arm/mach-omap2/powerdomain.c114
-rw-r--r--arch/arm/mach-omap2/prm.h6
-rw-r--r--arch/arm/mach-omap2/sdrc.h6
-rw-r--r--arch/arm/mach-omap2/serial.c67
-rw-r--r--arch/arm/mach-omap2/sram242x.S4
-rw-r--r--arch/arm/mach-omap2/sram243x.S4
-rw-r--r--arch/arm/mach-omap2/timer-gp.c2
-rw-r--r--arch/arm/mach-omap2/usb-musb.c12
-rw-r--r--arch/arm/plat-omap/Kconfig17
-rw-r--r--arch/arm/plat-omap/Makefile6
-rw-r--r--arch/arm/plat-omap/clock.c2
-rw-r--r--arch/arm/plat-omap/common.c88
-rw-r--r--arch/arm/plat-omap/dma.c8
-rw-r--r--arch/arm/plat-omap/dmtimer.c5
-rw-r--r--arch/arm/plat-omap/gpio.c115
-rw-r--r--arch/arm/plat-omap/include/mach/board.h2
-rw-r--r--arch/arm/plat-omap/include/mach/clockdomain.h3
-rw-r--r--arch/arm/plat-omap/include/mach/control.h12
-rw-r--r--arch/arm/plat-omap/include/mach/entry-macro.S8
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h2
-rw-r--r--arch/arm/plat-omap/include/mach/io.h97
-rw-r--r--arch/arm/plat-omap/include/mach/iommu.h6
-rw-r--r--arch/arm/plat-omap/include/mach/mtd-xip.h2
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h31
-rw-r--r--arch/arm/plat-omap/include/mach/omap-pm.h301
-rw-r--r--arch/arm/plat-omap/include/mach/omap44xx.h8
-rw-r--r--arch/arm/plat-omap/include/mach/omap_device.h141
-rw-r--r--arch/arm/plat-omap/include/mach/omap_hwmod.h447
-rw-r--r--arch/arm/plat-omap/include/mach/powerdomain.h15
-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h15
-rw-r--r--arch/arm/plat-omap/include/mach/serial.h3
-rw-r--r--arch/arm/plat-omap/io.c62
-rw-r--r--arch/arm/plat-omap/iommu-debug.c415
-rw-r--r--arch/arm/plat-omap/iommu.c23
-rw-r--r--arch/arm/plat-omap/iovmm.c2
-rw-r--r--arch/arm/plat-omap/omap-pm-noop.c296
-rw-r--r--arch/arm/plat-omap/omap_device.c687
-rw-r--r--arch/arm/plat-omap/sram.c20
99 files changed, 7631 insertions, 702 deletions
diff --git a/arch/arm/configs/n8x0_defconfig b/arch/arm/configs/n8x0_defconfig
new file mode 100644
index 000000000000..8da75dede52e
--- /dev/null
+++ b/arch/arm/configs/n8x0_defconfig
@@ -0,0 +1,1104 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31-rc5
4# Thu Aug 6 22:17:23 2009
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12CONFIG_GENERIC_HARDIRQS=y
13CONFIG_STACKTRACE_SUPPORT=y
14CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20CONFIG_GENERIC_HWEIGHT=y
21CONFIG_GENERIC_CALIBRATE_DELAY=y
22CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
23CONFIG_VECTORS_BASE=0xffff0000
24CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
25CONFIG_CONSTRUCTORS=y
26
27#
28# General setup
29#
30CONFIG_EXPERIMENTAL=y
31CONFIG_BROKEN_ON_SMP=y
32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_SWAP=y
36CONFIG_SYSVIPC=y
37CONFIG_SYSVIPC_SYSCTL=y
38# CONFIG_POSIX_MQUEUE is not set
39# CONFIG_BSD_PROCESS_ACCT is not set
40# CONFIG_TASKSTATS is not set
41# CONFIG_AUDIT is not set
42
43#
44# RCU Subsystem
45#
46# CONFIG_CLASSIC_RCU is not set
47CONFIG_TREE_RCU=y
48# CONFIG_PREEMPT_RCU is not set
49# CONFIG_RCU_TRACE is not set
50CONFIG_RCU_FANOUT=32
51# CONFIG_RCU_FANOUT_EXACT is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_PREEMPT_RCU_TRACE is not set
54# CONFIG_IKCONFIG is not set
55CONFIG_LOG_BUF_SHIFT=14
56# CONFIG_GROUP_SCHED is not set
57# CONFIG_CGROUPS is not set
58# CONFIG_SYSFS_DEPRECATED_V2 is not set
59# CONFIG_RELAY is not set
60CONFIG_NAMESPACES=y
61# CONFIG_UTS_NS is not set
62# CONFIG_IPC_NS is not set
63# CONFIG_USER_NS is not set
64# CONFIG_PID_NS is not set
65# CONFIG_NET_NS is not set
66CONFIG_BLK_DEV_INITRD=y
67CONFIG_INITRAMFS_SOURCE=""
68CONFIG_RD_GZIP=y
69CONFIG_RD_BZIP2=y
70CONFIG_RD_LZMA=y
71CONFIG_CC_OPTIMIZE_FOR_SIZE=y
72CONFIG_SYSCTL=y
73CONFIG_ANON_INODES=y
74# CONFIG_EMBEDDED is not set
75CONFIG_UID16=y
76CONFIG_SYSCTL_SYSCALL=y
77CONFIG_KALLSYMS=y
78# CONFIG_KALLSYMS_ALL is not set
79# CONFIG_KALLSYMS_EXTRA_PASS is not set
80CONFIG_HOTPLUG=y
81CONFIG_PRINTK=y
82CONFIG_BUG=y
83CONFIG_ELF_CORE=y
84CONFIG_BASE_FULL=y
85CONFIG_FUTEX=y
86CONFIG_EPOLL=y
87CONFIG_SIGNALFD=y
88CONFIG_TIMERFD=y
89CONFIG_EVENTFD=y
90CONFIG_SHMEM=y
91CONFIG_AIO=y
92
93#
94# Performance Counters
95#
96CONFIG_VM_EVENT_COUNTERS=y
97CONFIG_SLUB_DEBUG=y
98# CONFIG_STRIP_ASM_SYMS is not set
99CONFIG_COMPAT_BRK=y
100# CONFIG_SLAB is not set
101CONFIG_SLUB=y
102# CONFIG_SLOB is not set
103# CONFIG_PROFILING is not set
104# CONFIG_MARKERS is not set
105CONFIG_HAVE_OPROFILE=y
106# CONFIG_KPROBES is not set
107CONFIG_HAVE_KPROBES=y
108CONFIG_HAVE_KRETPROBES=y
109CONFIG_HAVE_CLK=y
110
111#
112# GCOV-based kernel profiling
113#
114# CONFIG_SLOW_WORK is not set
115CONFIG_HAVE_GENERIC_DMA_COHERENT=y
116CONFIG_SLABINFO=y
117CONFIG_RT_MUTEXES=y
118CONFIG_BASE_SMALL=0
119CONFIG_MODULES=y
120# CONFIG_MODULE_FORCE_LOAD is not set
121CONFIG_MODULE_UNLOAD=y
122# CONFIG_MODULE_FORCE_UNLOAD is not set
123# CONFIG_MODVERSIONS is not set
124# CONFIG_MODULE_SRCVERSION_ALL is not set
125CONFIG_BLOCK=y
126# CONFIG_LBDAF is not set
127# CONFIG_BLK_DEV_BSG is not set
128# CONFIG_BLK_DEV_INTEGRITY is not set
129
130#
131# IO Schedulers
132#
133CONFIG_IOSCHED_NOOP=y
134# CONFIG_IOSCHED_AS is not set
135# CONFIG_IOSCHED_DEADLINE is not set
136CONFIG_IOSCHED_CFQ=y
137# CONFIG_DEFAULT_AS is not set
138# CONFIG_DEFAULT_DEADLINE is not set
139CONFIG_DEFAULT_CFQ=y
140# CONFIG_DEFAULT_NOOP is not set
141CONFIG_DEFAULT_IOSCHED="cfq"
142# CONFIG_FREEZER is not set
143
144#
145# System Type
146#
147# CONFIG_ARCH_AAEC2000 is not set
148# CONFIG_ARCH_INTEGRATOR is not set
149# CONFIG_ARCH_REALVIEW is not set
150# CONFIG_ARCH_VERSATILE is not set
151# CONFIG_ARCH_AT91 is not set
152# CONFIG_ARCH_CLPS711X is not set
153# CONFIG_ARCH_GEMINI is not set
154# CONFIG_ARCH_EBSA110 is not set
155# CONFIG_ARCH_EP93XX is not set
156# CONFIG_ARCH_FOOTBRIDGE is not set
157# CONFIG_ARCH_MXC is not set
158# CONFIG_ARCH_STMP3XXX is not set
159# CONFIG_ARCH_NETX is not set
160# CONFIG_ARCH_H720X is not set
161# CONFIG_ARCH_IOP13XX is not set
162# CONFIG_ARCH_IOP32X is not set
163# CONFIG_ARCH_IOP33X is not set
164# CONFIG_ARCH_IXP23XX is not set
165# CONFIG_ARCH_IXP2000 is not set
166# CONFIG_ARCH_IXP4XX is not set
167# CONFIG_ARCH_L7200 is not set
168# CONFIG_ARCH_KIRKWOOD is not set
169# CONFIG_ARCH_LOKI is not set
170# CONFIG_ARCH_MV78XX0 is not set
171# CONFIG_ARCH_ORION5X is not set
172# CONFIG_ARCH_MMP is not set
173# CONFIG_ARCH_KS8695 is not set
174# CONFIG_ARCH_NS9XXX is not set
175# CONFIG_ARCH_W90X900 is not set
176# CONFIG_ARCH_PNX4008 is not set
177# CONFIG_ARCH_PXA is not set
178# CONFIG_ARCH_MSM is not set
179# CONFIG_ARCH_RPC is not set
180# CONFIG_ARCH_SA1100 is not set
181# CONFIG_ARCH_S3C2410 is not set
182# CONFIG_ARCH_S3C64XX is not set
183# CONFIG_ARCH_SHARK is not set
184# CONFIG_ARCH_LH7A40X is not set
185# CONFIG_ARCH_U300 is not set
186# CONFIG_ARCH_DAVINCI is not set
187CONFIG_ARCH_OMAP=y
188
189#
190# TI OMAP Implementations
191#
192CONFIG_ARCH_OMAP_OTG=y
193# CONFIG_ARCH_OMAP1 is not set
194CONFIG_ARCH_OMAP2=y
195# CONFIG_ARCH_OMAP3 is not set
196# CONFIG_ARCH_OMAP4 is not set
197
198#
199# OMAP Feature Selections
200#
201# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
202# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
203CONFIG_OMAP_RESET_CLOCKS=y
204# CONFIG_OMAP_MUX is not set
205# CONFIG_OMAP_MCBSP is not set
206CONFIG_OMAP_MBOX_FWK=y
207# CONFIG_OMAP_MPU_TIMER is not set
208CONFIG_OMAP_32K_TIMER=y
209CONFIG_OMAP_32K_TIMER_HZ=128
210CONFIG_OMAP_DM_TIMER=y
211# CONFIG_OMAP_LL_DEBUG_UART1 is not set
212# CONFIG_OMAP_LL_DEBUG_UART2 is not set
213CONFIG_OMAP_LL_DEBUG_UART3=y
214# CONFIG_MACH_OMAP_GENERIC is not set
215
216#
217# OMAP Core Type
218#
219CONFIG_ARCH_OMAP24XX=y
220CONFIG_ARCH_OMAP2420=y
221# CONFIG_ARCH_OMAP2430 is not set
222
223#
224# OMAP Board Type
225#
226CONFIG_MACH_OMAP2_TUSB6010=y
227# CONFIG_MACH_OMAP_H4 is not set
228# CONFIG_MACH_OMAP_APOLLON is not set
229# CONFIG_MACH_OMAP_2430SDP is not set
230CONFIG_MACH_NOKIA_N8X0=y
231
232#
233# Processor Type
234#
235CONFIG_CPU_32=y
236CONFIG_CPU_V6=y
237# CONFIG_CPU_32v6K is not set
238CONFIG_CPU_32v6=y
239CONFIG_CPU_ABRT_EV6=y
240CONFIG_CPU_PABRT_NOIFAR=y
241CONFIG_CPU_CACHE_V6=y
242CONFIG_CPU_CACHE_VIPT=y
243CONFIG_CPU_COPY_V6=y
244CONFIG_CPU_TLB_V6=y
245CONFIG_CPU_HAS_ASID=y
246CONFIG_CPU_CP15=y
247CONFIG_CPU_CP15_MMU=y
248
249#
250# Processor Features
251#
252CONFIG_ARM_THUMB=y
253# CONFIG_CPU_ICACHE_DISABLE is not set
254# CONFIG_CPU_DCACHE_DISABLE is not set
255# CONFIG_CPU_BPREDICT_DISABLE is not set
256# CONFIG_ARM_ERRATA_411920 is not set
257CONFIG_COMMON_CLKDEV=y
258
259#
260# Bus support
261#
262# CONFIG_PCI_SYSCALL is not set
263# CONFIG_ARCH_SUPPORTS_MSI is not set
264# CONFIG_PCCARD is not set
265
266#
267# Kernel Features
268#
269# CONFIG_NO_HZ is not set
270# CONFIG_HIGH_RES_TIMERS is not set
271CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
272CONFIG_VMSPLIT_3G=y
273# CONFIG_VMSPLIT_2G is not set
274# CONFIG_VMSPLIT_1G is not set
275CONFIG_PAGE_OFFSET=0xC0000000
276# CONFIG_PREEMPT is not set
277CONFIG_HZ=128
278CONFIG_AEABI=y
279CONFIG_OABI_COMPAT=y
280# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
281# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
282# CONFIG_HIGHMEM is not set
283CONFIG_SELECT_MEMORY_MODEL=y
284CONFIG_FLATMEM_MANUAL=y
285# CONFIG_DISCONTIGMEM_MANUAL is not set
286# CONFIG_SPARSEMEM_MANUAL is not set
287CONFIG_FLATMEM=y
288CONFIG_FLAT_NODE_MEM_MAP=y
289CONFIG_PAGEFLAGS_EXTENDED=y
290CONFIG_SPLIT_PTLOCK_CPUS=4
291# CONFIG_PHYS_ADDR_T_64BIT is not set
292CONFIG_ZONE_DMA_FLAG=0
293CONFIG_VIRT_TO_BUS=y
294CONFIG_HAVE_MLOCK=y
295CONFIG_HAVE_MLOCKED_PAGE_BIT=y
296CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
297CONFIG_LEDS=y
298CONFIG_ALIGNMENT_TRAP=y
299# CONFIG_UACCESS_WITH_MEMCPY is not set
300
301#
302# Boot options
303#
304CONFIG_ZBOOT_ROM_TEXT=0x10C08000
305CONFIG_ZBOOT_ROM_BSS=0x10200000
306# CONFIG_ZBOOT_ROM is not set
307CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS0,115200n8"
308# CONFIG_XIP_KERNEL is not set
309# CONFIG_KEXEC is not set
310
311#
312# CPU Power Management
313#
314# CONFIG_CPU_FREQ is not set
315# CONFIG_CPU_IDLE is not set
316
317#
318# Floating point emulation
319#
320
321#
322# At least one emulation must be selected
323#
324CONFIG_FPE_NWFPE=y
325# CONFIG_FPE_NWFPE_XP is not set
326# CONFIG_FPE_FASTFPE is not set
327CONFIG_VFP=y
328
329#
330# Userspace binary formats
331#
332CONFIG_BINFMT_ELF=y
333# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
334CONFIG_HAVE_AOUT=y
335# CONFIG_BINFMT_AOUT is not set
336# CONFIG_BINFMT_MISC is not set
337
338#
339# Power management options
340#
341# CONFIG_PM is not set
342CONFIG_ARCH_SUSPEND_POSSIBLE=y
343CONFIG_NET=y
344
345#
346# Networking options
347#
348# CONFIG_PACKET is not set
349CONFIG_UNIX=y
350# CONFIG_NET_KEY is not set
351CONFIG_INET=y
352# CONFIG_IP_MULTICAST is not set
353# CONFIG_IP_ADVANCED_ROUTER is not set
354CONFIG_IP_FIB_HASH=y
355# CONFIG_IP_PNP is not set
356# CONFIG_NET_IPIP is not set
357# CONFIG_NET_IPGRE is not set
358# CONFIG_ARPD is not set
359# CONFIG_SYN_COOKIES is not set
360# CONFIG_INET_AH is not set
361# CONFIG_INET_ESP is not set
362# CONFIG_INET_IPCOMP is not set
363# CONFIG_INET_XFRM_TUNNEL is not set
364# CONFIG_INET_TUNNEL is not set
365# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
366# CONFIG_INET_XFRM_MODE_TUNNEL is not set
367# CONFIG_INET_XFRM_MODE_BEET is not set
368# CONFIG_INET_LRO is not set
369CONFIG_INET_DIAG=y
370CONFIG_INET_TCP_DIAG=y
371# CONFIG_TCP_CONG_ADVANCED is not set
372CONFIG_TCP_CONG_CUBIC=y
373CONFIG_DEFAULT_TCP_CONG="cubic"
374# CONFIG_TCP_MD5SIG is not set
375# CONFIG_IPV6 is not set
376# CONFIG_NETWORK_SECMARK is not set
377# CONFIG_NETFILTER is not set
378# CONFIG_IP_DCCP is not set
379# CONFIG_IP_SCTP is not set
380# CONFIG_TIPC is not set
381# CONFIG_ATM is not set
382# CONFIG_BRIDGE is not set
383# CONFIG_NET_DSA is not set
384# CONFIG_VLAN_8021Q is not set
385# CONFIG_DECNET is not set
386# CONFIG_LLC2 is not set
387# CONFIG_IPX is not set
388# CONFIG_ATALK is not set
389# CONFIG_X25 is not set
390# CONFIG_LAPB is not set
391# CONFIG_ECONET is not set
392# CONFIG_WAN_ROUTER is not set
393# CONFIG_PHONET is not set
394# CONFIG_IEEE802154 is not set
395# CONFIG_NET_SCHED is not set
396# CONFIG_DCB is not set
397
398#
399# Network testing
400#
401# CONFIG_NET_PKTGEN is not set
402# CONFIG_HAMRADIO is not set
403# CONFIG_CAN is not set
404# CONFIG_IRDA is not set
405# CONFIG_BT is not set
406# CONFIG_AF_RXRPC is not set
407CONFIG_WIRELESS=y
408# CONFIG_CFG80211 is not set
409# CONFIG_WIRELESS_OLD_REGULATORY is not set
410# CONFIG_WIRELESS_EXT is not set
411# CONFIG_LIB80211 is not set
412
413#
414# CFG80211 needs to be enabled for MAC80211
415#
416CONFIG_MAC80211_DEFAULT_PS_VALUE=0
417# CONFIG_WIMAX is not set
418# CONFIG_RFKILL is not set
419# CONFIG_NET_9P is not set
420
421#
422# Device Drivers
423#
424
425#
426# Generic Driver Options
427#
428CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
429CONFIG_STANDALONE=y
430CONFIG_PREVENT_FIRMWARE_BUILD=y
431CONFIG_FW_LOADER=y
432CONFIG_FIRMWARE_IN_KERNEL=y
433CONFIG_EXTRA_FIRMWARE=""
434# CONFIG_DEBUG_DRIVER is not set
435# CONFIG_DEBUG_DEVRES is not set
436# CONFIG_SYS_HYPERVISOR is not set
437# CONFIG_CONNECTOR is not set
438CONFIG_MTD=y
439# CONFIG_MTD_DEBUG is not set
440# CONFIG_MTD_CONCAT is not set
441CONFIG_MTD_PARTITIONS=y
442# CONFIG_MTD_TESTS is not set
443# CONFIG_MTD_REDBOOT_PARTS is not set
444CONFIG_MTD_CMDLINE_PARTS=y
445# CONFIG_MTD_AFS_PARTS is not set
446# CONFIG_MTD_AR7_PARTS is not set
447
448#
449# User Modules And Translation Layers
450#
451# CONFIG_MTD_CHAR is not set
452CONFIG_HAVE_MTD_OTP=y
453# CONFIG_MTD_BLKDEVS is not set
454# CONFIG_MTD_BLOCK is not set
455# CONFIG_MTD_BLOCK_RO is not set
456# CONFIG_FTL is not set
457# CONFIG_NFTL is not set
458# CONFIG_INFTL is not set
459# CONFIG_RFD_FTL is not set
460# CONFIG_SSFDC is not set
461# CONFIG_MTD_OOPS is not set
462
463#
464# RAM/ROM/Flash chip drivers
465#
466# CONFIG_MTD_CFI is not set
467# CONFIG_MTD_JEDECPROBE is not set
468CONFIG_MTD_MAP_BANK_WIDTH_1=y
469CONFIG_MTD_MAP_BANK_WIDTH_2=y
470CONFIG_MTD_MAP_BANK_WIDTH_4=y
471# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
472# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
473# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
474CONFIG_MTD_CFI_I1=y
475CONFIG_MTD_CFI_I2=y
476# CONFIG_MTD_CFI_I4 is not set
477# CONFIG_MTD_CFI_I8 is not set
478# CONFIG_MTD_RAM is not set
479# CONFIG_MTD_ROM is not set
480# CONFIG_MTD_ABSENT is not set
481
482#
483# Mapping drivers for chip access
484#
485# CONFIG_MTD_COMPLEX_MAPPINGS is not set
486# CONFIG_MTD_PLATRAM is not set
487
488#
489# Self-contained MTD device drivers
490#
491# CONFIG_MTD_DATAFLASH is not set
492# CONFIG_MTD_M25P80 is not set
493# CONFIG_MTD_SLRAM is not set
494# CONFIG_MTD_PHRAM is not set
495# CONFIG_MTD_MTDRAM is not set
496# CONFIG_MTD_BLOCK2MTD is not set
497
498#
499# Disk-On-Chip Device Drivers
500#
501# CONFIG_MTD_DOC2000 is not set
502# CONFIG_MTD_DOC2001 is not set
503# CONFIG_MTD_DOC2001PLUS is not set
504# CONFIG_MTD_NAND is not set
505CONFIG_MTD_ONENAND=y
506# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
507# CONFIG_MTD_ONENAND_GENERIC is not set
508CONFIG_MTD_ONENAND_OMAP2=y
509CONFIG_MTD_ONENAND_OTP=y
510# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
511# CONFIG_MTD_ONENAND_SIM is not set
512
513#
514# LPDDR flash memory drivers
515#
516# CONFIG_MTD_LPDDR is not set
517
518#
519# UBI - Unsorted block images
520#
521# CONFIG_MTD_UBI is not set
522# CONFIG_PARPORT is not set
523CONFIG_BLK_DEV=y
524# CONFIG_BLK_DEV_COW_COMMON is not set
525# CONFIG_BLK_DEV_LOOP is not set
526# CONFIG_BLK_DEV_NBD is not set
527# CONFIG_BLK_DEV_UB is not set
528CONFIG_BLK_DEV_RAM=y
529CONFIG_BLK_DEV_RAM_COUNT=16
530CONFIG_BLK_DEV_RAM_SIZE=4096
531# CONFIG_BLK_DEV_XIP is not set
532# CONFIG_CDROM_PKTCDVD is not set
533# CONFIG_ATA_OVER_ETH is not set
534# CONFIG_MG_DISK is not set
535# CONFIG_MISC_DEVICES is not set
536CONFIG_HAVE_IDE=y
537# CONFIG_IDE is not set
538
539#
540# SCSI device support
541#
542# CONFIG_RAID_ATTRS is not set
543# CONFIG_SCSI is not set
544# CONFIG_SCSI_DMA is not set
545# CONFIG_SCSI_NETLINK is not set
546# CONFIG_ATA is not set
547# CONFIG_MD is not set
548# CONFIG_NETDEVICES is not set
549# CONFIG_ISDN is not set
550
551#
552# Input device support
553#
554CONFIG_INPUT=y
555# CONFIG_INPUT_FF_MEMLESS is not set
556# CONFIG_INPUT_POLLDEV is not set
557
558#
559# Userland interfaces
560#
561CONFIG_INPUT_MOUSEDEV=y
562# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
563CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
564CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
565# CONFIG_INPUT_JOYDEV is not set
566# CONFIG_INPUT_EVDEV is not set
567# CONFIG_INPUT_EVBUG is not set
568
569#
570# Input Device Drivers
571#
572# CONFIG_INPUT_KEYBOARD is not set
573# CONFIG_INPUT_MOUSE is not set
574# CONFIG_INPUT_JOYSTICK is not set
575# CONFIG_INPUT_TABLET is not set
576# CONFIG_INPUT_TOUCHSCREEN is not set
577# CONFIG_INPUT_MISC is not set
578
579#
580# Hardware I/O ports
581#
582CONFIG_SERIO=y
583CONFIG_SERIO_SERPORT=y
584# CONFIG_SERIO_RAW is not set
585# CONFIG_GAMEPORT is not set
586
587#
588# Character devices
589#
590CONFIG_VT=y
591CONFIG_CONSOLE_TRANSLATIONS=y
592CONFIG_VT_CONSOLE=y
593CONFIG_HW_CONSOLE=y
594# CONFIG_VT_HW_CONSOLE_BINDING is not set
595CONFIG_DEVKMEM=y
596# CONFIG_SERIAL_NONSTANDARD is not set
597
598#
599# Serial drivers
600#
601CONFIG_SERIAL_8250=y
602CONFIG_SERIAL_8250_CONSOLE=y
603CONFIG_SERIAL_8250_NR_UARTS=4
604CONFIG_SERIAL_8250_RUNTIME_UARTS=4
605# CONFIG_SERIAL_8250_EXTENDED is not set
606
607#
608# Non-8250 serial port support
609#
610# CONFIG_SERIAL_MAX3100 is not set
611CONFIG_SERIAL_CORE=y
612CONFIG_SERIAL_CORE_CONSOLE=y
613CONFIG_UNIX98_PTYS=y
614# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
615# CONFIG_LEGACY_PTYS is not set
616# CONFIG_IPMI_HANDLER is not set
617# CONFIG_HW_RANDOM is not set
618# CONFIG_R3964 is not set
619# CONFIG_RAW_DRIVER is not set
620# CONFIG_TCG_TPM is not set
621# CONFIG_I2C is not set
622CONFIG_SPI=y
623# CONFIG_SPI_DEBUG is not set
624CONFIG_SPI_MASTER=y
625
626#
627# SPI Master Controller Drivers
628#
629# CONFIG_SPI_BITBANG is not set
630# CONFIG_SPI_GPIO is not set
631CONFIG_SPI_OMAP24XX=y
632
633#
634# SPI Protocol Masters
635#
636# CONFIG_SPI_SPIDEV is not set
637# CONFIG_SPI_TLE62X0 is not set
638CONFIG_ARCH_REQUIRE_GPIOLIB=y
639CONFIG_GPIOLIB=y
640# CONFIG_DEBUG_GPIO is not set
641# CONFIG_GPIO_SYSFS is not set
642
643#
644# Memory mapped GPIO expanders:
645#
646
647#
648# I2C GPIO expanders:
649#
650
651#
652# PCI GPIO expanders:
653#
654
655#
656# SPI GPIO expanders:
657#
658# CONFIG_GPIO_MAX7301 is not set
659# CONFIG_GPIO_MCP23S08 is not set
660# CONFIG_W1 is not set
661# CONFIG_POWER_SUPPLY is not set
662# CONFIG_HWMON is not set
663# CONFIG_THERMAL is not set
664# CONFIG_THERMAL_HWMON is not set
665# CONFIG_WATCHDOG is not set
666CONFIG_SSB_POSSIBLE=y
667
668#
669# Sonics Silicon Backplane
670#
671# CONFIG_SSB is not set
672
673#
674# Multifunction device drivers
675#
676# CONFIG_MFD_CORE is not set
677# CONFIG_MFD_SM501 is not set
678# CONFIG_MFD_ASIC3 is not set
679# CONFIG_HTC_EGPIO is not set
680# CONFIG_HTC_PASIC3 is not set
681# CONFIG_MFD_TMIO is not set
682# CONFIG_MFD_T7L66XB is not set
683# CONFIG_MFD_TC6387XB is not set
684# CONFIG_MFD_TC6393XB is not set
685# CONFIG_EZX_PCAP is not set
686# CONFIG_MEDIA_SUPPORT is not set
687
688#
689# Graphics support
690#
691# CONFIG_VGASTATE is not set
692# CONFIG_VIDEO_OUTPUT_CONTROL is not set
693# CONFIG_FB is not set
694# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
695
696#
697# Display device support
698#
699# CONFIG_DISPLAY_SUPPORT is not set
700
701#
702# Console display driver support
703#
704# CONFIG_VGA_CONSOLE is not set
705CONFIG_DUMMY_CONSOLE=y
706# CONFIG_SOUND is not set
707# CONFIG_HID_SUPPORT is not set
708CONFIG_USB_SUPPORT=y
709CONFIG_USB_ARCH_HAS_HCD=y
710CONFIG_USB_ARCH_HAS_OHCI=y
711# CONFIG_USB_ARCH_HAS_EHCI is not set
712CONFIG_USB=y
713CONFIG_USB_DEBUG=y
714CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
715
716#
717# Miscellaneous USB options
718#
719CONFIG_USB_DEVICEFS=y
720CONFIG_USB_DEVICE_CLASS=y
721# CONFIG_USB_DYNAMIC_MINORS is not set
722# CONFIG_USB_OTG is not set
723# CONFIG_USB_MON is not set
724# CONFIG_USB_WUSB is not set
725# CONFIG_USB_WUSB_CBAF is not set
726
727#
728# USB Host Controller Drivers
729#
730# CONFIG_USB_C67X00_HCD is not set
731# CONFIG_USB_OXU210HP_HCD is not set
732# CONFIG_USB_ISP116X_HCD is not set
733# CONFIG_USB_ISP1760_HCD is not set
734# CONFIG_USB_OHCI_HCD is not set
735# CONFIG_USB_SL811_HCD is not set
736# CONFIG_USB_R8A66597_HCD is not set
737# CONFIG_USB_HWA_HCD is not set
738CONFIG_USB_MUSB_HDRC=y
739CONFIG_USB_TUSB6010=y
740# CONFIG_USB_MUSB_HOST is not set
741CONFIG_USB_MUSB_PERIPHERAL=y
742# CONFIG_USB_MUSB_OTG is not set
743CONFIG_USB_GADGET_MUSB_HDRC=y
744# CONFIG_MUSB_PIO_ONLY is not set
745# CONFIG_USB_INVENTRA_DMA is not set
746# CONFIG_USB_TI_CPPI_DMA is not set
747CONFIG_USB_TUSB_OMAP_DMA=y
748CONFIG_USB_MUSB_DEBUG=y
749
750#
751# USB Device Class drivers
752#
753# CONFIG_USB_ACM is not set
754# CONFIG_USB_PRINTER is not set
755# CONFIG_USB_WDM is not set
756# CONFIG_USB_TMC is not set
757
758#
759# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
760#
761
762#
763# also be needed; see USB_STORAGE Help for more info
764#
765# CONFIG_USB_LIBUSUAL is not set
766
767#
768# USB Imaging devices
769#
770# CONFIG_USB_MDC800 is not set
771
772#
773# USB port drivers
774#
775# CONFIG_USB_SERIAL is not set
776
777#
778# USB Miscellaneous drivers
779#
780# CONFIG_USB_EMI62 is not set
781# CONFIG_USB_EMI26 is not set
782# CONFIG_USB_ADUTUX is not set
783# CONFIG_USB_SEVSEG is not set
784# CONFIG_USB_RIO500 is not set
785# CONFIG_USB_LEGOTOWER is not set
786# CONFIG_USB_LCD is not set
787# CONFIG_USB_BERRY_CHARGE is not set
788# CONFIG_USB_LED is not set
789# CONFIG_USB_CYPRESS_CY7C63 is not set
790# CONFIG_USB_CYTHERM is not set
791# CONFIG_USB_IDMOUSE is not set
792# CONFIG_USB_FTDI_ELAN is not set
793# CONFIG_USB_APPLEDISPLAY is not set
794# CONFIG_USB_SISUSBVGA is not set
795# CONFIG_USB_LD is not set
796# CONFIG_USB_TRANCEVIBRATOR is not set
797# CONFIG_USB_IOWARRIOR is not set
798# CONFIG_USB_TEST is not set
799# CONFIG_USB_ISIGHTFW is not set
800# CONFIG_USB_VST is not set
801CONFIG_USB_GADGET=y
802CONFIG_USB_GADGET_DEBUG=y
803CONFIG_USB_GADGET_DEBUG_FILES=y
804CONFIG_USB_GADGET_VBUS_DRAW=2
805CONFIG_USB_GADGET_SELECTED=y
806# CONFIG_USB_GADGET_AT91 is not set
807# CONFIG_USB_GADGET_ATMEL_USBA is not set
808# CONFIG_USB_GADGET_FSL_USB2 is not set
809# CONFIG_USB_GADGET_LH7A40X is not set
810# CONFIG_USB_GADGET_OMAP is not set
811# CONFIG_USB_GADGET_PXA25X is not set
812# CONFIG_USB_GADGET_PXA27X is not set
813# CONFIG_USB_GADGET_S3C_HSOTG is not set
814# CONFIG_USB_GADGET_IMX is not set
815# CONFIG_USB_GADGET_S3C2410 is not set
816# CONFIG_USB_GADGET_M66592 is not set
817# CONFIG_USB_GADGET_AMD5536UDC is not set
818# CONFIG_USB_GADGET_FSL_QE is not set
819# CONFIG_USB_GADGET_CI13XXX is not set
820# CONFIG_USB_GADGET_NET2280 is not set
821# CONFIG_USB_GADGET_GOKU is not set
822# CONFIG_USB_GADGET_LANGWELL is not set
823# CONFIG_USB_GADGET_DUMMY_HCD is not set
824CONFIG_USB_GADGET_DUALSPEED=y
825# CONFIG_USB_ZERO is not set
826# CONFIG_USB_AUDIO is not set
827CONFIG_USB_ETH=y
828# CONFIG_USB_ETH_RNDIS is not set
829# CONFIG_USB_GADGETFS is not set
830# CONFIG_USB_FILE_STORAGE is not set
831# CONFIG_USB_G_SERIAL is not set
832# CONFIG_USB_MIDI_GADGET is not set
833# CONFIG_USB_G_PRINTER is not set
834# CONFIG_USB_CDC_COMPOSITE is not set
835
836#
837# OTG and related infrastructure
838#
839CONFIG_USB_OTG_UTILS=y
840# CONFIG_USB_GPIO_VBUS is not set
841CONFIG_NOP_USB_XCEIV=y
842# CONFIG_MMC is not set
843# CONFIG_MEMSTICK is not set
844# CONFIG_ACCESSIBILITY is not set
845# CONFIG_NEW_LEDS is not set
846CONFIG_RTC_LIB=y
847# CONFIG_RTC_CLASS is not set
848# CONFIG_DMADEVICES is not set
849# CONFIG_AUXDISPLAY is not set
850# CONFIG_REGULATOR is not set
851# CONFIG_UIO is not set
852# CONFIG_STAGING is not set
853
854#
855# File systems
856#
857# CONFIG_EXT2_FS is not set
858# CONFIG_EXT3_FS is not set
859# CONFIG_EXT4_FS is not set
860# CONFIG_REISERFS_FS is not set
861# CONFIG_JFS_FS is not set
862# CONFIG_FS_POSIX_ACL is not set
863# CONFIG_XFS_FS is not set
864# CONFIG_OCFS2_FS is not set
865# CONFIG_BTRFS_FS is not set
866CONFIG_FILE_LOCKING=y
867CONFIG_FSNOTIFY=y
868CONFIG_DNOTIFY=y
869CONFIG_INOTIFY=y
870CONFIG_INOTIFY_USER=y
871# CONFIG_QUOTA is not set
872# CONFIG_AUTOFS_FS is not set
873# CONFIG_AUTOFS4_FS is not set
874# CONFIG_FUSE_FS is not set
875
876#
877# Caches
878#
879# CONFIG_FSCACHE is not set
880
881#
882# CD-ROM/DVD Filesystems
883#
884# CONFIG_ISO9660_FS is not set
885# CONFIG_UDF_FS is not set
886
887#
888# DOS/FAT/NT Filesystems
889#
890# CONFIG_MSDOS_FS is not set
891# CONFIG_VFAT_FS is not set
892# CONFIG_NTFS_FS is not set
893
894#
895# Pseudo filesystems
896#
897CONFIG_PROC_FS=y
898CONFIG_PROC_SYSCTL=y
899CONFIG_PROC_PAGE_MONITOR=y
900CONFIG_SYSFS=y
901CONFIG_TMPFS=y
902# CONFIG_TMPFS_POSIX_ACL is not set
903# CONFIG_HUGETLB_PAGE is not set
904# CONFIG_CONFIGFS_FS is not set
905CONFIG_MISC_FILESYSTEMS=y
906# CONFIG_ADFS_FS is not set
907# CONFIG_AFFS_FS is not set
908# CONFIG_HFS_FS is not set
909# CONFIG_HFSPLUS_FS is not set
910# CONFIG_BEFS_FS is not set
911# CONFIG_BFS_FS is not set
912# CONFIG_EFS_FS is not set
913CONFIG_JFFS2_FS=y
914CONFIG_JFFS2_FS_DEBUG=0
915CONFIG_JFFS2_FS_WRITEBUFFER=y
916# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
917CONFIG_JFFS2_SUMMARY=y
918# CONFIG_JFFS2_FS_XATTR is not set
919CONFIG_JFFS2_COMPRESSION_OPTIONS=y
920CONFIG_JFFS2_ZLIB=y
921CONFIG_JFFS2_LZO=y
922CONFIG_JFFS2_RTIME=y
923# CONFIG_JFFS2_RUBIN is not set
924# CONFIG_JFFS2_CMODE_NONE is not set
925CONFIG_JFFS2_CMODE_PRIORITY=y
926# CONFIG_JFFS2_CMODE_SIZE is not set
927# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
928# CONFIG_CRAMFS is not set
929# CONFIG_SQUASHFS is not set
930# CONFIG_VXFS_FS is not set
931# CONFIG_MINIX_FS is not set
932# CONFIG_OMFS_FS is not set
933# CONFIG_HPFS_FS is not set
934# CONFIG_QNX4FS_FS is not set
935# CONFIG_ROMFS_FS is not set
936# CONFIG_SYSV_FS is not set
937# CONFIG_UFS_FS is not set
938# CONFIG_NILFS2_FS is not set
939CONFIG_NETWORK_FILESYSTEMS=y
940# CONFIG_NFS_FS is not set
941# CONFIG_NFSD is not set
942# CONFIG_SMB_FS is not set
943# CONFIG_CIFS is not set
944# CONFIG_NCP_FS is not set
945# CONFIG_CODA_FS is not set
946# CONFIG_AFS_FS is not set
947
948#
949# Partition Types
950#
951# CONFIG_PARTITION_ADVANCED is not set
952CONFIG_MSDOS_PARTITION=y
953CONFIG_NLS=y
954CONFIG_NLS_DEFAULT="iso8859-1"
955# CONFIG_NLS_CODEPAGE_437 is not set
956# CONFIG_NLS_CODEPAGE_737 is not set
957# CONFIG_NLS_CODEPAGE_775 is not set
958# CONFIG_NLS_CODEPAGE_850 is not set
959# CONFIG_NLS_CODEPAGE_852 is not set
960# CONFIG_NLS_CODEPAGE_855 is not set
961# CONFIG_NLS_CODEPAGE_857 is not set
962# CONFIG_NLS_CODEPAGE_860 is not set
963# CONFIG_NLS_CODEPAGE_861 is not set
964# CONFIG_NLS_CODEPAGE_862 is not set
965# CONFIG_NLS_CODEPAGE_863 is not set
966# CONFIG_NLS_CODEPAGE_864 is not set
967# CONFIG_NLS_CODEPAGE_865 is not set
968# CONFIG_NLS_CODEPAGE_866 is not set
969# CONFIG_NLS_CODEPAGE_869 is not set
970# CONFIG_NLS_CODEPAGE_936 is not set
971# CONFIG_NLS_CODEPAGE_950 is not set
972# CONFIG_NLS_CODEPAGE_932 is not set
973# CONFIG_NLS_CODEPAGE_949 is not set
974# CONFIG_NLS_CODEPAGE_874 is not set
975# CONFIG_NLS_ISO8859_8 is not set
976# CONFIG_NLS_CODEPAGE_1250 is not set
977# CONFIG_NLS_CODEPAGE_1251 is not set
978# CONFIG_NLS_ASCII is not set
979# CONFIG_NLS_ISO8859_1 is not set
980# CONFIG_NLS_ISO8859_2 is not set
981# CONFIG_NLS_ISO8859_3 is not set
982# CONFIG_NLS_ISO8859_4 is not set
983# CONFIG_NLS_ISO8859_5 is not set
984# CONFIG_NLS_ISO8859_6 is not set
985# CONFIG_NLS_ISO8859_7 is not set
986# CONFIG_NLS_ISO8859_9 is not set
987# CONFIG_NLS_ISO8859_13 is not set
988# CONFIG_NLS_ISO8859_14 is not set
989# CONFIG_NLS_ISO8859_15 is not set
990# CONFIG_NLS_KOI8_R is not set
991# CONFIG_NLS_KOI8_U is not set
992# CONFIG_NLS_UTF8 is not set
993# CONFIG_DLM is not set
994
995#
996# Kernel hacking
997#
998CONFIG_PRINTK_TIME=y
999CONFIG_ENABLE_WARN_DEPRECATED=y
1000CONFIG_ENABLE_MUST_CHECK=y
1001CONFIG_FRAME_WARN=1024
1002# CONFIG_MAGIC_SYSRQ is not set
1003# CONFIG_UNUSED_SYMBOLS is not set
1004# CONFIG_DEBUG_FS is not set
1005# CONFIG_HEADERS_CHECK is not set
1006CONFIG_DEBUG_KERNEL=y
1007# CONFIG_DEBUG_SHIRQ is not set
1008CONFIG_DETECT_SOFTLOCKUP=y
1009# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1010CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1011CONFIG_DETECT_HUNG_TASK=y
1012# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1013CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1014CONFIG_SCHED_DEBUG=y
1015# CONFIG_SCHEDSTATS is not set
1016# CONFIG_TIMER_STATS is not set
1017# CONFIG_DEBUG_OBJECTS is not set
1018# CONFIG_SLUB_DEBUG_ON is not set
1019# CONFIG_SLUB_STATS is not set
1020# CONFIG_DEBUG_KMEMLEAK is not set
1021# CONFIG_DEBUG_RT_MUTEXES is not set
1022# CONFIG_RT_MUTEX_TESTER is not set
1023# CONFIG_DEBUG_SPINLOCK is not set
1024# CONFIG_DEBUG_MUTEXES is not set
1025# CONFIG_DEBUG_LOCK_ALLOC is not set
1026# CONFIG_PROVE_LOCKING is not set
1027# CONFIG_LOCK_STAT is not set
1028# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1029# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1030# CONFIG_DEBUG_KOBJECT is not set
1031CONFIG_DEBUG_BUGVERBOSE=y
1032CONFIG_DEBUG_INFO=y
1033# CONFIG_DEBUG_VM is not set
1034# CONFIG_DEBUG_WRITECOUNT is not set
1035CONFIG_DEBUG_MEMORY_INIT=y
1036# CONFIG_DEBUG_LIST is not set
1037# CONFIG_DEBUG_SG is not set
1038# CONFIG_DEBUG_NOTIFIERS is not set
1039# CONFIG_BOOT_PRINTK_DELAY is not set
1040# CONFIG_RCU_TORTURE_TEST is not set
1041# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1042# CONFIG_BACKTRACE_SELF_TEST is not set
1043# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1044# CONFIG_FAULT_INJECTION is not set
1045# CONFIG_LATENCYTOP is not set
1046# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1047# CONFIG_PAGE_POISONING is not set
1048CONFIG_HAVE_FUNCTION_TRACER=y
1049CONFIG_TRACING_SUPPORT=y
1050CONFIG_FTRACE=y
1051# CONFIG_FUNCTION_TRACER is not set
1052# CONFIG_IRQSOFF_TRACER is not set
1053# CONFIG_SCHED_TRACER is not set
1054# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1055# CONFIG_BOOT_TRACER is not set
1056CONFIG_BRANCH_PROFILE_NONE=y
1057# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1058# CONFIG_PROFILE_ALL_BRANCHES is not set
1059# CONFIG_STACK_TRACER is not set
1060# CONFIG_KMEMTRACE is not set
1061# CONFIG_WORKQUEUE_TRACER is not set
1062# CONFIG_BLK_DEV_IO_TRACE is not set
1063# CONFIG_SAMPLES is not set
1064CONFIG_HAVE_ARCH_KGDB=y
1065# CONFIG_KGDB is not set
1066CONFIG_ARM_UNWIND=y
1067CONFIG_DEBUG_USER=y
1068CONFIG_DEBUG_ERRORS=y
1069# CONFIG_DEBUG_STACK_USAGE is not set
1070# CONFIG_DEBUG_LL is not set
1071
1072#
1073# Security options
1074#
1075# CONFIG_KEYS is not set
1076# CONFIG_SECURITY is not set
1077# CONFIG_SECURITYFS is not set
1078# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1079# CONFIG_CRYPTO is not set
1080# CONFIG_BINARY_PRINTF is not set
1081
1082#
1083# Library routines
1084#
1085CONFIG_BITREVERSE=y
1086CONFIG_GENERIC_FIND_LAST_BIT=y
1087CONFIG_CRC_CCITT=y
1088# CONFIG_CRC16 is not set
1089# CONFIG_CRC_T10DIF is not set
1090# CONFIG_CRC_ITU_T is not set
1091CONFIG_CRC32=y
1092# CONFIG_CRC7 is not set
1093# CONFIG_LIBCRC32C is not set
1094CONFIG_ZLIB_INFLATE=y
1095CONFIG_ZLIB_DEFLATE=y
1096CONFIG_LZO_COMPRESS=y
1097CONFIG_LZO_DECOMPRESS=y
1098CONFIG_DECOMPRESS_GZIP=y
1099CONFIG_DECOMPRESS_BZIP2=y
1100CONFIG_DECOMPRESS_LZMA=y
1101CONFIG_HAS_IOMEM=y
1102CONFIG_HAS_IOPORT=y
1103CONFIG_HAS_DMA=y
1104CONFIG_NLATTR=y
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig
index 4c6fb7e959df..51c0fa8897cd 100644
--- a/arch/arm/configs/omap3_beagle_defconfig
+++ b/arch/arm/configs/omap3_beagle_defconfig
@@ -128,6 +128,7 @@ CONFIG_DEFAULT_AS=y
128# CONFIG_DEFAULT_NOOP is not set 128# CONFIG_DEFAULT_NOOP is not set
129CONFIG_DEFAULT_IOSCHED="anticipatory" 129CONFIG_DEFAULT_IOSCHED="anticipatory"
130CONFIG_CLASSIC_RCU=y 130CONFIG_CLASSIC_RCU=y
131CONFIG_FREEZER=y
131 132
132# 133#
133# System Type 134# System Type
@@ -236,6 +237,7 @@ CONFIG_ARM_THUMB=y
236# CONFIG_CPU_BPREDICT_DISABLE is not set 237# CONFIG_CPU_BPREDICT_DISABLE is not set
237CONFIG_HAS_TLS_REG=y 238CONFIG_HAS_TLS_REG=y
238# CONFIG_OUTER_CACHE is not set 239# CONFIG_OUTER_CACHE is not set
240CONFIG_COMMON_CLKDEV=y
239 241
240# 242#
241# Bus support 243# Bus support
@@ -317,7 +319,12 @@ CONFIG_BINFMT_MISC=y
317# 319#
318# Power management options 320# Power management options
319# 321#
320# CONFIG_PM is not set 322CONFIG_PM=y
323# CONFIG_PM_DEBUG is not set
324CONFIG_PM_SLEEP=y
325CONFIG_SUSPEND=y
326CONFIG_SUSPEND_FREEZER=y
327# CONFIG_APM_EMULATION is not set
321CONFIG_ARCH_SUSPEND_POSSIBLE=y 328CONFIG_ARCH_SUSPEND_POSSIBLE=y
322CONFIG_NET=y 329CONFIG_NET=y
323 330
@@ -713,6 +720,7 @@ CONFIG_GPIOLIB=y
713# CONFIG_GPIO_MAX732X is not set 720# CONFIG_GPIO_MAX732X is not set
714# CONFIG_GPIO_PCA953X is not set 721# CONFIG_GPIO_PCA953X is not set
715# CONFIG_GPIO_PCF857X is not set 722# CONFIG_GPIO_PCF857X is not set
723CONFIG_GPIO_TWL4030=y
716 724
717# 725#
718# PCI GPIO expanders: 726# PCI GPIO expanders:
@@ -741,6 +749,7 @@ CONFIG_SSB_POSSIBLE=y
741# CONFIG_MFD_SM501 is not set 749# CONFIG_MFD_SM501 is not set
742# CONFIG_HTC_EGPIO is not set 750# CONFIG_HTC_EGPIO is not set
743# CONFIG_HTC_PASIC3 is not set 751# CONFIG_HTC_PASIC3 is not set
752CONFIG_TWL4030_CORE=y
744# CONFIG_UCB1400_CORE is not set 753# CONFIG_UCB1400_CORE is not set
745# CONFIG_MFD_TMIO is not set 754# CONFIG_MFD_TMIO is not set
746# CONFIG_MFD_T7L66XB is not set 755# CONFIG_MFD_T7L66XB is not set
@@ -787,7 +796,7 @@ CONFIG_DUMMY_CONSOLE=y
787CONFIG_USB_SUPPORT=y 796CONFIG_USB_SUPPORT=y
788CONFIG_USB_ARCH_HAS_HCD=y 797CONFIG_USB_ARCH_HAS_HCD=y
789CONFIG_USB_ARCH_HAS_OHCI=y 798CONFIG_USB_ARCH_HAS_OHCI=y
790# CONFIG_USB_ARCH_HAS_EHCI is not set 799CONFIG_USB_ARCH_HAS_EHCI=y
791CONFIG_USB=y 800CONFIG_USB=y
792# CONFIG_USB_DEBUG is not set 801# CONFIG_USB_DEBUG is not set
793# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set 802# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
@@ -798,7 +807,8 @@ CONFIG_USB=y
798CONFIG_USB_DEVICEFS=y 807CONFIG_USB_DEVICEFS=y
799CONFIG_USB_DEVICE_CLASS=y 808CONFIG_USB_DEVICE_CLASS=y
800# CONFIG_USB_DYNAMIC_MINORS is not set 809# CONFIG_USB_DYNAMIC_MINORS is not set
801# CONFIG_USB_OTG is not set 810CONFIG_USB_SUSPEND=y
811CONFIG_USB_OTG=y
802# CONFIG_USB_OTG_WHITELIST is not set 812# CONFIG_USB_OTG_WHITELIST is not set
803# CONFIG_USB_OTG_BLACKLIST_HUB is not set 813# CONFIG_USB_OTG_BLACKLIST_HUB is not set
804CONFIG_USB_MON=y 814CONFIG_USB_MON=y
@@ -806,6 +816,8 @@ CONFIG_USB_MON=y
806# 816#
807# USB Host Controller Drivers 817# USB Host Controller Drivers
808# 818#
819CONFIG_USB_EHCI_HCD=y
820CONFIG_USB_EHCI_ROOT_HUB_TT=y
809# CONFIG_USB_C67X00_HCD is not set 821# CONFIG_USB_C67X00_HCD is not set
810# CONFIG_USB_ISP116X_HCD is not set 822# CONFIG_USB_ISP116X_HCD is not set
811# CONFIG_USB_ISP1760_HCD is not set 823# CONFIG_USB_ISP1760_HCD is not set
@@ -818,10 +830,10 @@ CONFIG_USB_MUSB_SOC=y
818# 830#
819# OMAP 343x high speed USB support 831# OMAP 343x high speed USB support
820# 832#
821CONFIG_USB_MUSB_HOST=y 833# CONFIG_USB_MUSB_HOST is not set
822# CONFIG_USB_MUSB_PERIPHERAL is not set 834# CONFIG_USB_MUSB_PERIPHERAL is not set
823# CONFIG_USB_MUSB_OTG is not set 835CONFIG_USB_MUSB_OTG=y
824# CONFIG_USB_GADGET_MUSB_HDRC is not set 836CONFIG_USB_GADGET_MUSB_HDRC=y
825CONFIG_USB_MUSB_HDRC_HCD=y 837CONFIG_USB_MUSB_HDRC_HCD=y
826# CONFIG_MUSB_PIO_ONLY is not set 838# CONFIG_MUSB_PIO_ONLY is not set
827CONFIG_USB_INVENTRA_DMA=y 839CONFIG_USB_INVENTRA_DMA=y
@@ -887,8 +899,8 @@ CONFIG_USB_GADGET_SELECTED=y
887# CONFIG_USB_GADGET_FSL_USB2 is not set 899# CONFIG_USB_GADGET_FSL_USB2 is not set
888# CONFIG_USB_GADGET_NET2280 is not set 900# CONFIG_USB_GADGET_NET2280 is not set
889# CONFIG_USB_GADGET_PXA25X is not set 901# CONFIG_USB_GADGET_PXA25X is not set
890CONFIG_USB_GADGET_M66592=y 902# CONFIG_USB_GADGET_M66592 is not set
891CONFIG_USB_M66592=y 903# CONFIG_USB_M66592 is not set
892# CONFIG_USB_GADGET_PXA27X is not set 904# CONFIG_USB_GADGET_PXA27X is not set
893# CONFIG_USB_GADGET_GOKU is not set 905# CONFIG_USB_GADGET_GOKU is not set
894# CONFIG_USB_GADGET_LH7A40X is not set 906# CONFIG_USB_GADGET_LH7A40X is not set
@@ -906,6 +918,15 @@ CONFIG_USB_ETH_RNDIS=y
906# CONFIG_USB_MIDI_GADGET is not set 918# CONFIG_USB_MIDI_GADGET is not set
907# CONFIG_USB_G_PRINTER is not set 919# CONFIG_USB_G_PRINTER is not set
908# CONFIG_USB_CDC_COMPOSITE is not set 920# CONFIG_USB_CDC_COMPOSITE is not set
921
922#
923# OTG and related infrastructure
924#
925CONFIG_USB_OTG_UTILS=y
926# CONFIG_USB_GPIO_VBUS is not set
927# CONFIG_ISP1301_OMAP is not set
928CONFIG_TWL4030_USB=y
929# CONFIG_NOP_USB_XCEIV is not set
909CONFIG_MMC=y 930CONFIG_MMC=y
910# CONFIG_MMC_DEBUG is not set 931# CONFIG_MMC_DEBUG is not set
911# CONFIG_MMC_UNSAFE_RESUME is not set 932# CONFIG_MMC_UNSAFE_RESUME is not set
@@ -923,6 +944,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
923# 944#
924# CONFIG_MMC_SDHCI is not set 945# CONFIG_MMC_SDHCI is not set
925# CONFIG_MMC_OMAP is not set 946# CONFIG_MMC_OMAP is not set
947CONFIG_MMC_OMAP_HS=y
926# CONFIG_MEMSTICK is not set 948# CONFIG_MEMSTICK is not set
927# CONFIG_ACCESSIBILITY is not set 949# CONFIG_ACCESSIBILITY is not set
928# CONFIG_NEW_LEDS is not set 950# CONFIG_NEW_LEDS is not set
@@ -981,10 +1003,11 @@ CONFIG_RTC_INTF_DEV=y
981# 1003#
982# Voltage and Current regulators 1004# Voltage and Current regulators
983# 1005#
984# CONFIG_REGULATOR is not set 1006CONFIG_REGULATOR=y
985# CONFIG_REGULATOR_FIXED_VOLTAGE is not set 1007# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
986# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set 1008# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
987# CONFIG_REGULATOR_BQ24022 is not set 1009# CONFIG_REGULATOR_BQ24022 is not set
1010CONFIG_REGULATOR_TWL4030=y
988# CONFIG_UIO is not set 1011# CONFIG_UIO is not set
989 1012
990# 1013#
diff --git a/arch/arm/configs/omap_3430sdp_defconfig b/arch/arm/configs/omap_3430sdp_defconfig
index 8fb918d9ba65..9a510eab75a6 100644
--- a/arch/arm/configs/omap_3430sdp_defconfig
+++ b/arch/arm/configs/omap_3430sdp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc8 3# Linux kernel version: 2.6.30-omap1
4# Fri Mar 13 14:17:01 2009 4# Tue Jun 23 10:36:45 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -197,9 +197,9 @@ CONFIG_OMAP_MCBSP=y
197CONFIG_OMAP_32K_TIMER=y 197CONFIG_OMAP_32K_TIMER=y
198CONFIG_OMAP_32K_TIMER_HZ=128 198CONFIG_OMAP_32K_TIMER_HZ=128
199CONFIG_OMAP_DM_TIMER=y 199CONFIG_OMAP_DM_TIMER=y
200# CONFIG_OMAP_LL_DEBUG_UART1 is not set 200CONFIG_OMAP_LL_DEBUG_UART1=y
201# CONFIG_OMAP_LL_DEBUG_UART2 is not set 201# CONFIG_OMAP_LL_DEBUG_UART2 is not set
202CONFIG_OMAP_LL_DEBUG_UART3=y 202# CONFIG_OMAP_LL_DEBUG_UART3 is not set
203CONFIG_OMAP_SERIAL_WAKE=y 203CONFIG_OMAP_SERIAL_WAKE=y
204CONFIG_ARCH_OMAP34XX=y 204CONFIG_ARCH_OMAP34XX=y
205CONFIG_ARCH_OMAP3430=y 205CONFIG_ARCH_OMAP3430=y
@@ -207,10 +207,10 @@ CONFIG_ARCH_OMAP3430=y
207# 207#
208# OMAP Board Type 208# OMAP Board Type
209# 209#
210CONFIG_MACH_OMAP3_BEAGLE=y 210# CONFIG_MACH_OMAP3_BEAGLE is not set
211CONFIG_MACH_OMAP_LDP=y 211# CONFIG_MACH_OMAP_LDP is not set
212CONFIG_MACH_OVERO=y 212# CONFIG_MACH_OVERO is not set
213CONFIG_MACH_OMAP3_PANDORA=y 213# CONFIG_MACH_OMAP3_PANDORA is not set
214CONFIG_MACH_OMAP_3430SDP=y 214CONFIG_MACH_OMAP_3430SDP=y
215 215
216# 216#
@@ -950,7 +950,7 @@ CONFIG_SPI_OMAP24XX=y
950# CONFIG_SPI_TLE62X0 is not set 950# CONFIG_SPI_TLE62X0 is not set
951CONFIG_ARCH_REQUIRE_GPIOLIB=y 951CONFIG_ARCH_REQUIRE_GPIOLIB=y
952CONFIG_GPIOLIB=y 952CONFIG_GPIOLIB=y
953CONFIG_DEBUG_GPIO=y 953# CONFIG_DEBUG_GPIO is not set
954CONFIG_GPIO_SYSFS=y 954CONFIG_GPIO_SYSFS=y
955 955
956# 956#
@@ -1370,7 +1370,7 @@ CONFIG_SND_OMAP_SOC=y
1370CONFIG_SND_OMAP_SOC_MCBSP=y 1370CONFIG_SND_OMAP_SOC_MCBSP=y
1371# CONFIG_SND_OMAP_SOC_OVERO is not set 1371# CONFIG_SND_OMAP_SOC_OVERO is not set
1372CONFIG_SND_OMAP_SOC_SDP3430=y 1372CONFIG_SND_OMAP_SOC_SDP3430=y
1373CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y 1373# CONFIG_SND_OMAP_SOC_OMAP3_PANDORA is not set
1374CONFIG_SND_SOC_I2C_AND_SPI=y 1374CONFIG_SND_SOC_I2C_AND_SPI=y
1375# CONFIG_SND_SOC_ALL_CODECS is not set 1375# CONFIG_SND_SOC_ALL_CODECS is not set
1376CONFIG_SND_SOC_TWL4030=y 1376CONFIG_SND_SOC_TWL4030=y
diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig
index 213fe9c5eaae..f1739fae7ed4 100644
--- a/arch/arm/configs/omap_zoom2_defconfig
+++ b/arch/arm/configs/omap_zoom2_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc5 3# Linux kernel version: 2.6.30-omap1
4# Fri Oct 10 11:49:41 2008 4# Fri Jun 12 17:25:46 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
28CONFIG_VECTORS_BASE=0xffff0000 26CONFIG_VECTORS_BASE=0xffff0000
29CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -39,44 +37,61 @@ CONFIG_LOCALVERSION_AUTO=y
39CONFIG_SWAP=y 37CONFIG_SWAP=y
40CONFIG_SYSVIPC=y 38CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y 39CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_POSIX_MQUEUE is not set
42CONFIG_BSD_PROCESS_ACCT=y 41CONFIG_BSD_PROCESS_ACCT=y
43# CONFIG_BSD_PROCESS_ACCT_V3 is not set 42# CONFIG_BSD_PROCESS_ACCT_V3 is not set
43# CONFIG_TASKSTATS is not set
44# CONFIG_AUDIT is not set
45
46#
47# RCU Subsystem
48#
49CONFIG_CLASSIC_RCU=y
50# CONFIG_TREE_RCU is not set
51# CONFIG_PREEMPT_RCU is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_PREEMPT_RCU_TRACE is not set
44# CONFIG_IKCONFIG is not set 54# CONFIG_IKCONFIG is not set
45CONFIG_LOG_BUF_SHIFT=14 55CONFIG_LOG_BUF_SHIFT=14
46# CONFIG_CGROUPS is not set
47CONFIG_GROUP_SCHED=y 56CONFIG_GROUP_SCHED=y
48CONFIG_FAIR_GROUP_SCHED=y 57CONFIG_FAIR_GROUP_SCHED=y
49# CONFIG_RT_GROUP_SCHED is not set 58# CONFIG_RT_GROUP_SCHED is not set
50CONFIG_USER_SCHED=y 59CONFIG_USER_SCHED=y
51# CONFIG_CGROUP_SCHED is not set 60# CONFIG_CGROUP_SCHED is not set
61# CONFIG_CGROUPS is not set
52CONFIG_SYSFS_DEPRECATED=y 62CONFIG_SYSFS_DEPRECATED=y
53CONFIG_SYSFS_DEPRECATED_V2=y 63CONFIG_SYSFS_DEPRECATED_V2=y
54# CONFIG_RELAY is not set 64# CONFIG_RELAY is not set
55# CONFIG_NAMESPACES is not set 65# CONFIG_NAMESPACES is not set
56CONFIG_BLK_DEV_INITRD=y 66CONFIG_BLK_DEV_INITRD=y
57CONFIG_INITRAMFS_SOURCE="" 67CONFIG_INITRAMFS_SOURCE=""
68CONFIG_RD_GZIP=y
69# CONFIG_RD_BZIP2 is not set
70# CONFIG_RD_LZMA is not set
58CONFIG_CC_OPTIMIZE_FOR_SIZE=y 71CONFIG_CC_OPTIMIZE_FOR_SIZE=y
59CONFIG_SYSCTL=y 72CONFIG_SYSCTL=y
73CONFIG_ANON_INODES=y
60CONFIG_EMBEDDED=y 74CONFIG_EMBEDDED=y
61CONFIG_UID16=y 75CONFIG_UID16=y
62# CONFIG_SYSCTL_SYSCALL is not set 76# CONFIG_SYSCTL_SYSCALL is not set
63CONFIG_KALLSYMS=y 77CONFIG_KALLSYMS=y
64# CONFIG_KALLSYMS_ALL is not set 78# CONFIG_KALLSYMS_ALL is not set
65CONFIG_KALLSYMS_EXTRA_PASS=y 79CONFIG_KALLSYMS_EXTRA_PASS=y
80# CONFIG_STRIP_ASM_SYMS is not set
66CONFIG_HOTPLUG=y 81CONFIG_HOTPLUG=y
67CONFIG_PRINTK=y 82CONFIG_PRINTK=y
68CONFIG_BUG=y 83CONFIG_BUG=y
69CONFIG_ELF_CORE=y 84CONFIG_ELF_CORE=y
70CONFIG_COMPAT_BRK=y
71CONFIG_BASE_FULL=y 85CONFIG_BASE_FULL=y
72CONFIG_FUTEX=y 86CONFIG_FUTEX=y
73CONFIG_ANON_INODES=y
74CONFIG_EPOLL=y 87CONFIG_EPOLL=y
75CONFIG_SIGNALFD=y 88CONFIG_SIGNALFD=y
76CONFIG_TIMERFD=y 89CONFIG_TIMERFD=y
77CONFIG_EVENTFD=y 90CONFIG_EVENTFD=y
78CONFIG_SHMEM=y 91CONFIG_SHMEM=y
92CONFIG_AIO=y
79CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
94CONFIG_COMPAT_BRK=y
80CONFIG_SLAB=y 95CONFIG_SLAB=y
81# CONFIG_SLUB is not set 96# CONFIG_SLUB is not set
82# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
@@ -84,19 +99,13 @@ CONFIG_SLAB=y
84# CONFIG_MARKERS is not set 99# CONFIG_MARKERS is not set
85CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
86# CONFIG_KPROBES is not set 101# CONFIG_KPROBES is not set
87# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
88# CONFIG_HAVE_IOREMAP_PROT is not set
89CONFIG_HAVE_KPROBES=y 102CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y 103CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_ARCH_TRACEHOOK is not set
92# CONFIG_HAVE_DMA_ATTRS is not set
93# CONFIG_USE_GENERIC_SMP_HELPERS is not set
94CONFIG_HAVE_CLK=y 104CONFIG_HAVE_CLK=y
95CONFIG_PROC_PAGE_MONITOR=y 105# CONFIG_SLOW_WORK is not set
96CONFIG_HAVE_GENERIC_DMA_COHERENT=y 106CONFIG_HAVE_GENERIC_DMA_COHERENT=y
97CONFIG_SLABINFO=y 107CONFIG_SLABINFO=y
98CONFIG_RT_MUTEXES=y 108CONFIG_RT_MUTEXES=y
99# CONFIG_TINY_SHMEM is not set
100CONFIG_BASE_SMALL=0 109CONFIG_BASE_SMALL=0
101CONFIG_MODULES=y 110CONFIG_MODULES=y
102# CONFIG_MODULE_FORCE_LOAD is not set 111# CONFIG_MODULE_FORCE_LOAD is not set
@@ -104,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
104# CONFIG_MODULE_FORCE_UNLOAD is not set 113# CONFIG_MODULE_FORCE_UNLOAD is not set
105CONFIG_MODVERSIONS=y 114CONFIG_MODVERSIONS=y
106CONFIG_MODULE_SRCVERSION_ALL=y 115CONFIG_MODULE_SRCVERSION_ALL=y
107CONFIG_KMOD=y
108CONFIG_BLOCK=y 116CONFIG_BLOCK=y
109# CONFIG_LBD is not set 117# CONFIG_LBD is not set
110# CONFIG_BLK_DEV_IO_TRACE is not set
111# CONFIG_LSF is not set
112# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
113# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
114 120
@@ -124,7 +130,7 @@ CONFIG_DEFAULT_AS=y
124# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
125# CONFIG_DEFAULT_NOOP is not set 131# CONFIG_DEFAULT_NOOP is not set
126CONFIG_DEFAULT_IOSCHED="anticipatory" 132CONFIG_DEFAULT_IOSCHED="anticipatory"
127CONFIG_CLASSIC_RCU=y 133CONFIG_FREEZER=y
128 134
129# 135#
130# System Type 136# System Type
@@ -134,10 +140,10 @@ CONFIG_CLASSIC_RCU=y
134# CONFIG_ARCH_REALVIEW is not set 140# CONFIG_ARCH_REALVIEW is not set
135# CONFIG_ARCH_VERSATILE is not set 141# CONFIG_ARCH_VERSATILE is not set
136# CONFIG_ARCH_AT91 is not set 142# CONFIG_ARCH_AT91 is not set
137# CONFIG_ARCH_CLPS7500 is not set
138# CONFIG_ARCH_CLPS711X is not set 143# CONFIG_ARCH_CLPS711X is not set
139# CONFIG_ARCH_EBSA110 is not set 144# CONFIG_ARCH_EBSA110 is not set
140# CONFIG_ARCH_EP93XX is not set 145# CONFIG_ARCH_EP93XX is not set
146# CONFIG_ARCH_GEMINI is not set
141# CONFIG_ARCH_FOOTBRIDGE is not set 147# CONFIG_ARCH_FOOTBRIDGE is not set
142# CONFIG_ARCH_NETX is not set 148# CONFIG_ARCH_NETX is not set
143# CONFIG_ARCH_H720X is not set 149# CONFIG_ARCH_H720X is not set
@@ -158,14 +164,17 @@ CONFIG_CLASSIC_RCU=y
158# CONFIG_ARCH_ORION5X is not set 164# CONFIG_ARCH_ORION5X is not set
159# CONFIG_ARCH_PNX4008 is not set 165# CONFIG_ARCH_PNX4008 is not set
160# CONFIG_ARCH_PXA is not set 166# CONFIG_ARCH_PXA is not set
167# CONFIG_ARCH_MMP is not set
161# CONFIG_ARCH_RPC is not set 168# CONFIG_ARCH_RPC is not set
162# CONFIG_ARCH_SA1100 is not set 169# CONFIG_ARCH_SA1100 is not set
163# CONFIG_ARCH_S3C2410 is not set 170# CONFIG_ARCH_S3C2410 is not set
171# CONFIG_ARCH_S3C64XX is not set
164# CONFIG_ARCH_SHARK is not set 172# CONFIG_ARCH_SHARK is not set
165# CONFIG_ARCH_LH7A40X is not set 173# CONFIG_ARCH_LH7A40X is not set
166# CONFIG_ARCH_DAVINCI is not set 174# CONFIG_ARCH_DAVINCI is not set
167CONFIG_ARCH_OMAP=y 175CONFIG_ARCH_OMAP=y
168# CONFIG_ARCH_MSM7X00A is not set 176# CONFIG_ARCH_MSM is not set
177# CONFIG_ARCH_W90X900 is not set
169 178
170# 179#
171# TI OMAP Implementations 180# TI OMAP Implementations
@@ -174,6 +183,7 @@ CONFIG_ARCH_OMAP_OTG=y
174# CONFIG_ARCH_OMAP1 is not set 183# CONFIG_ARCH_OMAP1 is not set
175# CONFIG_ARCH_OMAP2 is not set 184# CONFIG_ARCH_OMAP2 is not set
176CONFIG_ARCH_OMAP3=y 185CONFIG_ARCH_OMAP3=y
186# CONFIG_ARCH_OMAP4 is not set
177 187
178# 188#
179# OMAP Feature Selections 189# OMAP Feature Selections
@@ -185,6 +195,7 @@ CONFIG_OMAP_MUX=y
185CONFIG_OMAP_MUX_DEBUG=y 195CONFIG_OMAP_MUX_DEBUG=y
186CONFIG_OMAP_MUX_WARNINGS=y 196CONFIG_OMAP_MUX_WARNINGS=y
187CONFIG_OMAP_MCBSP=y 197CONFIG_OMAP_MCBSP=y
198# CONFIG_OMAP_MBOX_FWK is not set
188# CONFIG_OMAP_MPU_TIMER is not set 199# CONFIG_OMAP_MPU_TIMER is not set
189CONFIG_OMAP_32K_TIMER=y 200CONFIG_OMAP_32K_TIMER=y
190CONFIG_OMAP_32K_TIMER_HZ=128 201CONFIG_OMAP_32K_TIMER_HZ=128
@@ -192,25 +203,20 @@ CONFIG_OMAP_DM_TIMER=y
192# CONFIG_OMAP_LL_DEBUG_UART1 is not set 203# CONFIG_OMAP_LL_DEBUG_UART1 is not set
193# CONFIG_OMAP_LL_DEBUG_UART2 is not set 204# CONFIG_OMAP_LL_DEBUG_UART2 is not set
194CONFIG_OMAP_LL_DEBUG_UART3=y 205CONFIG_OMAP_LL_DEBUG_UART3=y
195CONFIG_OMAP_SERIAL_WAKE=y
196CONFIG_ARCH_OMAP34XX=y 206CONFIG_ARCH_OMAP34XX=y
197CONFIG_ARCH_OMAP3430=y 207CONFIG_ARCH_OMAP3430=y
198 208
199# 209#
200# OMAP Board Type 210# OMAP Board Type
201# 211#
202# CONFIG_MACH_OMAP3_BEAGLE is not set 212# CONFIG_MACH_NOKIA_RX51 is not set
203# CONFIG_MACH_OMAP_LDP is not set 213# CONFIG_MACH_OMAP_LDP is not set
204CONFIG_MACH_OMAP_ZOOM2=y 214# CONFIG_MACH_OMAP_3430SDP is not set
215# CONFIG_MACH_OMAP3EVM is not set
216# CONFIG_MACH_OMAP3_BEAGLE is not set
205# CONFIG_MACH_OVERO is not set 217# CONFIG_MACH_OVERO is not set
206 218# CONFIG_MACH_OMAP3_PANDORA is not set
207# 219CONFIG_MACH_OMAP_ZOOM2=y
208# Boot options
209#
210
211#
212# Power management
213#
214 220
215# 221#
216# Processor Type 222# Processor Type
@@ -239,6 +245,10 @@ CONFIG_ARM_THUMB=y
239# CONFIG_CPU_BPREDICT_DISABLE is not set 245# CONFIG_CPU_BPREDICT_DISABLE is not set
240CONFIG_HAS_TLS_REG=y 246CONFIG_HAS_TLS_REG=y
241# CONFIG_OUTER_CACHE is not set 247# CONFIG_OUTER_CACHE is not set
248# CONFIG_ARM_ERRATA_430973 is not set
249# CONFIG_ARM_ERRATA_458693 is not set
250# CONFIG_ARM_ERRATA_460075 is not set
251CONFIG_COMMON_CLKDEV=y
242 252
243# 253#
244# Bus support 254# Bus support
@@ -254,26 +264,32 @@ CONFIG_TICK_ONESHOT=y
254CONFIG_NO_HZ=y 264CONFIG_NO_HZ=y
255CONFIG_HIGH_RES_TIMERS=y 265CONFIG_HIGH_RES_TIMERS=y
256CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 266CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
267CONFIG_VMSPLIT_3G=y
268# CONFIG_VMSPLIT_2G is not set
269# CONFIG_VMSPLIT_1G is not set
270CONFIG_PAGE_OFFSET=0xC0000000
257# CONFIG_PREEMPT is not set 271# CONFIG_PREEMPT is not set
258CONFIG_HZ=128 272CONFIG_HZ=128
259CONFIG_AEABI=y 273CONFIG_AEABI=y
260CONFIG_OABI_COMPAT=y 274CONFIG_OABI_COMPAT=y
261CONFIG_ARCH_FLATMEM_HAS_HOLES=y 275# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
262# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 276# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
277# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
278# CONFIG_HIGHMEM is not set
263CONFIG_SELECT_MEMORY_MODEL=y 279CONFIG_SELECT_MEMORY_MODEL=y
264CONFIG_FLATMEM_MANUAL=y 280CONFIG_FLATMEM_MANUAL=y
265# CONFIG_DISCONTIGMEM_MANUAL is not set 281# CONFIG_DISCONTIGMEM_MANUAL is not set
266# CONFIG_SPARSEMEM_MANUAL is not set 282# CONFIG_SPARSEMEM_MANUAL is not set
267CONFIG_FLATMEM=y 283CONFIG_FLATMEM=y
268CONFIG_FLAT_NODE_MEM_MAP=y 284CONFIG_FLAT_NODE_MEM_MAP=y
269# CONFIG_SPARSEMEM_STATIC is not set
270# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
271CONFIG_PAGEFLAGS_EXTENDED=y 285CONFIG_PAGEFLAGS_EXTENDED=y
272CONFIG_SPLIT_PTLOCK_CPUS=4 286CONFIG_SPLIT_PTLOCK_CPUS=4
273# CONFIG_RESOURCES_64BIT is not set 287# CONFIG_PHYS_ADDR_T_64BIT is not set
274CONFIG_ZONE_DMA_FLAG=1 288CONFIG_ZONE_DMA_FLAG=0
275CONFIG_BOUNCE=y
276CONFIG_VIRT_TO_BUS=y 289CONFIG_VIRT_TO_BUS=y
290CONFIG_UNEVICTABLE_LRU=y
291CONFIG_HAVE_MLOCK=y
292CONFIG_HAVE_MLOCKED_PAGE_BIT=y
277# CONFIG_LEDS is not set 293# CONFIG_LEDS is not set
278CONFIG_ALIGNMENT_TRAP=y 294CONFIG_ALIGNMENT_TRAP=y
279 295
@@ -287,9 +303,10 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.16
287# CONFIG_KEXEC is not set 303# CONFIG_KEXEC is not set
288 304
289# 305#
290# CPU Frequency scaling 306# CPU Power Management
291# 307#
292# CONFIG_CPU_FREQ is not set 308# CONFIG_CPU_FREQ is not set
309# CONFIG_CPU_IDLE is not set
293 310
294# 311#
295# Floating point emulation 312# Floating point emulation
@@ -309,13 +326,23 @@ CONFIG_VFPv3=y
309# Userspace binary formats 326# Userspace binary formats
310# 327#
311CONFIG_BINFMT_ELF=y 328CONFIG_BINFMT_ELF=y
329# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
330CONFIG_HAVE_AOUT=y
312# CONFIG_BINFMT_AOUT is not set 331# CONFIG_BINFMT_AOUT is not set
313CONFIG_BINFMT_MISC=y 332CONFIG_BINFMT_MISC=y
314 333
315# 334#
316# Power management options 335# Power management options
317# 336#
318# CONFIG_PM is not set 337CONFIG_PM=y
338CONFIG_PM_DEBUG=y
339CONFIG_PM_VERBOSE=y
340CONFIG_CAN_PM_TRACE=y
341CONFIG_PM_SLEEP=y
342CONFIG_SUSPEND=y
343# CONFIG_PM_TEST_SUSPEND is not set
344CONFIG_SUSPEND_FREEZER=y
345# CONFIG_APM_EMULATION is not set
319CONFIG_ARCH_SUSPEND_POSSIBLE=y 346CONFIG_ARCH_SUSPEND_POSSIBLE=y
320CONFIG_NET=y 347CONFIG_NET=y
321 348
@@ -378,7 +405,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
378# CONFIG_LAPB is not set 405# CONFIG_LAPB is not set
379# CONFIG_ECONET is not set 406# CONFIG_ECONET is not set
380# CONFIG_WAN_ROUTER is not set 407# CONFIG_WAN_ROUTER is not set
408# CONFIG_PHONET is not set
381# CONFIG_NET_SCHED is not set 409# CONFIG_NET_SCHED is not set
410# CONFIG_DCB is not set
382 411
383# 412#
384# Network testing 413# Network testing
@@ -389,8 +418,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
389# CONFIG_IRDA is not set 418# CONFIG_IRDA is not set
390# CONFIG_BT is not set 419# CONFIG_BT is not set
391# CONFIG_AF_RXRPC is not set 420# CONFIG_AF_RXRPC is not set
392# CONFIG_PHONET is not set
393# CONFIG_WIRELESS is not set 421# CONFIG_WIRELESS is not set
422# CONFIG_WIMAX is not set
394# CONFIG_RFKILL is not set 423# CONFIG_RFKILL is not set
395# CONFIG_NET_9P is not set 424# CONFIG_NET_9P is not set
396 425
@@ -416,14 +445,28 @@ CONFIG_BLK_DEV=y
416# CONFIG_BLK_DEV_COW_COMMON is not set 445# CONFIG_BLK_DEV_COW_COMMON is not set
417CONFIG_BLK_DEV_LOOP=y 446CONFIG_BLK_DEV_LOOP=y
418# CONFIG_BLK_DEV_CRYPTOLOOP is not set 447# CONFIG_BLK_DEV_CRYPTOLOOP is not set
448# CONFIG_BLK_DEV_NBD is not set
449# CONFIG_BLK_DEV_UB is not set
419CONFIG_BLK_DEV_RAM=y 450CONFIG_BLK_DEV_RAM=y
420CONFIG_BLK_DEV_RAM_COUNT=16 451CONFIG_BLK_DEV_RAM_COUNT=16
421CONFIG_BLK_DEV_RAM_SIZE=16384 452CONFIG_BLK_DEV_RAM_SIZE=16384
422# CONFIG_BLK_DEV_XIP is not set 453# CONFIG_BLK_DEV_XIP is not set
423# CONFIG_CDROM_PKTCDVD is not set 454# CONFIG_CDROM_PKTCDVD is not set
455# CONFIG_ATA_OVER_ETH is not set
424CONFIG_MISC_DEVICES=y 456CONFIG_MISC_DEVICES=y
425# CONFIG_EEPROM_93CX6 is not set 457# CONFIG_ICS932S401 is not set
458# CONFIG_OMAP_STI is not set
426# CONFIG_ENCLOSURE_SERVICES is not set 459# CONFIG_ENCLOSURE_SERVICES is not set
460# CONFIG_ISL29003 is not set
461# CONFIG_C2PORT is not set
462
463#
464# EEPROM support
465#
466# CONFIG_EEPROM_AT24 is not set
467# CONFIG_EEPROM_AT25 is not set
468# CONFIG_EEPROM_LEGACY is not set
469# CONFIG_EEPROM_93CX6 is not set
427CONFIG_HAVE_IDE=y 470CONFIG_HAVE_IDE=y
428# CONFIG_IDE is not set 471# CONFIG_IDE is not set
429 472
@@ -461,14 +504,20 @@ CONFIG_SCSI_WAIT_SCAN=m
461# 504#
462# CONFIG_SCSI_SPI_ATTRS is not set 505# CONFIG_SCSI_SPI_ATTRS is not set
463# CONFIG_SCSI_FC_ATTRS is not set 506# CONFIG_SCSI_FC_ATTRS is not set
507# CONFIG_SCSI_ISCSI_ATTRS is not set
464# CONFIG_SCSI_SAS_LIBSAS is not set 508# CONFIG_SCSI_SAS_LIBSAS is not set
465# CONFIG_SCSI_SRP_ATTRS is not set 509# CONFIG_SCSI_SRP_ATTRS is not set
466CONFIG_SCSI_LOWLEVEL=y 510CONFIG_SCSI_LOWLEVEL=y
511# CONFIG_ISCSI_TCP is not set
512# CONFIG_LIBFC is not set
513# CONFIG_LIBFCOE is not set
467# CONFIG_SCSI_DEBUG is not set 514# CONFIG_SCSI_DEBUG is not set
468# CONFIG_SCSI_DH is not set 515# CONFIG_SCSI_DH is not set
516# CONFIG_SCSI_OSD_INITIATOR is not set
469# CONFIG_ATA is not set 517# CONFIG_ATA is not set
470# CONFIG_MD is not set 518# CONFIG_MD is not set
471CONFIG_NETDEVICES=y 519CONFIG_NETDEVICES=y
520CONFIG_COMPAT_NET_DEV_OPS=y
472# CONFIG_DUMMY is not set 521# CONFIG_DUMMY is not set
473# CONFIG_BONDING is not set 522# CONFIG_BONDING is not set
474# CONFIG_MACVLAN is not set 523# CONFIG_MACVLAN is not set
@@ -501,8 +550,10 @@ CONFIG_MII=y
501# CONFIG_SMC91X is not set 550# CONFIG_SMC91X is not set
502# CONFIG_DM9000 is not set 551# CONFIG_DM9000 is not set
503# CONFIG_ENC28J60 is not set 552# CONFIG_ENC28J60 is not set
553# CONFIG_ETHOC is not set
504# CONFIG_SMC911X is not set 554# CONFIG_SMC911X is not set
505CONFIG_SMSC911X=y 555CONFIG_SMSC911X=y
556# CONFIG_DNET is not set
506# CONFIG_IBM_NEW_EMAC_ZMII is not set 557# CONFIG_IBM_NEW_EMAC_ZMII is not set
507# CONFIG_IBM_NEW_EMAC_RGMII is not set 558# CONFIG_IBM_NEW_EMAC_RGMII is not set
508# CONFIG_IBM_NEW_EMAC_TAH is not set 559# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -519,7 +570,10 @@ CONFIG_NETDEV_10000=y
519# 570#
520# CONFIG_WLAN_PRE80211 is not set 571# CONFIG_WLAN_PRE80211 is not set
521# CONFIG_WLAN_80211 is not set 572# CONFIG_WLAN_80211 is not set
522# CONFIG_IWLWIFI_LEDS is not set 573
574#
575# Enable WiMAX (Networking options) to see the WiMAX drivers
576#
523 577
524# 578#
525# USB Network Adapters 579# USB Network Adapters
@@ -561,17 +615,25 @@ CONFIG_INPUT_EVDEV=y
561# CONFIG_INPUT_TABLET is not set 615# CONFIG_INPUT_TABLET is not set
562CONFIG_INPUT_TOUCHSCREEN=y 616CONFIG_INPUT_TOUCHSCREEN=y
563CONFIG_TOUCHSCREEN_ADS7846=y 617CONFIG_TOUCHSCREEN_ADS7846=y
618# CONFIG_TOUCHSCREEN_AD7877 is not set
619# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
620# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
621# CONFIG_TOUCHSCREEN_AD7879 is not set
564# CONFIG_TOUCHSCREEN_FUJITSU is not set 622# CONFIG_TOUCHSCREEN_FUJITSU is not set
565# CONFIG_TOUCHSCREEN_GUNZE is not set 623# CONFIG_TOUCHSCREEN_GUNZE is not set
566# CONFIG_TOUCHSCREEN_ELO is not set 624# CONFIG_TOUCHSCREEN_ELO is not set
625# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
567# CONFIG_TOUCHSCREEN_MTOUCH is not set 626# CONFIG_TOUCHSCREEN_MTOUCH is not set
568# CONFIG_TOUCHSCREEN_INEXIO is not set 627# CONFIG_TOUCHSCREEN_INEXIO is not set
569# CONFIG_TOUCHSCREEN_MK712 is not set 628# CONFIG_TOUCHSCREEN_MK712 is not set
570# CONFIG_TOUCHSCREEN_PENMOUNT is not set 629# CONFIG_TOUCHSCREEN_PENMOUNT is not set
571# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 630# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
572# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 631# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
573# CONFIG_TOUCHSCREEN_UCB1400 is not set 632# CONFIG_TOUCHSCREEN_TSC2005 is not set
633# CONFIG_TOUCHSCREEN_TSC210X is not set
634# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
574# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 635# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
636# CONFIG_TOUCHSCREEN_TSC2007 is not set
575# CONFIG_INPUT_MISC is not set 637# CONFIG_INPUT_MISC is not set
576 638
577# 639#
@@ -607,13 +669,15 @@ CONFIG_SERIAL_8250_RSA=y
607# 669#
608# Non-8250 serial port support 670# Non-8250 serial port support
609# 671#
672# CONFIG_SERIAL_MAX3100 is not set
610CONFIG_SERIAL_CORE=y 673CONFIG_SERIAL_CORE=y
611CONFIG_SERIAL_CORE_CONSOLE=y 674CONFIG_SERIAL_CORE_CONSOLE=y
612CONFIG_UNIX98_PTYS=y 675CONFIG_UNIX98_PTYS=y
676# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
613# CONFIG_LEGACY_PTYS is not set 677# CONFIG_LEGACY_PTYS is not set
614# CONFIG_IPMI_HANDLER is not set 678# CONFIG_IPMI_HANDLER is not set
615CONFIG_HW_RANDOM=y 679CONFIG_HW_RANDOM=y
616# CONFIG_NVRAM is not set 680# CONFIG_HW_RANDOM_TIMERIOMEM is not set
617# CONFIG_R3964 is not set 681# CONFIG_R3964 is not set
618# CONFIG_RAW_DRIVER is not set 682# CONFIG_RAW_DRIVER is not set
619# CONFIG_TCG_TPM is not set 683# CONFIG_TCG_TPM is not set
@@ -639,6 +703,7 @@ CONFIG_I2C_OMAP=y
639# 703#
640# CONFIG_I2C_PARPORT_LIGHT is not set 704# CONFIG_I2C_PARPORT_LIGHT is not set
641# CONFIG_I2C_TAOS_EVM is not set 705# CONFIG_I2C_TAOS_EVM is not set
706# CONFIG_I2C_TINY_USB is not set
642 707
643# 708#
644# Other I2C/SMBus bus drivers 709# Other I2C/SMBus bus drivers
@@ -650,14 +715,11 @@ CONFIG_I2C_OMAP=y
650# Miscellaneous I2C Chip support 715# Miscellaneous I2C Chip support
651# 716#
652# CONFIG_DS1682 is not set 717# CONFIG_DS1682 is not set
653# CONFIG_EEPROM_AT24 is not set
654# CONFIG_EEPROM_LEGACY is not set
655# CONFIG_SENSORS_PCF8574 is not set 718# CONFIG_SENSORS_PCF8574 is not set
656# CONFIG_PCF8575 is not set 719# CONFIG_PCF8575 is not set
657# CONFIG_SENSORS_PCA9539 is not set 720# CONFIG_SENSORS_PCA9539 is not set
658# CONFIG_SENSORS_PCF8591 is not set 721# CONFIG_TWL4030_MADC is not set
659# CONFIG_ISP1301_OMAP is not set 722# CONFIG_TWL4030_POWEROFF is not set
660# CONFIG_TPS65010 is not set
661# CONFIG_SENSORS_MAX6875 is not set 723# CONFIG_SENSORS_MAX6875 is not set
662# CONFIG_SENSORS_TSL2550 is not set 724# CONFIG_SENSORS_TSL2550 is not set
663# CONFIG_I2C_DEBUG_CORE is not set 725# CONFIG_I2C_DEBUG_CORE is not set
@@ -672,12 +734,12 @@ CONFIG_SPI_MASTER=y
672# SPI Master Controller Drivers 734# SPI Master Controller Drivers
673# 735#
674# CONFIG_SPI_BITBANG is not set 736# CONFIG_SPI_BITBANG is not set
737# CONFIG_SPI_GPIO is not set
675CONFIG_SPI_OMAP24XX=y 738CONFIG_SPI_OMAP24XX=y
676 739
677# 740#
678# SPI Protocol Masters 741# SPI Protocol Masters
679# 742#
680# CONFIG_EEPROM_AT25 is not set
681# CONFIG_SPI_SPIDEV is not set 743# CONFIG_SPI_SPIDEV is not set
682# CONFIG_SPI_TLE62X0 is not set 744# CONFIG_SPI_TLE62X0 is not set
683CONFIG_ARCH_REQUIRE_GPIOLIB=y 745CONFIG_ARCH_REQUIRE_GPIOLIB=y
@@ -686,11 +748,16 @@ CONFIG_GPIOLIB=y
686# CONFIG_GPIO_SYSFS is not set 748# CONFIG_GPIO_SYSFS is not set
687 749
688# 750#
751# Memory mapped GPIO expanders:
752#
753
754#
689# I2C GPIO expanders: 755# I2C GPIO expanders:
690# 756#
691# CONFIG_GPIO_MAX732X is not set 757# CONFIG_GPIO_MAX732X is not set
692# CONFIG_GPIO_PCA953X is not set 758# CONFIG_GPIO_PCA953X is not set
693# CONFIG_GPIO_PCF857X is not set 759# CONFIG_GPIO_PCF857X is not set
760CONFIG_GPIO_TWL4030=y
694 761
695# 762#
696# PCI GPIO expanders: 763# PCI GPIO expanders:
@@ -702,26 +769,34 @@ CONFIG_GPIOLIB=y
702# CONFIG_GPIO_MAX7301 is not set 769# CONFIG_GPIO_MAX7301 is not set
703# CONFIG_GPIO_MCP23S08 is not set 770# CONFIG_GPIO_MCP23S08 is not set
704CONFIG_W1=y 771CONFIG_W1=y
772CONFIG_W1_CON=y
705 773
706# 774#
707# 1-wire Bus Masters 775# 1-wire Bus Masters
708# 776#
777# CONFIG_W1_MASTER_DS2490 is not set
709# CONFIG_W1_MASTER_DS2482 is not set 778# CONFIG_W1_MASTER_DS2482 is not set
710# CONFIG_W1_MASTER_DS1WM is not set 779# CONFIG_W1_MASTER_DS1WM is not set
711# CONFIG_W1_MASTER_GPIO is not set 780# CONFIG_W1_MASTER_GPIO is not set
781# CONFIG_HDQ_MASTER_OMAP is not set
712 782
713# 783#
714# 1-wire Slaves 784# 1-wire Slaves
715# 785#
716# CONFIG_W1_SLAVE_THERM is not set 786# CONFIG_W1_SLAVE_THERM is not set
717# CONFIG_W1_SLAVE_SMEM is not set 787# CONFIG_W1_SLAVE_SMEM is not set
788# CONFIG_W1_SLAVE_DS2431 is not set
718# CONFIG_W1_SLAVE_DS2433 is not set 789# CONFIG_W1_SLAVE_DS2433 is not set
719# CONFIG_W1_SLAVE_DS2760 is not set 790# CONFIG_W1_SLAVE_DS2760 is not set
791# CONFIG_W1_SLAVE_BQ27000 is not set
720CONFIG_POWER_SUPPLY=y 792CONFIG_POWER_SUPPLY=y
721# CONFIG_POWER_SUPPLY_DEBUG is not set 793# CONFIG_POWER_SUPPLY_DEBUG is not set
722# CONFIG_PDA_POWER is not set 794# CONFIG_PDA_POWER is not set
723# CONFIG_BATTERY_DS2760 is not set 795# CONFIG_BATTERY_DS2760 is not set
796# CONFIG_BATTERY_BQ27x00 is not set
724# CONFIG_HWMON is not set 797# CONFIG_HWMON is not set
798# CONFIG_THERMAL is not set
799# CONFIG_THERMAL_HWMON is not set
725CONFIG_WATCHDOG=y 800CONFIG_WATCHDOG=y
726CONFIG_WATCHDOG_NOWAYOUT=y 801CONFIG_WATCHDOG_NOWAYOUT=y
727 802
@@ -729,11 +804,17 @@ CONFIG_WATCHDOG_NOWAYOUT=y
729# Watchdog Device Drivers 804# Watchdog Device Drivers
730# 805#
731# CONFIG_SOFT_WATCHDOG is not set 806# CONFIG_SOFT_WATCHDOG is not set
807# CONFIG_OMAP_WATCHDOG is not set
732 808
733# 809#
734# Sonics Silicon Backplane 810# USB-based Watchdog Cards
735# 811#
812# CONFIG_USBPCWATCHDOG is not set
736CONFIG_SSB_POSSIBLE=y 813CONFIG_SSB_POSSIBLE=y
814
815#
816# Sonics Silicon Backplane
817#
737# CONFIG_SSB is not set 818# CONFIG_SSB is not set
738 819
739# 820#
@@ -741,12 +822,19 @@ CONFIG_SSB_POSSIBLE=y
741# 822#
742# CONFIG_MFD_CORE is not set 823# CONFIG_MFD_CORE is not set
743# CONFIG_MFD_SM501 is not set 824# CONFIG_MFD_SM501 is not set
825# CONFIG_MFD_ASIC3 is not set
744# CONFIG_HTC_EGPIO is not set 826# CONFIG_HTC_EGPIO is not set
745# CONFIG_HTC_PASIC3 is not set 827# CONFIG_HTC_PASIC3 is not set
828# CONFIG_TPS65010 is not set
829CONFIG_TWL4030_CORE=y
746# CONFIG_MFD_TMIO is not set 830# CONFIG_MFD_TMIO is not set
747# CONFIG_MFD_T7L66XB is not set 831# CONFIG_MFD_T7L66XB is not set
748# CONFIG_MFD_TC6387XB is not set 832# CONFIG_MFD_TC6387XB is not set
749# CONFIG_MFD_TC6393XB is not set 833# CONFIG_MFD_TC6393XB is not set
834# CONFIG_PMIC_DA903X is not set
835# CONFIG_MFD_WM8400 is not set
836# CONFIG_MFD_WM8350_I2C is not set
837# CONFIG_MFD_PCF50633 is not set
750 838
751# 839#
752# Multimedia devices 840# Multimedia devices
@@ -756,12 +844,14 @@ CONFIG_SSB_POSSIBLE=y
756# Multimedia core support 844# Multimedia core support
757# 845#
758# CONFIG_VIDEO_DEV is not set 846# CONFIG_VIDEO_DEV is not set
847# CONFIG_DVB_CORE is not set
759# CONFIG_VIDEO_MEDIA is not set 848# CONFIG_VIDEO_MEDIA is not set
760 849
761# 850#
762# Multimedia drivers 851# Multimedia drivers
763# 852#
764CONFIG_DAB=y 853CONFIG_DAB=y
854# CONFIG_USB_DABUSB is not set
765 855
766# 856#
767# Graphics support 857# Graphics support
@@ -782,10 +872,12 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
782# CONFIG_VGA_CONSOLE is not set 872# CONFIG_VGA_CONSOLE is not set
783CONFIG_DUMMY_CONSOLE=y 873CONFIG_DUMMY_CONSOLE=y
784CONFIG_SOUND=y 874CONFIG_SOUND=y
875# CONFIG_SOUND_OSS_CORE is not set
785CONFIG_SND=y 876CONFIG_SND=y
786# CONFIG_SND_SEQUENCER is not set 877# CONFIG_SND_SEQUENCER is not set
787# CONFIG_SND_MIXER_OSS is not set 878# CONFIG_SND_MIXER_OSS is not set
788# CONFIG_SND_PCM_OSS is not set 879# CONFIG_SND_PCM_OSS is not set
880# CONFIG_SND_HRTIMER is not set
789# CONFIG_SND_DYNAMIC_MINORS is not set 881# CONFIG_SND_DYNAMIC_MINORS is not set
790CONFIG_SND_SUPPORT_OLD_API=y 882CONFIG_SND_SUPPORT_OLD_API=y
791CONFIG_SND_VERBOSE_PROCFS=y 883CONFIG_SND_VERBOSE_PROCFS=y
@@ -798,19 +890,197 @@ CONFIG_SND_DRIVERS=y
798# CONFIG_SND_MPU401 is not set 890# CONFIG_SND_MPU401 is not set
799CONFIG_SND_ARM=y 891CONFIG_SND_ARM=y
800CONFIG_SND_SPI=y 892CONFIG_SND_SPI=y
893CONFIG_SND_USB=y
894# CONFIG_SND_USB_AUDIO is not set
895# CONFIG_SND_USB_CAIAQ is not set
801# CONFIG_SND_SOC is not set 896# CONFIG_SND_SOC is not set
802# CONFIG_SOUND_PRIME is not set 897# CONFIG_SOUND_PRIME is not set
803CONFIG_HID_SUPPORT=y 898CONFIG_HID_SUPPORT=y
804CONFIG_HID=y 899CONFIG_HID=y
805# CONFIG_HID_DEBUG is not set 900# CONFIG_HID_DEBUG is not set
806# CONFIG_HIDRAW is not set 901# CONFIG_HIDRAW is not set
807# CONFIG_USB_SUPPORT is not set 902
903#
904# USB Input Devices
905#
906CONFIG_USB_HID=y
907# CONFIG_HID_PID is not set
908# CONFIG_USB_HIDDEV is not set
909
910#
911# Special HID drivers
912#
913# CONFIG_HID_A4TECH is not set
914# CONFIG_HID_APPLE is not set
915# CONFIG_HID_BELKIN is not set
916# CONFIG_HID_CHERRY is not set
917# CONFIG_HID_CHICONY is not set
918# CONFIG_HID_CYPRESS is not set
919# CONFIG_DRAGONRISE_FF is not set
920# CONFIG_HID_EZKEY is not set
921# CONFIG_HID_KYE is not set
922# CONFIG_HID_GYRATION is not set
923# CONFIG_HID_KENSINGTON is not set
924# CONFIG_HID_LOGITECH is not set
925# CONFIG_HID_MICROSOFT is not set
926# CONFIG_HID_MONTEREY is not set
927# CONFIG_HID_NTRIG is not set
928# CONFIG_HID_PANTHERLORD is not set
929# CONFIG_HID_PETALYNX is not set
930# CONFIG_HID_SAMSUNG is not set
931# CONFIG_HID_SONY is not set
932# CONFIG_HID_SUNPLUS is not set
933# CONFIG_GREENASIA_FF is not set
934# CONFIG_HID_TOPSEED is not set
935# CONFIG_THRUSTMASTER_FF is not set
936# CONFIG_ZEROPLUS_FF is not set
937CONFIG_USB_SUPPORT=y
938CONFIG_USB_ARCH_HAS_HCD=y
939CONFIG_USB_ARCH_HAS_OHCI=y
940CONFIG_USB_ARCH_HAS_EHCI=y
941CONFIG_USB=y
942CONFIG_USB_DEBUG=y
943CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
944
945#
946# Miscellaneous USB options
947#
948# CONFIG_USB_DEVICEFS is not set
949CONFIG_USB_DEVICE_CLASS=y
950# CONFIG_USB_DYNAMIC_MINORS is not set
951CONFIG_USB_SUSPEND=y
952CONFIG_USB_OTG=y
953# CONFIG_USB_OTG_WHITELIST is not set
954# CONFIG_USB_OTG_BLACKLIST_HUB is not set
955CONFIG_USB_MON=y
956# CONFIG_USB_WUSB is not set
957# CONFIG_USB_WUSB_CBAF is not set
958
959#
960# USB Host Controller Drivers
961#
962# CONFIG_USB_C67X00_HCD is not set
963# CONFIG_USB_EHCI_HCD is not set
964# CONFIG_USB_OXU210HP_HCD is not set
965# CONFIG_USB_ISP116X_HCD is not set
966# CONFIG_USB_ISP1760_HCD is not set
967# CONFIG_USB_OHCI_HCD is not set
968# CONFIG_USB_SL811_HCD is not set
969# CONFIG_USB_R8A66597_HCD is not set
970# CONFIG_USB_HWA_HCD is not set
971CONFIG_USB_MUSB_HDRC=y
972CONFIG_USB_MUSB_SOC=y
973
974#
975# OMAP 343x high speed USB support
976#
977# CONFIG_USB_MUSB_HOST is not set
978# CONFIG_USB_MUSB_PERIPHERAL is not set
979CONFIG_USB_MUSB_OTG=y
980CONFIG_USB_GADGET_MUSB_HDRC=y
981CONFIG_USB_MUSB_HDRC_HCD=y
982# CONFIG_MUSB_PIO_ONLY is not set
983CONFIG_USB_INVENTRA_DMA=y
984# CONFIG_USB_TI_CPPI_DMA is not set
985CONFIG_USB_MUSB_DEBUG=y
986
987#
988# USB Device Class drivers
989#
990# CONFIG_USB_ACM is not set
991# CONFIG_USB_PRINTER is not set
992# CONFIG_USB_WDM is not set
993# CONFIG_USB_TMC is not set
994
995#
996# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
997#
998
999#
1000# also be needed; see USB_STORAGE Help for more info
1001#
1002# CONFIG_USB_STORAGE is not set
1003# CONFIG_USB_LIBUSUAL is not set
1004
1005#
1006# USB Imaging devices
1007#
1008# CONFIG_USB_MDC800 is not set
1009# CONFIG_USB_MICROTEK is not set
1010
1011#
1012# USB port drivers
1013#
1014# CONFIG_USB_SERIAL is not set
1015
1016#
1017# USB Miscellaneous drivers
1018#
1019# CONFIG_USB_EMI62 is not set
1020# CONFIG_USB_EMI26 is not set
1021# CONFIG_USB_ADUTUX is not set
1022# CONFIG_USB_SEVSEG is not set
1023# CONFIG_USB_RIO500 is not set
1024# CONFIG_USB_LEGOTOWER is not set
1025# CONFIG_USB_LCD is not set
1026# CONFIG_USB_BERRY_CHARGE is not set
1027# CONFIG_USB_LED is not set
1028# CONFIG_USB_CYPRESS_CY7C63 is not set
1029# CONFIG_USB_CYTHERM is not set
1030# CONFIG_USB_IDMOUSE is not set
1031# CONFIG_USB_FTDI_ELAN is not set
1032# CONFIG_USB_APPLEDISPLAY is not set
1033# CONFIG_USB_LD is not set
1034# CONFIG_USB_TRANCEVIBRATOR is not set
1035# CONFIG_USB_IOWARRIOR is not set
1036# CONFIG_USB_ISIGHTFW is not set
1037# CONFIG_USB_VST is not set
1038CONFIG_USB_GADGET=y
1039CONFIG_USB_GADGET_DEBUG=y
1040CONFIG_USB_GADGET_DEBUG_FILES=y
1041CONFIG_USB_GADGET_VBUS_DRAW=2
1042CONFIG_USB_GADGET_SELECTED=y
1043# CONFIG_USB_GADGET_AT91 is not set
1044# CONFIG_USB_GADGET_ATMEL_USBA is not set
1045# CONFIG_USB_GADGET_FSL_USB2 is not set
1046# CONFIG_USB_GADGET_LH7A40X is not set
1047# CONFIG_USB_GADGET_OMAP is not set
1048# CONFIG_USB_GADGET_PXA25X is not set
1049# CONFIG_USB_GADGET_PXA27X is not set
1050# CONFIG_USB_GADGET_S3C2410 is not set
1051# CONFIG_USB_GADGET_IMX is not set
1052# CONFIG_USB_GADGET_M66592 is not set
1053# CONFIG_USB_GADGET_AMD5536UDC is not set
1054# CONFIG_USB_GADGET_FSL_QE is not set
1055# CONFIG_USB_GADGET_CI13XXX is not set
1056# CONFIG_USB_GADGET_NET2280 is not set
1057# CONFIG_USB_GADGET_GOKU is not set
1058# CONFIG_USB_GADGET_DUMMY_HCD is not set
1059CONFIG_USB_GADGET_DUALSPEED=y
1060CONFIG_USB_ZERO=y
1061# CONFIG_USB_ZERO_HNPTEST is not set
1062# CONFIG_USB_ETH is not set
1063# CONFIG_USB_GADGETFS is not set
1064# CONFIG_USB_FILE_STORAGE is not set
1065# CONFIG_USB_G_SERIAL is not set
1066# CONFIG_USB_MIDI_GADGET is not set
1067# CONFIG_USB_G_PRINTER is not set
1068# CONFIG_USB_CDC_COMPOSITE is not set
1069
1070#
1071# OTG and related infrastructure
1072#
1073CONFIG_USB_OTG_UTILS=y
1074# CONFIG_USB_GPIO_VBUS is not set
1075# CONFIG_ISP1301_OMAP is not set
1076CONFIG_TWL4030_USB=y
1077# CONFIG_NOP_USB_XCEIV is not set
808CONFIG_MMC=y 1078CONFIG_MMC=y
809# CONFIG_MMC_DEBUG is not set 1079# CONFIG_MMC_DEBUG is not set
810# CONFIG_MMC_UNSAFE_RESUME is not set 1080# CONFIG_MMC_UNSAFE_RESUME is not set
811 1081
812# 1082#
813# MMC/SD Card Drivers 1083# MMC/SD/SDIO Card Drivers
814# 1084#
815CONFIG_MMC_BLOCK=y 1085CONFIG_MMC_BLOCK=y
816CONFIG_MMC_BLOCK_BOUNCE=y 1086CONFIG_MMC_BLOCK_BOUNCE=y
@@ -818,11 +1088,13 @@ CONFIG_MMC_BLOCK_BOUNCE=y
818# CONFIG_MMC_TEST is not set 1088# CONFIG_MMC_TEST is not set
819 1089
820# 1090#
821# MMC/SD Host Controller Drivers 1091# MMC/SD/SDIO Host Controller Drivers
822# 1092#
823# CONFIG_MMC_SDHCI is not set 1093# CONFIG_MMC_SDHCI is not set
824# CONFIG_MMC_OMAP is not set 1094CONFIG_MMC_OMAP_HS=y
825# CONFIG_MMC_SPI is not set 1095# CONFIG_MMC_SPI is not set
1096# CONFIG_MEMSTICK is not set
1097# CONFIG_ACCESSIBILITY is not set
826# CONFIG_NEW_LEDS is not set 1098# CONFIG_NEW_LEDS is not set
827CONFIG_RTC_LIB=y 1099CONFIG_RTC_LIB=y
828CONFIG_RTC_CLASS=y 1100CONFIG_RTC_CLASS=y
@@ -852,43 +1124,55 @@ CONFIG_RTC_INTF_DEV=y
852# CONFIG_RTC_DRV_PCF8563 is not set 1124# CONFIG_RTC_DRV_PCF8563 is not set
853# CONFIG_RTC_DRV_PCF8583 is not set 1125# CONFIG_RTC_DRV_PCF8583 is not set
854# CONFIG_RTC_DRV_M41T80 is not set 1126# CONFIG_RTC_DRV_M41T80 is not set
1127# CONFIG_RTC_DRV_TWL4030 is not set
855# CONFIG_RTC_DRV_S35390A is not set 1128# CONFIG_RTC_DRV_S35390A is not set
856# CONFIG_RTC_DRV_FM3130 is not set 1129# CONFIG_RTC_DRV_FM3130 is not set
1130# CONFIG_RTC_DRV_RX8581 is not set
857 1131
858# 1132#
859# SPI RTC drivers 1133# SPI RTC drivers
860# 1134#
861# CONFIG_RTC_DRV_M41T94 is not set 1135# CONFIG_RTC_DRV_M41T94 is not set
862# CONFIG_RTC_DRV_DS1305 is not set 1136# CONFIG_RTC_DRV_DS1305 is not set
1137# CONFIG_RTC_DRV_DS1390 is not set
863# CONFIG_RTC_DRV_MAX6902 is not set 1138# CONFIG_RTC_DRV_MAX6902 is not set
864# CONFIG_RTC_DRV_R9701 is not set 1139# CONFIG_RTC_DRV_R9701 is not set
865# CONFIG_RTC_DRV_RS5C348 is not set 1140# CONFIG_RTC_DRV_RS5C348 is not set
1141# CONFIG_RTC_DRV_DS3234 is not set
866 1142
867# 1143#
868# Platform RTC drivers 1144# Platform RTC drivers
869# 1145#
870# CONFIG_RTC_DRV_CMOS is not set 1146# CONFIG_RTC_DRV_CMOS is not set
1147# CONFIG_RTC_DRV_DS1286 is not set
871# CONFIG_RTC_DRV_DS1511 is not set 1148# CONFIG_RTC_DRV_DS1511 is not set
872# CONFIG_RTC_DRV_DS1553 is not set 1149# CONFIG_RTC_DRV_DS1553 is not set
873# CONFIG_RTC_DRV_DS1742 is not set 1150# CONFIG_RTC_DRV_DS1742 is not set
874# CONFIG_RTC_DRV_STK17TA8 is not set 1151# CONFIG_RTC_DRV_STK17TA8 is not set
875# CONFIG_RTC_DRV_M48T86 is not set 1152# CONFIG_RTC_DRV_M48T86 is not set
1153# CONFIG_RTC_DRV_M48T35 is not set
876# CONFIG_RTC_DRV_M48T59 is not set 1154# CONFIG_RTC_DRV_M48T59 is not set
1155# CONFIG_RTC_DRV_BQ4802 is not set
877# CONFIG_RTC_DRV_V3020 is not set 1156# CONFIG_RTC_DRV_V3020 is not set
878 1157
879# 1158#
880# on-CPU RTC drivers 1159# on-CPU RTC drivers
881# 1160#
882# CONFIG_DMADEVICES is not set 1161# CONFIG_DMADEVICES is not set
883 1162# CONFIG_AUXDISPLAY is not set
884# 1163CONFIG_REGULATOR=y
885# Voltage and Current regulators 1164# CONFIG_REGULATOR_DEBUG is not set
886#
887# CONFIG_REGULATOR is not set
888# CONFIG_REGULATOR_FIXED_VOLTAGE is not set 1165# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
889# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set 1166# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
890# CONFIG_REGULATOR_BQ24022 is not set 1167# CONFIG_REGULATOR_BQ24022 is not set
1168CONFIG_REGULATOR_TWL4030=y
891# CONFIG_UIO is not set 1169# CONFIG_UIO is not set
1170# CONFIG_STAGING is not set
1171
1172#
1173# CBUS support
1174#
1175# CONFIG_CBUS is not set
892 1176
893# 1177#
894# File systems 1178# File systems
@@ -897,18 +1181,24 @@ CONFIG_EXT2_FS=y
897# CONFIG_EXT2_FS_XATTR is not set 1181# CONFIG_EXT2_FS_XATTR is not set
898# CONFIG_EXT2_FS_XIP is not set 1182# CONFIG_EXT2_FS_XIP is not set
899CONFIG_EXT3_FS=y 1183CONFIG_EXT3_FS=y
1184# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
900# CONFIG_EXT3_FS_XATTR is not set 1185# CONFIG_EXT3_FS_XATTR is not set
901# CONFIG_EXT4DEV_FS is not set 1186# CONFIG_EXT4_FS is not set
902CONFIG_JBD=y 1187CONFIG_JBD=y
903# CONFIG_REISERFS_FS is not set 1188# CONFIG_REISERFS_FS is not set
904# CONFIG_JFS_FS is not set 1189# CONFIG_JFS_FS is not set
905# CONFIG_FS_POSIX_ACL is not set 1190CONFIG_FS_POSIX_ACL=y
1191CONFIG_FILE_LOCKING=y
906# CONFIG_XFS_FS is not set 1192# CONFIG_XFS_FS is not set
1193# CONFIG_OCFS2_FS is not set
1194# CONFIG_BTRFS_FS is not set
907CONFIG_DNOTIFY=y 1195CONFIG_DNOTIFY=y
908CONFIG_INOTIFY=y 1196CONFIG_INOTIFY=y
909CONFIG_INOTIFY_USER=y 1197CONFIG_INOTIFY_USER=y
910CONFIG_QUOTA=y 1198CONFIG_QUOTA=y
1199# CONFIG_QUOTA_NETLINK_INTERFACE is not set
911CONFIG_PRINT_QUOTA_WARNING=y 1200CONFIG_PRINT_QUOTA_WARNING=y
1201CONFIG_QUOTA_TREE=y
912# CONFIG_QFMT_V1 is not set 1202# CONFIG_QFMT_V1 is not set
913CONFIG_QFMT_V2=y 1203CONFIG_QFMT_V2=y
914CONFIG_QUOTACTL=y 1204CONFIG_QUOTACTL=y
@@ -917,6 +1207,11 @@ CONFIG_QUOTACTL=y
917# CONFIG_FUSE_FS is not set 1207# CONFIG_FUSE_FS is not set
918 1208
919# 1209#
1210# Caches
1211#
1212# CONFIG_FSCACHE is not set
1213
1214#
920# CD-ROM/DVD Filesystems 1215# CD-ROM/DVD Filesystems
921# 1216#
922# CONFIG_ISO9660_FS is not set 1217# CONFIG_ISO9660_FS is not set
@@ -937,15 +1232,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
937# 1232#
938CONFIG_PROC_FS=y 1233CONFIG_PROC_FS=y
939CONFIG_PROC_SYSCTL=y 1234CONFIG_PROC_SYSCTL=y
1235CONFIG_PROC_PAGE_MONITOR=y
940CONFIG_SYSFS=y 1236CONFIG_SYSFS=y
941CONFIG_TMPFS=y 1237CONFIG_TMPFS=y
942# CONFIG_TMPFS_POSIX_ACL is not set 1238# CONFIG_TMPFS_POSIX_ACL is not set
943# CONFIG_HUGETLB_PAGE is not set 1239# CONFIG_HUGETLB_PAGE is not set
944# CONFIG_CONFIGFS_FS is not set 1240# CONFIG_CONFIGFS_FS is not set
945 1241CONFIG_MISC_FILESYSTEMS=y
946#
947# Miscellaneous filesystems
948#
949# CONFIG_ADFS_FS is not set 1242# CONFIG_ADFS_FS is not set
950# CONFIG_AFFS_FS is not set 1243# CONFIG_AFFS_FS is not set
951# CONFIG_HFS_FS is not set 1244# CONFIG_HFS_FS is not set
@@ -954,6 +1247,7 @@ CONFIG_TMPFS=y
954# CONFIG_BFS_FS is not set 1247# CONFIG_BFS_FS is not set
955# CONFIG_EFS_FS is not set 1248# CONFIG_EFS_FS is not set
956# CONFIG_CRAMFS is not set 1249# CONFIG_CRAMFS is not set
1250# CONFIG_SQUASHFS is not set
957# CONFIG_VXFS_FS is not set 1251# CONFIG_VXFS_FS is not set
958# CONFIG_MINIX_FS is not set 1252# CONFIG_MINIX_FS is not set
959# CONFIG_OMFS_FS is not set 1253# CONFIG_OMFS_FS is not set
@@ -962,6 +1256,7 @@ CONFIG_TMPFS=y
962# CONFIG_ROMFS_FS is not set 1256# CONFIG_ROMFS_FS is not set
963# CONFIG_SYSV_FS is not set 1257# CONFIG_SYSV_FS is not set
964# CONFIG_UFS_FS is not set 1258# CONFIG_UFS_FS is not set
1259# CONFIG_NILFS2_FS is not set
965CONFIG_NETWORK_FILESYSTEMS=y 1260CONFIG_NETWORK_FILESYSTEMS=y
966CONFIG_NFS_FS=y 1261CONFIG_NFS_FS=y
967CONFIG_NFS_V3=y 1262CONFIG_NFS_V3=y
@@ -975,7 +1270,6 @@ CONFIG_NFS_ACL_SUPPORT=y
975CONFIG_NFS_COMMON=y 1270CONFIG_NFS_COMMON=y
976CONFIG_SUNRPC=y 1271CONFIG_SUNRPC=y
977CONFIG_SUNRPC_GSS=y 1272CONFIG_SUNRPC_GSS=y
978# CONFIG_SUNRPC_REGISTER_V4 is not set
979CONFIG_RPCSEC_GSS_KRB5=y 1273CONFIG_RPCSEC_GSS_KRB5=y
980# CONFIG_RPCSEC_GSS_SPKM3 is not set 1274# CONFIG_RPCSEC_GSS_SPKM3 is not set
981# CONFIG_SMB_FS is not set 1275# CONFIG_SMB_FS is not set
@@ -1045,6 +1339,7 @@ CONFIG_NLS_ISO8859_1=y
1045# CONFIG_NLS_KOI8_R is not set 1339# CONFIG_NLS_KOI8_R is not set
1046# CONFIG_NLS_KOI8_U is not set 1340# CONFIG_NLS_KOI8_U is not set
1047# CONFIG_NLS_UTF8 is not set 1341# CONFIG_NLS_UTF8 is not set
1342# CONFIG_DLM is not set
1048 1343
1049# 1344#
1050# Kernel hacking 1345# Kernel hacking
@@ -1062,6 +1357,9 @@ CONFIG_DEBUG_KERNEL=y
1062CONFIG_DETECT_SOFTLOCKUP=y 1357CONFIG_DETECT_SOFTLOCKUP=y
1063# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1358# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1064CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1359CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1360CONFIG_DETECT_HUNG_TASK=y
1361# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1362CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1065CONFIG_SCHED_DEBUG=y 1363CONFIG_SCHED_DEBUG=y
1066# CONFIG_SCHEDSTATS is not set 1364# CONFIG_SCHEDSTATS is not set
1067# CONFIG_TIMER_STATS is not set 1365# CONFIG_TIMER_STATS is not set
@@ -1084,21 +1382,36 @@ CONFIG_DEBUG_INFO=y
1084# CONFIG_DEBUG_MEMORY_INIT is not set 1382# CONFIG_DEBUG_MEMORY_INIT is not set
1085# CONFIG_DEBUG_LIST is not set 1383# CONFIG_DEBUG_LIST is not set
1086# CONFIG_DEBUG_SG is not set 1384# CONFIG_DEBUG_SG is not set
1087CONFIG_FRAME_POINTER=y 1385# CONFIG_DEBUG_NOTIFIERS is not set
1088# CONFIG_BOOT_PRINTK_DELAY is not set 1386# CONFIG_BOOT_PRINTK_DELAY is not set
1089# CONFIG_RCU_TORTURE_TEST is not set 1387# CONFIG_RCU_TORTURE_TEST is not set
1388# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1090# CONFIG_BACKTRACE_SELF_TEST is not set 1389# CONFIG_BACKTRACE_SELF_TEST is not set
1390# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1091# CONFIG_FAULT_INJECTION is not set 1391# CONFIG_FAULT_INJECTION is not set
1092# CONFIG_LATENCYTOP is not set 1392# CONFIG_LATENCYTOP is not set
1093CONFIG_HAVE_FTRACE=y 1393# CONFIG_PAGE_POISONING is not set
1094CONFIG_HAVE_DYNAMIC_FTRACE=y 1394CONFIG_HAVE_FUNCTION_TRACER=y
1095# CONFIG_FTRACE is not set 1395CONFIG_TRACING_SUPPORT=y
1396
1397#
1398# Tracers
1399#
1400# CONFIG_FUNCTION_TRACER is not set
1096# CONFIG_IRQSOFF_TRACER is not set 1401# CONFIG_IRQSOFF_TRACER is not set
1097# CONFIG_SCHED_TRACER is not set 1402# CONFIG_SCHED_TRACER is not set
1098# CONFIG_CONTEXT_SWITCH_TRACER is not set 1403# CONFIG_CONTEXT_SWITCH_TRACER is not set
1404# CONFIG_EVENT_TRACER is not set
1405# CONFIG_BOOT_TRACER is not set
1406# CONFIG_TRACE_BRANCH_PROFILING is not set
1407# CONFIG_STACK_TRACER is not set
1408# CONFIG_KMEMTRACE is not set
1409# CONFIG_WORKQUEUE_TRACER is not set
1410# CONFIG_BLK_DEV_IO_TRACE is not set
1099# CONFIG_SAMPLES is not set 1411# CONFIG_SAMPLES is not set
1100CONFIG_HAVE_ARCH_KGDB=y 1412CONFIG_HAVE_ARCH_KGDB=y
1101# CONFIG_KGDB is not set 1413# CONFIG_KGDB is not set
1414CONFIG_ARM_UNWIND=y
1102# CONFIG_DEBUG_USER is not set 1415# CONFIG_DEBUG_USER is not set
1103# CONFIG_DEBUG_ERRORS is not set 1416# CONFIG_DEBUG_ERRORS is not set
1104# CONFIG_DEBUG_STACK_USAGE is not set 1417# CONFIG_DEBUG_STACK_USAGE is not set
@@ -1110,17 +1423,28 @@ CONFIG_DEBUG_LL=y
1110# 1423#
1111# CONFIG_KEYS is not set 1424# CONFIG_KEYS is not set
1112# CONFIG_SECURITY is not set 1425# CONFIG_SECURITY is not set
1426# CONFIG_SECURITYFS is not set
1113# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1427# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1114CONFIG_CRYPTO=y 1428CONFIG_CRYPTO=y
1115 1429
1116# 1430#
1117# Crypto core or helper 1431# Crypto core or helper
1118# 1432#
1433# CONFIG_CRYPTO_FIPS is not set
1119CONFIG_CRYPTO_ALGAPI=y 1434CONFIG_CRYPTO_ALGAPI=y
1435CONFIG_CRYPTO_ALGAPI2=y
1436CONFIG_CRYPTO_AEAD2=y
1120CONFIG_CRYPTO_BLKCIPHER=y 1437CONFIG_CRYPTO_BLKCIPHER=y
1438CONFIG_CRYPTO_BLKCIPHER2=y
1439CONFIG_CRYPTO_HASH=y
1440CONFIG_CRYPTO_HASH2=y
1441CONFIG_CRYPTO_RNG2=y
1442CONFIG_CRYPTO_PCOMP=y
1121CONFIG_CRYPTO_MANAGER=y 1443CONFIG_CRYPTO_MANAGER=y
1444CONFIG_CRYPTO_MANAGER2=y
1122# CONFIG_CRYPTO_GF128MUL is not set 1445# CONFIG_CRYPTO_GF128MUL is not set
1123# CONFIG_CRYPTO_NULL is not set 1446# CONFIG_CRYPTO_NULL is not set
1447CONFIG_CRYPTO_WORKQUEUE=y
1124# CONFIG_CRYPTO_CRYPTD is not set 1448# CONFIG_CRYPTO_CRYPTD is not set
1125# CONFIG_CRYPTO_AUTHENC is not set 1449# CONFIG_CRYPTO_AUTHENC is not set
1126# CONFIG_CRYPTO_TEST is not set 1450# CONFIG_CRYPTO_TEST is not set
@@ -1152,7 +1476,7 @@ CONFIG_CRYPTO_PCBC=m
1152# 1476#
1153# Digest 1477# Digest
1154# 1478#
1155# CONFIG_CRYPTO_CRC32C is not set 1479CONFIG_CRYPTO_CRC32C=y
1156# CONFIG_CRYPTO_MD4 is not set 1480# CONFIG_CRYPTO_MD4 is not set
1157CONFIG_CRYPTO_MD5=y 1481CONFIG_CRYPTO_MD5=y
1158# CONFIG_CRYPTO_MICHAEL_MIC is not set 1482# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1189,15 +1513,21 @@ CONFIG_CRYPTO_DES=y
1189# Compression 1513# Compression
1190# 1514#
1191# CONFIG_CRYPTO_DEFLATE is not set 1515# CONFIG_CRYPTO_DEFLATE is not set
1516# CONFIG_CRYPTO_ZLIB is not set
1192# CONFIG_CRYPTO_LZO is not set 1517# CONFIG_CRYPTO_LZO is not set
1518
1519#
1520# Random Number Generation
1521#
1522# CONFIG_CRYPTO_ANSI_CPRNG is not set
1193CONFIG_CRYPTO_HW=y 1523CONFIG_CRYPTO_HW=y
1524# CONFIG_BINARY_PRINTF is not set
1194 1525
1195# 1526#
1196# Library routines 1527# Library routines
1197# 1528#
1198CONFIG_BITREVERSE=y 1529CONFIG_BITREVERSE=y
1199# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1530CONFIG_GENERIC_FIND_LAST_BIT=y
1200# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1201CONFIG_CRC_CCITT=y 1531CONFIG_CRC_CCITT=y
1202# CONFIG_CRC16 is not set 1532# CONFIG_CRC16 is not set
1203CONFIG_CRC_T10DIF=y 1533CONFIG_CRC_T10DIF=y
@@ -1205,7 +1535,9 @@ CONFIG_CRC_T10DIF=y
1205CONFIG_CRC32=y 1535CONFIG_CRC32=y
1206# CONFIG_CRC7 is not set 1536# CONFIG_CRC7 is not set
1207CONFIG_LIBCRC32C=y 1537CONFIG_LIBCRC32C=y
1208CONFIG_PLIST=y 1538CONFIG_ZLIB_INFLATE=y
1539CONFIG_DECOMPRESS_GZIP=y
1209CONFIG_HAS_IOMEM=y 1540CONFIG_HAS_IOMEM=y
1210CONFIG_HAS_IOPORT=y 1541CONFIG_HAS_IOPORT=y
1211CONFIG_HAS_DMA=y 1542CONFIG_HAS_DMA=y
1543CONFIG_NLATTR=y
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig
index f238df66efd4..e7e31332c62a 100644
--- a/arch/arm/configs/rx51_defconfig
+++ b/arch/arm/configs/rx51_defconfig
@@ -1006,6 +1006,7 @@ CONFIG_WATCHDOG=y
1006# 1006#
1007# CONFIG_SOFT_WATCHDOG is not set 1007# CONFIG_SOFT_WATCHDOG is not set
1008CONFIG_OMAP_WATCHDOG=m 1008CONFIG_OMAP_WATCHDOG=m
1009CONFIG_TWL4030_WATCHDOG=m
1009 1010
1010# 1011#
1011# USB-based Watchdog Cards 1012# USB-based Watchdog Cards
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 8b40aace9db4..42920f9c1a11 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -15,8 +15,11 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/input.h> 17#include <linux/input.h>
18#include <linux/interrupt.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/serial_8250.h>
19 21
22#include <asm/serial.h>
20#include <mach/hardware.h> 23#include <mach/hardware.h>
21#include <asm/mach-types.h> 24#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -162,10 +165,6 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = {
162 .ctrl_name = "internal", 165 .ctrl_name = "internal",
163}; 166};
164 167
165static struct omap_uart_config ams_delta_uart_config __initdata = {
166 .enabled_uarts = 1,
167};
168
169static struct omap_usb_config ams_delta_usb_config __initdata = { 168static struct omap_usb_config ams_delta_usb_config __initdata = {
170 .register_host = 1, 169 .register_host = 1,
171 .hmc_mode = 16, 170 .hmc_mode = 16,
@@ -174,7 +173,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
174 173
175static struct omap_board_config_kernel ams_delta_config[] = { 174static struct omap_board_config_kernel ams_delta_config[] = {
176 { OMAP_TAG_LCD, &ams_delta_lcd_config }, 175 { OMAP_TAG_LCD, &ams_delta_lcd_config },
177 { OMAP_TAG_UART, &ams_delta_uart_config },
178}; 176};
179 177
180static struct resource ams_delta_kp_resources[] = { 178static struct resource ams_delta_kp_resources[] = {
@@ -235,6 +233,41 @@ static void __init ams_delta_init(void)
235 platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); 233 platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
236} 234}
237 235
236static struct plat_serial8250_port ams_delta_modem_ports[] = {
237 {
238 .membase = (void *) AMS_DELTA_MODEM_VIRT,
239 .mapbase = AMS_DELTA_MODEM_PHYS,
240 .irq = -EINVAL, /* changed later */
241 .flags = UPF_BOOT_AUTOCONF,
242 .irqflags = IRQF_TRIGGER_RISING,
243 .iotype = UPIO_MEM,
244 .regshift = 1,
245 .uartclk = BASE_BAUD * 16,
246 },
247 { },
248};
249
250static struct platform_device ams_delta_modem_device = {
251 .name = "serial8250",
252 .id = PLAT8250_DEV_PLATFORM1,
253 .dev = {
254 .platform_data = ams_delta_modem_ports,
255 },
256};
257
258static int __init ams_delta_modem_init(void)
259{
260 omap_cfg_reg(M14_1510_GPIO2);
261 ams_delta_modem_ports[0].irq = gpio_to_irq(2);
262
263 ams_delta_latch2_write(
264 AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC,
265 AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC);
266
267 return platform_device_register(&ams_delta_modem_device);
268}
269arch_initcall(ams_delta_modem_init);
270
238static void __init ams_delta_map_io(void) 271static void __init ams_delta_map_io(void)
239{ 272{
240 omap1_map_common_io(); 273 omap1_map_common_io();
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 19e0e9232336..a7ead1b93226 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -240,16 +240,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data)
240 return gpio_get_value(P2_NAND_RB_GPIO_PIN); 240 return gpio_get_value(P2_NAND_RB_GPIO_PIN);
241} 241}
242 242
243static struct omap_uart_config fsample_uart_config __initdata = {
244 .enabled_uarts = ((1 << 0) | (1 << 1)),
245};
246
247static struct omap_lcd_config fsample_lcd_config __initdata = { 243static struct omap_lcd_config fsample_lcd_config __initdata = {
248 .ctrl_name = "internal", 244 .ctrl_name = "internal",
249}; 245};
250 246
251static struct omap_board_config_kernel fsample_config[] = { 247static struct omap_board_config_kernel fsample_config[] = {
252 { OMAP_TAG_UART, &fsample_uart_config },
253 { OMAP_TAG_LCD, &fsample_lcd_config }, 248 { OMAP_TAG_LCD, &fsample_lcd_config },
254}; 249};
255 250
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index e724940e86f2..fb47239da72f 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -57,12 +57,7 @@ static struct omap_usb_config generic1610_usb_config __initdata = {
57}; 57};
58#endif 58#endif
59 59
60static struct omap_uart_config generic_uart_config __initdata = {
61 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
62};
63
64static struct omap_board_config_kernel generic_config[] __initdata = { 60static struct omap_board_config_kernel generic_config[] __initdata = {
65 { OMAP_TAG_UART, &generic_uart_config },
66}; 61};
67 62
68static void __init omap_generic_init(void) 63static void __init omap_generic_init(void)
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index f695aa053ac8..aab860307dca 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -360,16 +360,11 @@ static struct omap_usb_config h2_usb_config __initdata = {
360 .pins[1] = 3, 360 .pins[1] = 3,
361}; 361};
362 362
363static struct omap_uart_config h2_uart_config __initdata = {
364 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
365};
366
367static struct omap_lcd_config h2_lcd_config __initdata = { 363static struct omap_lcd_config h2_lcd_config __initdata = {
368 .ctrl_name = "internal", 364 .ctrl_name = "internal",
369}; 365};
370 366
371static struct omap_board_config_kernel h2_config[] __initdata = { 367static struct omap_board_config_kernel h2_config[] __initdata = {
372 { OMAP_TAG_UART, &h2_uart_config },
373 { OMAP_TAG_LCD, &h2_lcd_config }, 368 { OMAP_TAG_LCD, &h2_lcd_config },
374}; 369};
375 370
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index f597968733b4..89586b80b8d5 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -313,16 +313,11 @@ static struct omap_usb_config h3_usb_config __initdata = {
313 .pins[1] = 3, 313 .pins[1] = 3,
314}; 314};
315 315
316static struct omap_uart_config h3_uart_config __initdata = {
317 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
318};
319
320static struct omap_lcd_config h3_lcd_config __initdata = { 316static struct omap_lcd_config h3_lcd_config __initdata = {
321 .ctrl_name = "internal", 317 .ctrl_name = "internal",
322}; 318};
323 319
324static struct omap_board_config_kernel h3_config[] __initdata = { 320static struct omap_board_config_kernel h3_config[] __initdata = {
325 { OMAP_TAG_UART, &h3_uart_config },
326 { OMAP_TAG_LCD, &h3_lcd_config }, 321 { OMAP_TAG_LCD, &h3_lcd_config },
327}; 322};
328 323
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 2fd98260ea49..cc2abbb2d0f4 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -368,13 +368,8 @@ static inline void innovator_mmc_init(void)
368} 368}
369#endif 369#endif
370 370
371static struct omap_uart_config innovator_uart_config __initdata = {
372 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
373};
374
375static struct omap_board_config_kernel innovator_config[] = { 371static struct omap_board_config_kernel innovator_config[] = {
376 { OMAP_TAG_LCD, NULL }, 372 { OMAP_TAG_LCD, NULL },
377 { OMAP_TAG_UART, &innovator_uart_config },
378}; 373};
379 374
380static void __init innovator_init(void) 375static void __init innovator_init(void)
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index cf3247b15f87..ed891b8a6b15 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -293,10 +293,6 @@ static struct omap_usb_config osk_usb_config __initdata = {
293 .pins[0] = 2, 293 .pins[0] = 2,
294}; 294};
295 295
296static struct omap_uart_config osk_uart_config __initdata = {
297 .enabled_uarts = (1 << 0),
298};
299
300#ifdef CONFIG_OMAP_OSK_MISTRAL 296#ifdef CONFIG_OMAP_OSK_MISTRAL
301static struct omap_lcd_config osk_lcd_config __initdata = { 297static struct omap_lcd_config osk_lcd_config __initdata = {
302 .ctrl_name = "internal", 298 .ctrl_name = "internal",
@@ -304,7 +300,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = {
304#endif 300#endif
305 301
306static struct omap_board_config_kernel osk_config[] __initdata = { 302static struct omap_board_config_kernel osk_config[] __initdata = {
307 { OMAP_TAG_UART, &osk_uart_config },
308#ifdef CONFIG_OMAP_OSK_MISTRAL 303#ifdef CONFIG_OMAP_OSK_MISTRAL
309 { OMAP_TAG_LCD, &osk_lcd_config }, 304 { OMAP_TAG_LCD, &osk_lcd_config },
310#endif 305#endif
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 886b4c0569bd..90dd0431b0dc 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -212,10 +212,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = {
212 .ctrl_name = "internal", 212 .ctrl_name = "internal",
213}; 213};
214 214
215static struct omap_uart_config palmte_uart_config __initdata = {
216 .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
217};
218
219#ifdef CONFIG_APM 215#ifdef CONFIG_APM
220/* 216/*
221 * Values measured in 10 minute intervals averaged over 10 samples. 217 * Values measured in 10 minute intervals averaged over 10 samples.
@@ -302,7 +298,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery)
302 298
303static struct omap_board_config_kernel palmte_config[] __initdata = { 299static struct omap_board_config_kernel palmte_config[] __initdata = {
304 { OMAP_TAG_LCD, &palmte_lcd_config }, 300 { OMAP_TAG_LCD, &palmte_lcd_config },
305 { OMAP_TAG_UART, &palmte_uart_config },
306}; 301};
307 302
308static struct spi_board_info palmte_spi_info[] __initdata = { 303static struct spi_board_info palmte_spi_info[] __initdata = {
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 4f1b44831d37..8256139891ff 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -274,13 +274,8 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = {
274 .ctrl_name = "internal", 274 .ctrl_name = "internal",
275}; 275};
276 276
277static struct omap_uart_config palmtt_uart_config __initdata = {
278 .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
279};
280
281static struct omap_board_config_kernel palmtt_config[] __initdata = { 277static struct omap_board_config_kernel palmtt_config[] __initdata = {
282 { OMAP_TAG_LCD, &palmtt_lcd_config }, 278 { OMAP_TAG_LCD, &palmtt_lcd_config },
283 { OMAP_TAG_UART, &palmtt_uart_config },
284}; 279};
285 280
286static void __init omap_mpu_wdt_mode(int mode) { 281static void __init omap_mpu_wdt_mode(int mode) {
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 9a55c3c58218..81b6bde1c5a3 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -244,13 +244,8 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = {
244 .ctrl_name = "internal", 244 .ctrl_name = "internal",
245}; 245};
246 246
247static struct omap_uart_config palmz71_uart_config __initdata = {
248 .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
249};
250
251static struct omap_board_config_kernel palmz71_config[] __initdata = { 247static struct omap_board_config_kernel palmz71_config[] __initdata = {
252 {OMAP_TAG_LCD, &palmz71_lcd_config}, 248 {OMAP_TAG_LCD, &palmz71_lcd_config},
253 {OMAP_TAG_UART, &palmz71_uart_config},
254}; 249};
255 250
256static irqreturn_t 251static irqreturn_t
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 3b9f907aa899..83406699f310 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -208,16 +208,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data)
208 return gpio_get_value(P2_NAND_RB_GPIO_PIN); 208 return gpio_get_value(P2_NAND_RB_GPIO_PIN);
209} 209}
210 210
211static struct omap_uart_config perseus2_uart_config __initdata = {
212 .enabled_uarts = ((1 << 0) | (1 << 1)),
213};
214
215static struct omap_lcd_config perseus2_lcd_config __initdata = { 211static struct omap_lcd_config perseus2_lcd_config __initdata = {
216 .ctrl_name = "internal", 212 .ctrl_name = "internal",
217}; 213};
218 214
219static struct omap_board_config_kernel perseus2_config[] __initdata = { 215static struct omap_board_config_kernel perseus2_config[] __initdata = {
220 { OMAP_TAG_UART, &perseus2_uart_config },
221 { OMAP_TAG_LCD, &perseus2_lcd_config }, 216 { OMAP_TAG_LCD, &perseus2_lcd_config },
222}; 217};
223 218
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index c096577695fe..02c85ca2e1df 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -369,13 +369,8 @@ static struct platform_device *sx1_devices[] __initdata = {
369}; 369};
370/*-----------------------------------------*/ 370/*-----------------------------------------*/
371 371
372static struct omap_uart_config sx1_uart_config __initdata = {
373 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
374};
375
376static struct omap_board_config_kernel sx1_config[] __initdata = { 372static struct omap_board_config_kernel sx1_config[] __initdata = {
377 { OMAP_TAG_LCD, &sx1_lcd_config }, 373 { OMAP_TAG_LCD, &sx1_lcd_config },
378 { OMAP_TAG_UART, &sx1_uart_config },
379}; 374};
380 375
381/*-----------------------------------------*/ 376/*-----------------------------------------*/
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 98275e03dad1..c06e7a553472 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -140,12 +140,7 @@ static struct omap_usb_config voiceblue_usb_config __initdata = {
140 .pins[2] = 6, 140 .pins[2] = 6,
141}; 141};
142 142
143static struct omap_uart_config voiceblue_uart_config __initdata = {
144 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
145};
146
147static struct omap_board_config_kernel voiceblue_config[] = { 143static struct omap_board_config_kernel voiceblue_config[] = {
148 { OMAP_TAG_UART, &voiceblue_uart_config },
149}; 144};
150 145
151static void __init voiceblue_init_irq(void) 146static void __init voiceblue_init_irq(void)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index bbbaeb0abcd3..06808434ea04 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -71,7 +71,7 @@ static inline void omap_init_rtc(void) {}
71# define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 71# define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1
72#endif 72#endif
73 73
74#define OMAP1_MBOX_BASE IO_ADDRESS(OMAP16XX_MAILBOX_BASE) 74#define OMAP1_MBOX_BASE OMAP1_IO_ADDRESS(OMAP16XX_MAILBOX_BASE)
75 75
76static struct resource mbox_resources[] = { 76static struct resource mbox_resources[] = {
77 { 77 {
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 3afe540149f7..7030f9281ea1 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -29,9 +29,9 @@ extern void omapfb_reserve_sdram(void);
29 */ 29 */
30static struct map_desc omap_io_desc[] __initdata = { 30static struct map_desc omap_io_desc[] __initdata = {
31 { 31 {
32 .virtual = IO_VIRT, 32 .virtual = OMAP1_IO_VIRT,
33 .pfn = __phys_to_pfn(IO_PHYS), 33 .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
34 .length = IO_SIZE, 34 .length = OMAP1_IO_SIZE,
35 .type = MT_DEVICE 35 .type = MT_DEVICE
36 } 36 }
37}; 37};
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h
index 9ed5e2c1de4d..c4f05bdcf8a6 100644
--- a/arch/arm/mach-omap1/pm.h
+++ b/arch/arm/mach-omap1/pm.h
@@ -39,11 +39,11 @@
39 * Register and offset definitions to be used in PM assembler code 39 * Register and offset definitions to be used in PM assembler code
40 * ---------------------------------------------------------------------------- 40 * ----------------------------------------------------------------------------
41 */ 41 */
42#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00) 42#define CLKGEN_REG_ASM_BASE OMAP1_IO_ADDRESS(0xfffece00)
43#define ARM_IDLECT1_ASM_OFFSET 0x04 43#define ARM_IDLECT1_ASM_OFFSET 0x04
44#define ARM_IDLECT2_ASM_OFFSET 0x08 44#define ARM_IDLECT2_ASM_OFFSET 0x08
45 45
46#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00) 46#define TCMIF_ASM_BASE OMAP1_IO_ADDRESS(0xfffecc00)
47#define EMIFS_CONFIG_ASM_OFFSET 0x0c 47#define EMIFS_CONFIG_ASM_OFFSET 0x0c
48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20
49 49
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index f754cee4f3c3..d496e50fec40 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -64,7 +64,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
64 64
65static struct plat_serial8250_port serial_platform_data[] = { 65static struct plat_serial8250_port serial_platform_data[] = {
66 { 66 {
67 .membase = IO_ADDRESS(OMAP_UART1_BASE), 67 .membase = OMAP1_IO_ADDRESS(OMAP_UART1_BASE),
68 .mapbase = OMAP_UART1_BASE, 68 .mapbase = OMAP_UART1_BASE,
69 .irq = INT_UART1, 69 .irq = INT_UART1,
70 .flags = UPF_BOOT_AUTOCONF, 70 .flags = UPF_BOOT_AUTOCONF,
@@ -73,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
73 .uartclk = OMAP16XX_BASE_BAUD * 16, 73 .uartclk = OMAP16XX_BASE_BAUD * 16,
74 }, 74 },
75 { 75 {
76 .membase = IO_ADDRESS(OMAP_UART2_BASE), 76 .membase = OMAP1_IO_ADDRESS(OMAP_UART2_BASE),
77 .mapbase = OMAP_UART2_BASE, 77 .mapbase = OMAP_UART2_BASE,
78 .irq = INT_UART2, 78 .irq = INT_UART2,
79 .flags = UPF_BOOT_AUTOCONF, 79 .flags = UPF_BOOT_AUTOCONF,
@@ -82,7 +82,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
82 .uartclk = OMAP16XX_BASE_BAUD * 16, 82 .uartclk = OMAP16XX_BASE_BAUD * 16,
83 }, 83 },
84 { 84 {
85 .membase = IO_ADDRESS(OMAP_UART3_BASE), 85 .membase = OMAP1_IO_ADDRESS(OMAP_UART3_BASE),
86 .mapbase = OMAP_UART3_BASE, 86 .mapbase = OMAP_UART3_BASE,
87 .irq = INT_UART3, 87 .irq = INT_UART3,
88 .flags = UPF_BOOT_AUTOCONF, 88 .flags = UPF_BOOT_AUTOCONF,
@@ -109,7 +109,6 @@ static struct platform_device serial_device = {
109void __init omap_serial_init(void) 109void __init omap_serial_init(void)
110{ 110{
111 int i; 111 int i;
112 const struct omap_uart_config *info;
113 112
114 if (cpu_is_omap730()) { 113 if (cpu_is_omap730()) {
115 serial_platform_data[0].regshift = 0; 114 serial_platform_data[0].regshift = 0;
@@ -131,19 +130,9 @@ void __init omap_serial_init(void)
131 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; 130 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
132 } 131 }
133 132
134 info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
135 if (info == NULL)
136 return;
137
138 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { 133 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
139 unsigned char reg; 134 unsigned char reg;
140 135
141 if (!((1 << i) & info->enabled_uarts)) {
142 serial_platform_data[i].membase = NULL;
143 serial_platform_data[i].mapbase = 0;
144 continue;
145 }
146
147 switch (i) { 136 switch (i) {
148 case 0: 137 case 0:
149 uart1_ck = clk_get(NULL, "uart1_ck"); 138 uart1_ck = clk_get(NULL, "uart1_ck");
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
index 261cdc48228b..7724e520d07c 100644
--- a/arch/arm/mach-omap1/sram.S
+++ b/arch/arm/mach-omap1/sram.S
@@ -21,13 +21,13 @@
21ENTRY(omap1_sram_reprogram_clock) 21ENTRY(omap1_sram_reprogram_clock)
22 stmfd sp!, {r0 - r12, lr} @ save registers on stack 22 stmfd sp!, {r0 - r12, lr} @ save registers on stack
23 23
24 mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000 24 mov r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000
25 orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000 25 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
26 orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00 26 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
27 27
28 mov r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000 28 mov r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000
29 orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 29 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
30 orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 30 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
31 31
32 tst r0, #1 << 4 @ want lock mode? 32 tst r0, #1 << 4 @ want lock mode?
33 beq newck @ nope 33 beq newck @ nope
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 4d56408d3cff..1be6a214d88d 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -62,8 +62,8 @@ typedef struct {
62 u32 read_tim; /* READ_TIM, R */ 62 u32 read_tim; /* READ_TIM, R */
63} omap_mpu_timer_regs_t; 63} omap_mpu_timer_regs_t;
64 64
65#define omap_mpu_timer_base(n) \ 65#define omap_mpu_timer_base(n) \
66((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ 66((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
67 (n)*OMAP_MPU_TIMER_OFFSET)) 67 (n)*OMAP_MPU_TIMER_OFFSET))
68 68
69static inline unsigned long omap_mpu_timer_read(int nr) 69static inline unsigned long omap_mpu_timer_read(int nr)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a755eb5e2361..75b1c7efae7e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -31,6 +31,11 @@ config MACH_OMAP_GENERIC
31 bool "Generic OMAP board" 31 bool "Generic OMAP board"
32 depends on ARCH_OMAP2 && ARCH_OMAP24XX 32 depends on ARCH_OMAP2 && ARCH_OMAP24XX
33 33
34config MACH_OMAP2_TUSB6010
35 bool
36 depends on ARCH_OMAP2 && ARCH_OMAP2420
37 default y if MACH_NOKIA_N8X0
38
34config MACH_OMAP_H4 39config MACH_OMAP_H4
35 bool "OMAP 2420 H4 board" 40 bool "OMAP 2420 H4 board"
36 depends on ARCH_OMAP2 && ARCH_OMAP24XX 41 depends on ARCH_OMAP2 && ARCH_OMAP24XX
@@ -68,6 +73,10 @@ config MACH_OMAP_3430SDP
68 bool "OMAP 3430 SDP board" 73 bool "OMAP 3430 SDP board"
69 depends on ARCH_OMAP3 && ARCH_OMAP34XX 74 depends on ARCH_OMAP3 && ARCH_OMAP34XX
70 75
76config MACH_NOKIA_N8X0
77 bool "Nokia N800/N810"
78 depends on ARCH_OMAP2420
79
71config MACH_NOKIA_RX51 80config MACH_NOKIA_RX51
72 bool "Nokia RX-51 board" 81 bool "Nokia RX-51 board"
73 depends on ARCH_OMAP3 && ARCH_OMAP34XX 82 depends on ARCH_OMAP3 && ARCH_OMAP34XX
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 735bae5b0dec..8cb16777661a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -5,7 +5,7 @@
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
7 7
8omap-2-3-common = irq.o sdrc.o 8omap-2-3-common = irq.o sdrc.o omap_hwmod.o
9prcm-common = prcm.o powerdomain.o 9prcm-common = prcm.o powerdomain.o
10clock-common = clock.o clockdomain.o 10clock-common = clock.o clockdomain.o
11 11
@@ -35,6 +35,11 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
35obj-$(CONFIG_PM_DEBUG) += pm-debug.o 35obj-$(CONFIG_PM_DEBUG) += pm-debug.o
36endif 36endif
37 37
38# PRCM
39obj-$(CONFIG_ARCH_OMAP2) += cm.o
40obj-$(CONFIG_ARCH_OMAP3) += cm.o
41obj-$(CONFIG_ARCH_OMAP4) += cm4xxx.o
42
38# Clock framework 43# Clock framework
39obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o 44obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o
40obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o 45obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o
@@ -62,7 +67,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \
62 mmc-twl4030.o 67 mmc-twl4030.o
63obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \ 68obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \
64 mmc-twl4030.o 69 mmc-twl4030.o
65 70obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
66obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ 71obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
67 board-rx51-peripherals.o \ 72 board-rx51-peripherals.o \
68 mmc-twl4030.o 73 mmc-twl4030.o
@@ -74,6 +79,7 @@ obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
74 79
75# Platform specific device init code 80# Platform specific device init code
76obj-y += usb-musb.o 81obj-y += usb-musb.o
82obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
77 83
78onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o 84onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o
79obj-y += $(onenand-m) $(onenand-y) 85obj-y += $(onenand-m) $(onenand-y)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 8ec2a132904d..42217b32f835 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -139,23 +139,19 @@ static inline void board_smc91x_init(void)
139 139
140#endif 140#endif
141 141
142static struct omap_board_config_kernel sdp2430_config[] = {
143 {OMAP_TAG_LCD, &sdp2430_lcd_config},
144};
145
142static void __init omap_2430sdp_init_irq(void) 146static void __init omap_2430sdp_init_irq(void)
143{ 147{
148 omap_board_config = sdp2430_config;
149 omap_board_config_size = ARRAY_SIZE(sdp2430_config);
144 omap2_init_common_hw(NULL, NULL); 150 omap2_init_common_hw(NULL, NULL);
145 omap_init_irq(); 151 omap_init_irq();
146 omap_gpio_init(); 152 omap_gpio_init();
147} 153}
148 154
149static struct omap_uart_config sdp2430_uart_config __initdata = {
150 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
151};
152
153static struct omap_board_config_kernel sdp2430_config[] = {
154 {OMAP_TAG_UART, &sdp2430_uart_config},
155 {OMAP_TAG_LCD, &sdp2430_lcd_config},
156};
157
158
159static struct twl4030_gpio_platform_data sdp2430_gpio_data = { 155static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
160 .gpio_base = OMAP_MAX_GPIO_LINES, 156 .gpio_base = OMAP_MAX_GPIO_LINES,
161 .irq_base = TWL4030_GPIO_IRQ_BASE, 157 .irq_base = TWL4030_GPIO_IRQ_BASE,
@@ -205,8 +201,6 @@ static void __init omap_2430sdp_init(void)
205 omap2430_i2c_init(); 201 omap2430_i2c_init();
206 202
207 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); 203 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
208 omap_board_config = sdp2430_config;
209 omap_board_config_size = ARRAY_SIZE(sdp2430_config);
210 omap_serial_init(); 204 omap_serial_init();
211 twl4030_mmc_init(mmc); 205 twl4030_mmc_init(mmc);
212 usb_musb_init(); 206 usb_musb_init();
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index ac262cd74503..bd57ec76dc5e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -167,26 +167,23 @@ static struct platform_device *sdp3430_devices[] __initdata = {
167 &sdp3430_lcd_device, 167 &sdp3430_lcd_device,
168}; 168};
169 169
170static void __init omap_3430sdp_init_irq(void)
171{
172 omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
173 omap_init_irq();
174 omap_gpio_init();
175}
176
177static struct omap_uart_config sdp3430_uart_config __initdata = {
178 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
179};
180
181static struct omap_lcd_config sdp3430_lcd_config __initdata = { 170static struct omap_lcd_config sdp3430_lcd_config __initdata = {
182 .ctrl_name = "internal", 171 .ctrl_name = "internal",
183}; 172};
184 173
185static struct omap_board_config_kernel sdp3430_config[] __initdata = { 174static struct omap_board_config_kernel sdp3430_config[] __initdata = {
186 { OMAP_TAG_UART, &sdp3430_uart_config },
187 { OMAP_TAG_LCD, &sdp3430_lcd_config }, 175 { OMAP_TAG_LCD, &sdp3430_lcd_config },
188}; 176};
189 177
178static void __init omap_3430sdp_init_irq(void)
179{
180 omap_board_config = sdp3430_config;
181 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
182 omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
183 omap_init_irq();
184 omap_gpio_init();
185}
186
190static int sdp3430_batt_table[] = { 187static int sdp3430_batt_table[] = {
191/* 0 C*/ 188/* 0 C*/
19230800, 29500, 28300, 27100, 18930800, 29500, 28300, 27100,
@@ -478,12 +475,15 @@ static inline void board_smc91x_init(void)
478 475
479#endif 476#endif
480 477
478static void enable_board_wakeup_source(void)
479{
480 omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
481}
482
481static void __init omap_3430sdp_init(void) 483static void __init omap_3430sdp_init(void)
482{ 484{
483 omap3430_i2c_init(); 485 omap3430_i2c_init();
484 platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices)); 486 platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
485 omap_board_config = sdp3430_config;
486 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
487 if (omap_rev() > OMAP3430_REV_ES1_0) 487 if (omap_rev() > OMAP3430_REV_ES1_0)
488 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; 488 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
489 else 489 else
@@ -495,6 +495,7 @@ static void __init omap_3430sdp_init(void)
495 omap_serial_init(); 495 omap_serial_init();
496 usb_musb_init(); 496 usb_musb_init();
497 board_smc91x_init(); 497 board_smc91x_init();
498 enable_board_wakeup_source();
498} 499}
499 500
500static void __init omap_3430sdp_map_io(void) 501static void __init omap_3430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 1b223076ceb7..eb37c40ea83a 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -47,14 +47,13 @@ static struct omap_lcd_config sdp4430_lcd_config __initdata = {
47}; 47};
48 48
49static struct omap_board_config_kernel sdp4430_config[] __initdata = { 49static struct omap_board_config_kernel sdp4430_config[] __initdata = {
50 { OMAP_TAG_UART, &sdp4430_uart_config },
51 { OMAP_TAG_LCD, &sdp4430_lcd_config }, 50 { OMAP_TAG_LCD, &sdp4430_lcd_config },
52}; 51};
53 52
54static void __init gic_init_irq(void) 53static void __init gic_init_irq(void)
55{ 54{
56 gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29); 55 gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
57 gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); 56 gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
58} 57}
59 58
60static void __init omap_4430sdp_init_irq(void) 59static void __init omap_4430sdp_init_irq(void)
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index dcfc20d03894..7a2b54c7291a 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -248,18 +248,6 @@ out:
248 clk_put(gpmc_fck); 248 clk_put(gpmc_fck);
249} 249}
250 250
251static void __init omap_apollon_init_irq(void)
252{
253 omap2_init_common_hw(NULL, NULL);
254 omap_init_irq();
255 omap_gpio_init();
256 apollon_init_smc91x();
257}
258
259static struct omap_uart_config apollon_uart_config __initdata = {
260 .enabled_uarts = (1 << 0) | (0 << 1) | (0 << 2),
261};
262
263static struct omap_usb_config apollon_usb_config __initdata = { 251static struct omap_usb_config apollon_usb_config __initdata = {
264 .register_dev = 1, 252 .register_dev = 1,
265 .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ 253 .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */
@@ -272,10 +260,19 @@ static struct omap_lcd_config apollon_lcd_config __initdata = {
272}; 260};
273 261
274static struct omap_board_config_kernel apollon_config[] = { 262static struct omap_board_config_kernel apollon_config[] = {
275 { OMAP_TAG_UART, &apollon_uart_config },
276 { OMAP_TAG_LCD, &apollon_lcd_config }, 263 { OMAP_TAG_LCD, &apollon_lcd_config },
277}; 264};
278 265
266static void __init omap_apollon_init_irq(void)
267{
268 omap_board_config = apollon_config;
269 omap_board_config_size = ARRAY_SIZE(apollon_config);
270 omap2_init_common_hw(NULL, NULL);
271 omap_init_irq();
272 omap_gpio_init();
273 apollon_init_smc91x();
274}
275
279static void __init apollon_led_init(void) 276static void __init apollon_led_init(void)
280{ 277{
281 /* LED0 - AA10 */ 278 /* LED0 - AA10 */
@@ -324,8 +321,6 @@ static void __init omap_apollon_init(void)
324 * if not needed. 321 * if not needed.
325 */ 322 */
326 platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices)); 323 platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
327 omap_board_config = apollon_config;
328 omap_board_config_size = ARRAY_SIZE(apollon_config);
329 omap_serial_init(); 324 omap_serial_init();
330} 325}
331 326
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index fd00aa03690c..2e09a1c444cb 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -31,24 +31,19 @@
31#include <mach/board.h> 31#include <mach/board.h>
32#include <mach/common.h> 32#include <mach/common.h>
33 33
34static struct omap_board_config_kernel generic_config[] = {
35};
36
34static void __init omap_generic_init_irq(void) 37static void __init omap_generic_init_irq(void)
35{ 38{
39 omap_board_config = generic_config;
40 omap_board_config_size = ARRAY_SIZE(generic_config);
36 omap2_init_common_hw(NULL, NULL); 41 omap2_init_common_hw(NULL, NULL);
37 omap_init_irq(); 42 omap_init_irq();
38} 43}
39 44
40static struct omap_uart_config generic_uart_config __initdata = {
41 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
42};
43
44static struct omap_board_config_kernel generic_config[] = {
45 { OMAP_TAG_UART, &generic_uart_config },
46};
47
48static void __init omap_generic_init(void) 45static void __init omap_generic_init(void)
49{ 46{
50 omap_board_config = generic_config;
51 omap_board_config_size = ARRAY_SIZE(generic_config);
52 omap_serial_init(); 47 omap_serial_init();
53} 48}
54 49
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 7b1d61d5bb2c..eaa02d012c5c 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -268,18 +268,6 @@ static void __init h4_init_flash(void)
268 h4_flash_resource.end = base + SZ_64M - 1; 268 h4_flash_resource.end = base + SZ_64M - 1;
269} 269}
270 270
271static void __init omap_h4_init_irq(void)
272{
273 omap2_init_common_hw(NULL, NULL);
274 omap_init_irq();
275 omap_gpio_init();
276 h4_init_flash();
277}
278
279static struct omap_uart_config h4_uart_config __initdata = {
280 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
281};
282
283static struct omap_lcd_config h4_lcd_config __initdata = { 271static struct omap_lcd_config h4_lcd_config __initdata = {
284 .ctrl_name = "internal", 272 .ctrl_name = "internal",
285}; 273};
@@ -318,10 +306,19 @@ static struct omap_usb_config h4_usb_config __initdata = {
318}; 306};
319 307
320static struct omap_board_config_kernel h4_config[] = { 308static struct omap_board_config_kernel h4_config[] = {
321 { OMAP_TAG_UART, &h4_uart_config },
322 { OMAP_TAG_LCD, &h4_lcd_config }, 309 { OMAP_TAG_LCD, &h4_lcd_config },
323}; 310};
324 311
312static void __init omap_h4_init_irq(void)
313{
314 omap_board_config = h4_config;
315 omap_board_config_size = ARRAY_SIZE(h4_config);
316 omap2_init_common_hw(NULL, NULL);
317 omap_init_irq();
318 omap_gpio_init();
319 h4_init_flash();
320}
321
325static struct at24_platform_data m24c01 = { 322static struct at24_platform_data m24c01 = {
326 .byte_len = SZ_1K / 8, 323 .byte_len = SZ_1K / 8,
327 .page_size = 16, 324 .page_size = 16,
@@ -366,8 +363,6 @@ static void __init omap_h4_init(void)
366 ARRAY_SIZE(h4_i2c_board_info)); 363 ARRAY_SIZE(h4_i2c_board_info));
367 364
368 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); 365 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
369 omap_board_config = h4_config;
370 omap_board_config_size = ARRAY_SIZE(h4_config);
371 omap_usb_init(&h4_usb_config); 366 omap_usb_init(&h4_usb_config);
372 omap_serial_init(); 367 omap_serial_init();
373} 368}
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ea383f88cb1b..ec6854cbdd9f 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -268,18 +268,6 @@ static inline void __init ldp_init_smsc911x(void)
268 gpio_direction_input(eth_gpio); 268 gpio_direction_input(eth_gpio);
269} 269}
270 270
271static void __init omap_ldp_init_irq(void)
272{
273 omap2_init_common_hw(NULL, NULL);
274 omap_init_irq();
275 omap_gpio_init();
276 ldp_init_smsc911x();
277}
278
279static struct omap_uart_config ldp_uart_config __initdata = {
280 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
281};
282
283static struct platform_device ldp_lcd_device = { 271static struct platform_device ldp_lcd_device = {
284 .name = "ldp_lcd", 272 .name = "ldp_lcd",
285 .id = -1, 273 .id = -1,
@@ -290,10 +278,19 @@ static struct omap_lcd_config ldp_lcd_config __initdata = {
290}; 278};
291 279
292static struct omap_board_config_kernel ldp_config[] __initdata = { 280static struct omap_board_config_kernel ldp_config[] __initdata = {
293 { OMAP_TAG_UART, &ldp_uart_config },
294 { OMAP_TAG_LCD, &ldp_lcd_config }, 281 { OMAP_TAG_LCD, &ldp_lcd_config },
295}; 282};
296 283
284static void __init omap_ldp_init_irq(void)
285{
286 omap_board_config = ldp_config;
287 omap_board_config_size = ARRAY_SIZE(ldp_config);
288 omap2_init_common_hw(NULL, NULL);
289 omap_init_irq();
290 omap_gpio_init();
291 ldp_init_smsc911x();
292}
293
297static struct twl4030_usb_data ldp_usb_data = { 294static struct twl4030_usb_data ldp_usb_data = {
298 .usb_mode = T2_USB_MODE_ULPI, 295 .usb_mode = T2_USB_MODE_ULPI,
299}; 296};
@@ -377,8 +374,6 @@ static void __init omap_ldp_init(void)
377{ 374{
378 omap_i2c_init(); 375 omap_i2c_init();
379 platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); 376 platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
380 omap_board_config = ldp_config;
381 omap_board_config_size = ARRAY_SIZE(ldp_config);
382 ts_gpio = 54; 377 ts_gpio = 54;
383 ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio); 378 ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
384 spi_register_board_info(ldp_spi_board_info, 379 spi_register_board_info(ldp_spi_board_info,
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
new file mode 100644
index 000000000000..8341632d260b
--- /dev/null
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -0,0 +1,150 @@
1/*
2 * linux/arch/arm/mach-omap2/board-n8x0.c
3 *
4 * Copyright (C) 2005-2009 Nokia Corporation
5 * Author: Juha Yrjola <juha.yrjola@nokia.com>
6 *
7 * Modified from mach-omap2/board-generic.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/init.h>
18#include <linux/io.h>
19#include <linux/stddef.h>
20#include <linux/spi/spi.h>
21#include <linux/usb/musb.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach-types.h>
25
26#include <mach/board.h>
27#include <mach/common.h>
28#include <mach/irqs.h>
29#include <mach/mcspi.h>
30#include <mach/onenand.h>
31#include <mach/serial.h>
32
33static struct omap2_mcspi_device_config p54spi_mcspi_config = {
34 .turbo_mode = 0,
35 .single_channel = 1,
36};
37
38static struct spi_board_info n800_spi_board_info[] __initdata = {
39 {
40 .modalias = "p54spi",
41 .bus_num = 2,
42 .chip_select = 0,
43 .max_speed_hz = 48000000,
44 .controller_data = &p54spi_mcspi_config,
45 },
46};
47
48#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
49 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
50
51static struct mtd_partition onenand_partitions[] = {
52 {
53 .name = "bootloader",
54 .offset = 0,
55 .size = 0x20000,
56 .mask_flags = MTD_WRITEABLE, /* Force read-only */
57 },
58 {
59 .name = "config",
60 .offset = MTDPART_OFS_APPEND,
61 .size = 0x60000,
62 },
63 {
64 .name = "kernel",
65 .offset = MTDPART_OFS_APPEND,
66 .size = 0x200000,
67 },
68 {
69 .name = "initfs",
70 .offset = MTDPART_OFS_APPEND,
71 .size = 0x400000,
72 },
73 {
74 .name = "rootfs",
75 .offset = MTDPART_OFS_APPEND,
76 .size = MTDPART_SIZ_FULL,
77 },
78};
79
80static struct omap_onenand_platform_data board_onenand_data = {
81 .cs = 0,
82 .gpio_irq = 26,
83 .parts = onenand_partitions,
84 .nr_parts = ARRAY_SIZE(onenand_partitions),
85 .flags = ONENAND_SYNC_READ,
86};
87
88static void __init n8x0_onenand_init(void)
89{
90 gpmc_onenand_init(&board_onenand_data);
91}
92
93#else
94
95static void __init n8x0_onenand_init(void) {}
96
97#endif
98
99static void __init n8x0_map_io(void)
100{
101 omap2_set_globals_242x();
102 omap2_map_common_io();
103}
104
105static void __init n8x0_init_irq(void)
106{
107 omap2_init_common_hw(NULL, NULL);
108 omap_init_irq();
109 omap_gpio_init();
110}
111
112static void __init n8x0_init_machine(void)
113{
114 /* FIXME: add n810 spi devices */
115 spi_register_board_info(n800_spi_board_info,
116 ARRAY_SIZE(n800_spi_board_info));
117
118 omap_serial_init();
119 n8x0_onenand_init();
120}
121
122MACHINE_START(NOKIA_N800, "Nokia N800")
123 .phys_io = 0x48000000,
124 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
125 .boot_params = 0x80000100,
126 .map_io = n8x0_map_io,
127 .init_irq = n8x0_init_irq,
128 .init_machine = n8x0_init_machine,
129 .timer = &omap_timer,
130MACHINE_END
131
132MACHINE_START(NOKIA_N810, "Nokia N810")
133 .phys_io = 0x48000000,
134 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
135 .boot_params = 0x80000100,
136 .map_io = n8x0_map_io,
137 .init_irq = n8x0_init_irq,
138 .init_machine = n8x0_init_machine,
139 .timer = &omap_timer,
140MACHINE_END
141
142MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
143 .phys_io = 0x48000000,
144 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
145 .boot_params = 0x80000100,
146 .map_io = n8x0_map_io,
147 .init_irq = n8x0_init_irq,
148 .init_machine = n8x0_init_machine,
149 .timer = &omap_timer,
150MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index e00ba128cece..500c9956876d 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -108,10 +108,6 @@ static struct platform_device omap3beagle_nand_device = {
108 108
109#include "sdram-micron-mt46h32m32lf-6.h" 109#include "sdram-micron-mt46h32m32lf-6.h"
110 110
111static struct omap_uart_config omap3_beagle_uart_config __initdata = {
112 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
113};
114
115static struct twl4030_hsmmc_info mmc[] = { 111static struct twl4030_hsmmc_info mmc[] = {
116 { 112 {
117 .mmc = 1, 113 .mmc = 1,
@@ -249,11 +245,16 @@ static struct regulator_init_data beagle_vpll2 = {
249 .consumer_supplies = &beagle_vdvi_supply, 245 .consumer_supplies = &beagle_vdvi_supply,
250}; 246};
251 247
248static struct twl4030_usb_data beagle_usb_data = {
249 .usb_mode = T2_USB_MODE_ULPI,
250};
251
252static struct twl4030_platform_data beagle_twldata = { 252static struct twl4030_platform_data beagle_twldata = {
253 .irq_base = TWL4030_IRQ_BASE, 253 .irq_base = TWL4030_IRQ_BASE,
254 .irq_end = TWL4030_IRQ_END, 254 .irq_end = TWL4030_IRQ_END,
255 255
256 /* platform_data for children goes here */ 256 /* platform_data for children goes here */
257 .usb = &beagle_usb_data,
257 .gpio = &beagle_gpio_data, 258 .gpio = &beagle_gpio_data,
258 .vmmc1 = &beagle_vmmc1, 259 .vmmc1 = &beagle_vmmc1,
259 .vsim = &beagle_vsim, 260 .vsim = &beagle_vsim,
@@ -280,17 +281,6 @@ static int __init omap3_beagle_i2c_init(void)
280 return 0; 281 return 0;
281} 282}
282 283
283static void __init omap3_beagle_init_irq(void)
284{
285 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
286 mt46h32m32lf6_sdrc_params);
287 omap_init_irq();
288#ifdef CONFIG_OMAP_32K_TIMER
289 omap2_gp_clockevent_set_gptimer(12);
290#endif
291 omap_gpio_init();
292}
293
294static struct gpio_led gpio_leds[] = { 284static struct gpio_led gpio_leds[] = {
295 { 285 {
296 .name = "beagleboard::usr0", 286 .name = "beagleboard::usr0",
@@ -345,10 +335,22 @@ static struct platform_device keys_gpio = {
345}; 335};
346 336
347static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { 337static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
348 { OMAP_TAG_UART, &omap3_beagle_uart_config },
349 { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, 338 { OMAP_TAG_LCD, &omap3_beagle_lcd_config },
350}; 339};
351 340
341static void __init omap3_beagle_init_irq(void)
342{
343 omap_board_config = omap3_beagle_config;
344 omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
345 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
346 mt46h32m32lf6_sdrc_params);
347 omap_init_irq();
348#ifdef CONFIG_OMAP_32K_TIMER
349 omap2_gp_clockevent_set_gptimer(12);
350#endif
351 omap_gpio_init();
352}
353
352static struct platform_device *omap3_beagle_devices[] __initdata = { 354static struct platform_device *omap3_beagle_devices[] __initdata = {
353 &omap3_beagle_lcd_device, 355 &omap3_beagle_lcd_device,
354 &leds_gpio, 356 &leds_gpio,
@@ -398,8 +400,6 @@ static void __init omap3_beagle_init(void)
398 omap3_beagle_i2c_init(); 400 omap3_beagle_i2c_init();
399 platform_add_devices(omap3_beagle_devices, 401 platform_add_devices(omap3_beagle_devices,
400 ARRAY_SIZE(omap3_beagle_devices)); 402 ARRAY_SIZE(omap3_beagle_devices));
401 omap_board_config = omap3_beagle_config;
402 omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
403 omap_serial_init(); 403 omap_serial_init();
404 404
405 omap_cfg_reg(J25_34XX_GPIO170); 405 omap_cfg_reg(J25_34XX_GPIO170);
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c4b144647dc5..d50b9be90580 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -92,10 +92,6 @@ static inline void __init omap3evm_init_smc911x(void)
92 gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); 92 gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ);
93} 93}
94 94
95static struct omap_uart_config omap3_evm_uart_config __initdata = {
96 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
97};
98
99static struct twl4030_hsmmc_info mmc[] = { 95static struct twl4030_hsmmc_info mmc[] = {
100 { 96 {
101 .mmc = 1, 97 .mmc = 1,
@@ -278,19 +274,20 @@ struct spi_board_info omap3evm_spi_board_info[] = {
278 }, 274 },
279}; 275};
280 276
277static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
278 { OMAP_TAG_LCD, &omap3_evm_lcd_config },
279};
280
281static void __init omap3_evm_init_irq(void) 281static void __init omap3_evm_init_irq(void)
282{ 282{
283 omap_board_config = omap3_evm_config;
284 omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
283 omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL); 285 omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL);
284 omap_init_irq(); 286 omap_init_irq();
285 omap_gpio_init(); 287 omap_gpio_init();
286 omap3evm_init_smc911x(); 288 omap3evm_init_smc911x();
287} 289}
288 290
289static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
290 { OMAP_TAG_UART, &omap3_evm_uart_config },
291 { OMAP_TAG_LCD, &omap3_evm_lcd_config },
292};
293
294static struct platform_device *omap3_evm_devices[] __initdata = { 291static struct platform_device *omap3_evm_devices[] __initdata = {
295 &omap3_evm_lcd_device, 292 &omap3_evm_lcd_device,
296 &omap3evm_smc911x_device, 293 &omap3evm_smc911x_device,
@@ -301,8 +298,6 @@ static void __init omap3_evm_init(void)
301 omap3_evm_i2c_init(); 298 omap3_evm_i2c_init();
302 299
303 platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); 300 platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices));
304 omap_board_config = omap3_evm_config;
305 omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
306 301
307 spi_register_board_info(omap3evm_spi_board_info, 302 spi_register_board_info(omap3evm_spi_board_info,
308 ARRAY_SIZE(omap3evm_spi_board_info)); 303 ARRAY_SIZE(omap3evm_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 864ee3d021f7..b43f6e36b6d9 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -213,10 +213,6 @@ static struct twl4030_hsmmc_info omap3pandora_mmc[] = {
213 {} /* Terminator */ 213 {} /* Terminator */
214}; 214};
215 215
216static struct omap_uart_config omap3pandora_uart_config __initdata = {
217 .enabled_uarts = (1 << 2), /* UART3 */
218};
219
220static struct regulator_consumer_supply pandora_vmmc1_supply = { 216static struct regulator_consumer_supply pandora_vmmc1_supply = {
221 .supply = "vmmc", 217 .supply = "vmmc",
222}; 218};
@@ -309,14 +305,6 @@ static int __init omap3pandora_i2c_init(void)
309 return 0; 305 return 0;
310} 306}
311 307
312static void __init omap3pandora_init_irq(void)
313{
314 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
315 mt46h32m32lf6_sdrc_params);
316 omap_init_irq();
317 omap_gpio_init();
318}
319
320static void __init omap3pandora_ads7846_init(void) 308static void __init omap3pandora_ads7846_init(void)
321{ 309{
322 int gpio = OMAP3_PANDORA_TS_GPIO; 310 int gpio = OMAP3_PANDORA_TS_GPIO;
@@ -376,10 +364,19 @@ static struct omap_lcd_config omap3pandora_lcd_config __initdata = {
376}; 364};
377 365
378static struct omap_board_config_kernel omap3pandora_config[] __initdata = { 366static struct omap_board_config_kernel omap3pandora_config[] __initdata = {
379 { OMAP_TAG_UART, &omap3pandora_uart_config },
380 { OMAP_TAG_LCD, &omap3pandora_lcd_config }, 367 { OMAP_TAG_LCD, &omap3pandora_lcd_config },
381}; 368};
382 369
370static void __init omap3pandora_init_irq(void)
371{
372 omap_board_config = omap3pandora_config;
373 omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
374 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
375 mt46h32m32lf6_sdrc_params);
376 omap_init_irq();
377 omap_gpio_init();
378}
379
383static struct platform_device *omap3pandora_devices[] __initdata = { 380static struct platform_device *omap3pandora_devices[] __initdata = {
384 &omap3pandora_lcd_device, 381 &omap3pandora_lcd_device,
385 &pandora_leds_gpio, 382 &pandora_leds_gpio,
@@ -391,8 +388,6 @@ static void __init omap3pandora_init(void)
391 omap3pandora_i2c_init(); 388 omap3pandora_i2c_init();
392 platform_add_devices(omap3pandora_devices, 389 platform_add_devices(omap3pandora_devices,
393 ARRAY_SIZE(omap3pandora_devices)); 390 ARRAY_SIZE(omap3pandora_devices));
394 omap_board_config = omap3pandora_config;
395 omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
396 omap_serial_init(); 391 omap_serial_init();
397 spi_register_board_info(omap3pandora_spi_board_info, 392 spi_register_board_info(omap3pandora_spi_board_info,
398 ARRAY_SIZE(omap3pandora_spi_board_info)); 393 ARRAY_SIZE(omap3pandora_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 6bce23004aa4..9917d2fddc2f 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -271,9 +271,6 @@ static void __init overo_flash_init(void)
271 printk(KERN_ERR "Unable to register NAND device\n"); 271 printk(KERN_ERR "Unable to register NAND device\n");
272 } 272 }
273} 273}
274static struct omap_uart_config overo_uart_config __initdata = {
275 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
276};
277 274
278static struct twl4030_hsmmc_info mmc[] = { 275static struct twl4030_hsmmc_info mmc[] = {
279 { 276 {
@@ -360,14 +357,6 @@ static int __init overo_i2c_init(void)
360 return 0; 357 return 0;
361} 358}
362 359
363static void __init overo_init_irq(void)
364{
365 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
366 mt46h32m32lf6_sdrc_params);
367 omap_init_irq();
368 omap_gpio_init();
369}
370
371static struct platform_device overo_lcd_device = { 360static struct platform_device overo_lcd_device = {
372 .name = "overo_lcd", 361 .name = "overo_lcd",
373 .id = -1, 362 .id = -1,
@@ -378,10 +367,19 @@ static struct omap_lcd_config overo_lcd_config __initdata = {
378}; 367};
379 368
380static struct omap_board_config_kernel overo_config[] __initdata = { 369static struct omap_board_config_kernel overo_config[] __initdata = {
381 { OMAP_TAG_UART, &overo_uart_config },
382 { OMAP_TAG_LCD, &overo_lcd_config }, 370 { OMAP_TAG_LCD, &overo_lcd_config },
383}; 371};
384 372
373static void __init overo_init_irq(void)
374{
375 omap_board_config = overo_config;
376 omap_board_config_size = ARRAY_SIZE(overo_config);
377 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
378 mt46h32m32lf6_sdrc_params);
379 omap_init_irq();
380 omap_gpio_init();
381}
382
385static struct platform_device *overo_devices[] __initdata = { 383static struct platform_device *overo_devices[] __initdata = {
386 &overo_lcd_device, 384 &overo_lcd_device,
387}; 385};
@@ -390,8 +388,6 @@ static void __init overo_init(void)
390{ 388{
391 overo_i2c_init(); 389 overo_i2c_init();
392 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); 390 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
393 omap_board_config = overo_config;
394 omap_board_config_size = ARRAY_SIZE(overo_config);
395 omap_serial_init(); 391 omap_serial_init();
396 overo_flash_init(); 392 overo_flash_init();
397 usb_musb_init(); 393 usb_musb_init();
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 1c9e07fe8266..f9196c3b1a7b 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -31,10 +31,6 @@
31#include <mach/gpmc.h> 31#include <mach/gpmc.h>
32#include <mach/usb.h> 32#include <mach/usb.h>
33 33
34static struct omap_uart_config rx51_uart_config = {
35 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
36};
37
38static struct omap_lcd_config rx51_lcd_config = { 34static struct omap_lcd_config rx51_lcd_config = {
39 .ctrl_name = "internal", 35 .ctrl_name = "internal",
40}; 36};
@@ -52,7 +48,6 @@ static struct omap_fbmem_config rx51_fbmem2_config = {
52}; 48};
53 49
54static struct omap_board_config_kernel rx51_config[] = { 50static struct omap_board_config_kernel rx51_config[] = {
55 { OMAP_TAG_UART, &rx51_uart_config },
56 { OMAP_TAG_FBMEM, &rx51_fbmem0_config }, 51 { OMAP_TAG_FBMEM, &rx51_fbmem0_config },
57 { OMAP_TAG_FBMEM, &rx51_fbmem1_config }, 52 { OMAP_TAG_FBMEM, &rx51_fbmem1_config },
58 { OMAP_TAG_FBMEM, &rx51_fbmem2_config }, 53 { OMAP_TAG_FBMEM, &rx51_fbmem2_config },
@@ -61,6 +56,8 @@ static struct omap_board_config_kernel rx51_config[] = {
61 56
62static void __init rx51_init_irq(void) 57static void __init rx51_init_irq(void)
63{ 58{
59 omap_board_config = rx51_config;
60 omap_board_config_size = ARRAY_SIZE(rx51_config);
64 omap2_init_common_hw(NULL, NULL); 61 omap2_init_common_hw(NULL, NULL);
65 omap_init_irq(); 62 omap_init_irq();
66 omap_gpio_init(); 63 omap_gpio_init();
@@ -70,8 +67,6 @@ extern void __init rx51_peripherals_init(void);
70 67
71static void __init rx51_init(void) 68static void __init rx51_init(void)
72{ 69{
73 omap_board_config = rx51_config;
74 omap_board_config_size = ARRAY_SIZE(rx51_config);
75 omap_serial_init(); 70 omap_serial_init();
76 usb_musb_init(); 71 usb_musb_init();
77 rx51_peripherals_init(); 72 rx51_peripherals_init();
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index bac5c4321ff7..1f13e2a1f322 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -12,6 +12,7 @@
12#include <linux/gpio.h> 12#include <linux/gpio.h>
13#include <linux/serial_8250.h> 13#include <linux/serial_8250.h>
14#include <linux/smsc911x.h> 14#include <linux/smsc911x.h>
15#include <linux/interrupt.h>
15 16
16#include <mach/gpmc.h> 17#include <mach/gpmc.h>
17 18
@@ -84,6 +85,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
84 .mapbase = 0x10000000, 85 .mapbase = 0x10000000,
85 .irq = OMAP_GPIO_IRQ(102), 86 .irq = OMAP_GPIO_IRQ(102),
86 .flags = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ, 87 .flags = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ,
88 .irqflags = IRQF_SHARED | IRQF_TRIGGER_RISING,
87 .iotype = UPIO_MEM, 89 .iotype = UPIO_MEM,
88 .regshift = 1, 90 .regshift = 1,
89 .uartclk = QUART_CLK, 91 .uartclk = QUART_CLK,
@@ -94,7 +96,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
94 96
95static struct platform_device zoom2_debugboard_serial_device = { 97static struct platform_device zoom2_debugboard_serial_device = {
96 .name = "serial8250", 98 .name = "serial8250",
97 .id = PLAT8250_DEV_PLATFORM1, 99 .id = 3,
98 .dev = { 100 .dev = {
99 .platform_data = serial_platform_data, 101 .platform_data = serial_platform_data,
100 }, 102 },
@@ -127,6 +129,7 @@ static inline void __init zoom2_init_quaduart(void)
127static inline int omap_zoom2_debugboard_detect(void) 129static inline int omap_zoom2_debugboard_detect(void)
128{ 130{
129 int debug_board_detect = 0; 131 int debug_board_detect = 0;
132 int ret = 1;
130 133
131 debug_board_detect = ZOOM2_SMSC911X_GPIO; 134 debug_board_detect = ZOOM2_SMSC911X_GPIO;
132 135
@@ -138,10 +141,10 @@ static inline int omap_zoom2_debugboard_detect(void)
138 gpio_direction_input(debug_board_detect); 141 gpio_direction_input(debug_board_detect);
139 142
140 if (!gpio_get_value(debug_board_detect)) { 143 if (!gpio_get_value(debug_board_detect)) {
141 gpio_free(debug_board_detect); 144 ret = 0;
142 return 0;
143 } 145 }
144 return 1; 146 gpio_free(debug_board_detect);
147 return ret;
145} 148}
146 149
147static struct platform_device *zoom2_devices[] __initdata = { 150static struct platform_device *zoom2_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index 427b7b8b1237..324009edbd53 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -12,36 +12,217 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/input.h>
15#include <linux/gpio.h> 16#include <linux/gpio.h>
16#include <linux/i2c/twl4030.h> 17#include <linux/i2c/twl4030.h>
18#include <linux/regulator/machine.h>
17 19
18#include <asm/mach-types.h> 20#include <asm/mach-types.h>
19#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
20 22
21#include <mach/common.h> 23#include <mach/common.h>
22#include <mach/usb.h> 24#include <mach/usb.h>
25#include <mach/keypad.h>
23 26
24#include "mmc-twl4030.h" 27#include "mmc-twl4030.h"
25 28
26static void __init omap_zoom2_init_irq(void) 29/* Zoom2 has Qwerty keyboard*/
30static int zoom2_twl4030_keymap[] = {
31 KEY(0, 0, KEY_E),
32 KEY(1, 0, KEY_R),
33 KEY(2, 0, KEY_T),
34 KEY(3, 0, KEY_HOME),
35 KEY(6, 0, KEY_I),
36 KEY(7, 0, KEY_LEFTSHIFT),
37 KEY(0, 1, KEY_D),
38 KEY(1, 1, KEY_F),
39 KEY(2, 1, KEY_G),
40 KEY(3, 1, KEY_SEND),
41 KEY(6, 1, KEY_K),
42 KEY(7, 1, KEY_ENTER),
43 KEY(0, 2, KEY_X),
44 KEY(1, 2, KEY_C),
45 KEY(2, 2, KEY_V),
46 KEY(3, 2, KEY_END),
47 KEY(6, 2, KEY_DOT),
48 KEY(7, 2, KEY_CAPSLOCK),
49 KEY(0, 3, KEY_Z),
50 KEY(1, 3, KEY_KPPLUS),
51 KEY(2, 3, KEY_B),
52 KEY(3, 3, KEY_F1),
53 KEY(6, 3, KEY_O),
54 KEY(7, 3, KEY_SPACE),
55 KEY(0, 4, KEY_W),
56 KEY(1, 4, KEY_Y),
57 KEY(2, 4, KEY_U),
58 KEY(3, 4, KEY_F2),
59 KEY(4, 4, KEY_VOLUMEUP),
60 KEY(6, 4, KEY_L),
61 KEY(7, 4, KEY_LEFT),
62 KEY(0, 5, KEY_S),
63 KEY(1, 5, KEY_H),
64 KEY(2, 5, KEY_J),
65 KEY(3, 5, KEY_F3),
66 KEY(5, 5, KEY_VOLUMEDOWN),
67 KEY(6, 5, KEY_M),
68 KEY(4, 5, KEY_ENTER),
69 KEY(7, 5, KEY_RIGHT),
70 KEY(0, 6, KEY_Q),
71 KEY(1, 6, KEY_A),
72 KEY(2, 6, KEY_N),
73 KEY(3, 6, KEY_BACKSPACE),
74 KEY(6, 6, KEY_P),
75 KEY(7, 6, KEY_UP),
76 KEY(6, 7, KEY_SELECT),
77 KEY(7, 7, KEY_DOWN),
78 KEY(0, 7, KEY_PROG1), /*MACRO 1 <User defined> */
79 KEY(1, 7, KEY_PROG2), /*MACRO 2 <User defined> */
80 KEY(2, 7, KEY_PROG3), /*MACRO 3 <User defined> */
81 KEY(3, 7, KEY_PROG4), /*MACRO 4 <User defined> */
82 0
83};
84
85static struct twl4030_keypad_data zoom2_kp_twl4030_data = {
86 .rows = 8,
87 .cols = 8,
88 .keymap = zoom2_twl4030_keymap,
89 .keymapsize = ARRAY_SIZE(zoom2_twl4030_keymap),
90 .rep = 1,
91};
92
93static struct omap_board_config_kernel zoom2_config[] __initdata = {
94};
95
96static struct regulator_consumer_supply zoom2_vmmc1_supply = {
97 .supply = "vmmc",
98};
99
100static struct regulator_consumer_supply zoom2_vsim_supply = {
101 .supply = "vmmc_aux",
102};
103
104static struct regulator_consumer_supply zoom2_vmmc2_supply = {
105 .supply = "vmmc",
106};
107
108/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
109static struct regulator_init_data zoom2_vmmc1 = {
110 .constraints = {
111 .min_uV = 1850000,
112 .max_uV = 3150000,
113 .valid_modes_mask = REGULATOR_MODE_NORMAL
114 | REGULATOR_MODE_STANDBY,
115 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
116 | REGULATOR_CHANGE_MODE
117 | REGULATOR_CHANGE_STATUS,
118 },
119 .num_consumer_supplies = 1,
120 .consumer_supplies = &zoom2_vmmc1_supply,
121};
122
123/* VMMC2 for MMC2 card */
124static struct regulator_init_data zoom2_vmmc2 = {
125 .constraints = {
126 .min_uV = 1850000,
127 .max_uV = 1850000,
128 .apply_uV = true,
129 .valid_modes_mask = REGULATOR_MODE_NORMAL
130 | REGULATOR_MODE_STANDBY,
131 .valid_ops_mask = REGULATOR_CHANGE_MODE
132 | REGULATOR_CHANGE_STATUS,
133 },
134 .num_consumer_supplies = 1,
135 .consumer_supplies = &zoom2_vmmc2_supply,
136};
137
138/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
139static struct regulator_init_data zoom2_vsim = {
140 .constraints = {
141 .min_uV = 1800000,
142 .max_uV = 3000000,
143 .valid_modes_mask = REGULATOR_MODE_NORMAL
144 | REGULATOR_MODE_STANDBY,
145 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
146 | REGULATOR_CHANGE_MODE
147 | REGULATOR_CHANGE_STATUS,
148 },
149 .num_consumer_supplies = 1,
150 .consumer_supplies = &zoom2_vsim_supply,
151};
152
153static struct twl4030_hsmmc_info mmc[] __initdata = {
154 {
155 .mmc = 1,
156 .wires = 4,
157 .gpio_wp = -EINVAL,
158 },
159 {
160 .mmc = 2,
161 .wires = 4,
162 .gpio_wp = -EINVAL,
163 },
164 {} /* Terminator */
165};
166
167static int zoom2_twl_gpio_setup(struct device *dev,
168 unsigned gpio, unsigned ngpio)
27{ 169{
28 omap2_init_common_hw(NULL, NULL); 170 /* gpio + 0 is "mmc0_cd" (input/IRQ),
29 omap_init_irq(); 171 * gpio + 1 is "mmc1_cd" (input/IRQ)
30 omap_gpio_init(); 172 */
173 mmc[0].gpio_cd = gpio + 0;
174 mmc[1].gpio_cd = gpio + 1;
175 twl4030_mmc_init(mmc);
176
177 /* link regulators to MMC adapters ... we "know" the
178 * regulators will be set up only *after* we return.
179 */
180 zoom2_vmmc1_supply.dev = mmc[0].dev;
181 zoom2_vsim_supply.dev = mmc[0].dev;
182 zoom2_vmmc2_supply.dev = mmc[1].dev;
183
184 return 0;
31} 185}
32 186
33static struct omap_uart_config zoom2_uart_config __initdata = { 187
34 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), 188static int zoom2_batt_table[] = {
189/* 0 C*/
19030800, 29500, 28300, 27100,
19126000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
19217200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
19311600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
1948020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
1955640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
1964040, 3910, 3790, 3670, 3550
35}; 197};
36 198
37static struct omap_board_config_kernel zoom2_config[] __initdata = { 199static struct twl4030_bci_platform_data zoom2_bci_data = {
38 { OMAP_TAG_UART, &zoom2_uart_config }, 200 .battery_tmp_tbl = zoom2_batt_table,
201 .tblsize = ARRAY_SIZE(zoom2_batt_table),
39}; 202};
40 203
204static struct twl4030_usb_data zoom2_usb_data = {
205 .usb_mode = T2_USB_MODE_ULPI,
206};
207
208static void __init omap_zoom2_init_irq(void)
209{
210 omap_board_config = zoom2_config;
211 omap_board_config_size = ARRAY_SIZE(zoom2_config);
212 omap2_init_common_hw(NULL, NULL);
213 omap_init_irq();
214 omap_gpio_init();
215}
216
41static struct twl4030_gpio_platform_data zoom2_gpio_data = { 217static struct twl4030_gpio_platform_data zoom2_gpio_data = {
42 .gpio_base = OMAP_MAX_GPIO_LINES, 218 .gpio_base = OMAP_MAX_GPIO_LINES,
43 .irq_base = TWL4030_GPIO_IRQ_BASE, 219 .irq_base = TWL4030_GPIO_IRQ_BASE,
44 .irq_end = TWL4030_GPIO_IRQ_END, 220 .irq_end = TWL4030_GPIO_IRQ_END,
221 .setup = zoom2_twl_gpio_setup,
222};
223
224static struct twl4030_madc_platform_data zoom2_madc_data = {
225 .irq_line = 1,
45}; 226};
46 227
47static struct twl4030_platform_data zoom2_twldata = { 228static struct twl4030_platform_data zoom2_twldata = {
@@ -49,7 +230,15 @@ static struct twl4030_platform_data zoom2_twldata = {
49 .irq_end = TWL4030_IRQ_END, 230 .irq_end = TWL4030_IRQ_END,
50 231
51 /* platform_data for children goes here */ 232 /* platform_data for children goes here */
233 .bci = &zoom2_bci_data,
234 .madc = &zoom2_madc_data,
235 .usb = &zoom2_usb_data,
52 .gpio = &zoom2_gpio_data, 236 .gpio = &zoom2_gpio_data,
237 .keypad = &zoom2_kp_twl4030_data,
238 .vmmc1 = &zoom2_vmmc1,
239 .vmmc2 = &zoom2_vmmc2,
240 .vsim = &zoom2_vsim,
241
53}; 242};
54 243
55static struct i2c_board_info __initdata zoom2_i2c_boardinfo[] = { 244static struct i2c_board_info __initdata zoom2_i2c_boardinfo[] = {
@@ -70,26 +259,13 @@ static int __init omap_i2c_init(void)
70 return 0; 259 return 0;
71} 260}
72 261
73static struct twl4030_hsmmc_info mmc[] __initdata = {
74 {
75 .mmc = 1,
76 .wires = 4,
77 .gpio_cd = -EINVAL,
78 .gpio_wp = -EINVAL,
79 },
80 {} /* Terminator */
81};
82
83extern int __init omap_zoom2_debugboard_init(void); 262extern int __init omap_zoom2_debugboard_init(void);
84 263
85static void __init omap_zoom2_init(void) 264static void __init omap_zoom2_init(void)
86{ 265{
87 omap_i2c_init(); 266 omap_i2c_init();
88 omap_board_config = zoom2_config;
89 omap_board_config_size = ARRAY_SIZE(zoom2_config);
90 omap_serial_init(); 267 omap_serial_init();
91 omap_zoom2_debugboard_init(); 268 omap_zoom2_debugboard_init();
92 twl4030_mmc_init(mmc);
93 usb_musb_init(); 269 usb_musb_init();
94} 270}
95 271
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 456e2ad5f621..f2a92d614f0f 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -1043,5 +1043,7 @@ void omap2_clk_disable_unused(struct clk *clk)
1043 omap2_clk_disable(clk); 1043 omap2_clk_disable(clk);
1044 } else 1044 } else
1045 _omap2_clk_disable(clk); 1045 _omap2_clk_disable(clk);
1046 if (clk->clkdm != NULL)
1047 pwrdm_clkdm_state_switch(clk->clkdm);
1046} 1048}
1047#endif 1049#endif
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index cd7819cc0c9e..fafcd32e6907 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -27,6 +27,7 @@
27#include <linux/limits.h> 27#include <linux/limits.h>
28#include <linux/bitops.h> 28#include <linux/bitops.h>
29 29
30#include <mach/cpu.h>
30#include <mach/clock.h> 31#include <mach/clock.h>
31#include <mach/sram.h> 32#include <mach/sram.h>
32#include <asm/div64.h> 33#include <asm/div64.h>
@@ -1067,17 +1068,17 @@ static int __init omap2_clk_arch_init(void)
1067 return -EINVAL; 1068 return -EINVAL;
1068 1069
1069 /* REVISIT: not yet ready for 343x */ 1070 /* REVISIT: not yet ready for 343x */
1070#if 0 1071 if (clk_set_rate(&dpll1_ck, mpurate))
1071 if (clk_set_rate(&virt_prcm_set, mpurate)) 1072 printk(KERN_ERR "*** Unable to set MPU rate\n");
1072 printk(KERN_ERR "Could not find matching MPU rate\n");
1073#endif
1074 1073
1075 recalculate_root_clocks(); 1074 recalculate_root_clocks();
1076 1075
1077 printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): " 1076 printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
1078 "%ld.%01ld/%ld/%ld MHz\n", 1077 "%ld.%01ld/%ld/%ld MHz\n",
1079 (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10, 1078 (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
1080 (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ; 1079 (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
1080
1081 calibrate_delay();
1081 1082
1082 return 0; 1083 return 0;
1083} 1084}
@@ -1136,7 +1137,7 @@ int __init omap2_clk_init(void)
1136 1137
1137 recalculate_root_clocks(); 1138 recalculate_root_clocks();
1138 1139
1139 printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): " 1140 printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
1140 "%ld.%01ld/%ld/%ld MHz\n", 1141 "%ld.%01ld/%ld/%ld MHz\n",
1141 (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10, 1142 (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
1142 (core_ck.rate / 1000000), (arm_fck.rate / 1000000)); 1143 (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 57cc2725b923..c8119781e00a 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1020,6 +1020,7 @@ static struct clk arm_fck = {
1020 .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), 1020 .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
1021 .clksel_mask = OMAP3430_ST_MPU_CLK_MASK, 1021 .clksel_mask = OMAP3430_ST_MPU_CLK_MASK,
1022 .clksel = arm_fck_clksel, 1022 .clksel = arm_fck_clksel,
1023 .clkdm_name = "mpu_clkdm",
1023 .recalc = &omap2_clksel_recalc, 1024 .recalc = &omap2_clksel_recalc,
1024}; 1025};
1025 1026
@@ -1155,7 +1156,6 @@ static struct clk gfx_cg1_ck = {
1155 .name = "gfx_cg1_ck", 1156 .name = "gfx_cg1_ck",
1156 .ops = &clkops_omap2_dflt_wait, 1157 .ops = &clkops_omap2_dflt_wait,
1157 .parent = &gfx_l3_fck, /* REVISIT: correct? */ 1158 .parent = &gfx_l3_fck, /* REVISIT: correct? */
1158 .init = &omap2_init_clk_clkdm,
1159 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), 1159 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1160 .enable_bit = OMAP3430ES1_EN_2D_SHIFT, 1160 .enable_bit = OMAP3430ES1_EN_2D_SHIFT,
1161 .clkdm_name = "gfx_3430es1_clkdm", 1161 .clkdm_name = "gfx_3430es1_clkdm",
@@ -1166,7 +1166,6 @@ static struct clk gfx_cg2_ck = {
1166 .name = "gfx_cg2_ck", 1166 .name = "gfx_cg2_ck",
1167 .ops = &clkops_omap2_dflt_wait, 1167 .ops = &clkops_omap2_dflt_wait,
1168 .parent = &gfx_l3_fck, /* REVISIT: correct? */ 1168 .parent = &gfx_l3_fck, /* REVISIT: correct? */
1169 .init = &omap2_init_clk_clkdm,
1170 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), 1169 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1171 .enable_bit = OMAP3430ES1_EN_3D_SHIFT, 1170 .enable_bit = OMAP3430ES1_EN_3D_SHIFT,
1172 .clkdm_name = "gfx_3430es1_clkdm", 1171 .clkdm_name = "gfx_3430es1_clkdm",
@@ -1210,7 +1209,6 @@ static struct clk sgx_ick = {
1210 .name = "sgx_ick", 1209 .name = "sgx_ick",
1211 .ops = &clkops_omap2_dflt_wait, 1210 .ops = &clkops_omap2_dflt_wait,
1212 .parent = &l3_ick, 1211 .parent = &l3_ick,
1213 .init = &omap2_init_clk_clkdm,
1214 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), 1212 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
1215 .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT, 1213 .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT,
1216 .clkdm_name = "sgx_clkdm", 1214 .clkdm_name = "sgx_clkdm",
@@ -1223,7 +1221,6 @@ static struct clk d2d_26m_fck = {
1223 .name = "d2d_26m_fck", 1221 .name = "d2d_26m_fck",
1224 .ops = &clkops_omap2_dflt_wait, 1222 .ops = &clkops_omap2_dflt_wait,
1225 .parent = &sys_ck, 1223 .parent = &sys_ck,
1226 .init = &omap2_init_clk_clkdm,
1227 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1224 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1228 .enable_bit = OMAP3430ES1_EN_D2D_SHIFT, 1225 .enable_bit = OMAP3430ES1_EN_D2D_SHIFT,
1229 .clkdm_name = "d2d_clkdm", 1226 .clkdm_name = "d2d_clkdm",
@@ -1234,7 +1231,6 @@ static struct clk modem_fck = {
1234 .name = "modem_fck", 1231 .name = "modem_fck",
1235 .ops = &clkops_omap2_dflt_wait, 1232 .ops = &clkops_omap2_dflt_wait,
1236 .parent = &sys_ck, 1233 .parent = &sys_ck,
1237 .init = &omap2_init_clk_clkdm,
1238 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1234 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1239 .enable_bit = OMAP3430_EN_MODEM_SHIFT, 1235 .enable_bit = OMAP3430_EN_MODEM_SHIFT,
1240 .clkdm_name = "d2d_clkdm", 1236 .clkdm_name = "d2d_clkdm",
@@ -1622,7 +1618,6 @@ static struct clk core_l3_ick = {
1622 .name = "core_l3_ick", 1618 .name = "core_l3_ick",
1623 .ops = &clkops_null, 1619 .ops = &clkops_null,
1624 .parent = &l3_ick, 1620 .parent = &l3_ick,
1625 .init = &omap2_init_clk_clkdm,
1626 .clkdm_name = "core_l3_clkdm", 1621 .clkdm_name = "core_l3_clkdm",
1627 .recalc = &followparent_recalc, 1622 .recalc = &followparent_recalc,
1628}; 1623};
@@ -1691,7 +1686,6 @@ static struct clk core_l4_ick = {
1691 .name = "core_l4_ick", 1686 .name = "core_l4_ick",
1692 .ops = &clkops_null, 1687 .ops = &clkops_null,
1693 .parent = &l4_ick, 1688 .parent = &l4_ick,
1694 .init = &omap2_init_clk_clkdm,
1695 .clkdm_name = "core_l4_clkdm", 1689 .clkdm_name = "core_l4_clkdm",
1696 .recalc = &followparent_recalc, 1690 .recalc = &followparent_recalc,
1697}; 1691};
@@ -2089,7 +2083,6 @@ static struct clk dss_tv_fck = {
2089 .name = "dss_tv_fck", 2083 .name = "dss_tv_fck",
2090 .ops = &clkops_omap2_dflt, 2084 .ops = &clkops_omap2_dflt,
2091 .parent = &omap_54m_fck, 2085 .parent = &omap_54m_fck,
2092 .init = &omap2_init_clk_clkdm,
2093 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), 2086 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2094 .enable_bit = OMAP3430_EN_TV_SHIFT, 2087 .enable_bit = OMAP3430_EN_TV_SHIFT,
2095 .clkdm_name = "dss_clkdm", 2088 .clkdm_name = "dss_clkdm",
@@ -2100,7 +2093,6 @@ static struct clk dss_96m_fck = {
2100 .name = "dss_96m_fck", 2093 .name = "dss_96m_fck",
2101 .ops = &clkops_omap2_dflt, 2094 .ops = &clkops_omap2_dflt,
2102 .parent = &omap_96m_fck, 2095 .parent = &omap_96m_fck,
2103 .init = &omap2_init_clk_clkdm,
2104 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), 2096 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2105 .enable_bit = OMAP3430_EN_TV_SHIFT, 2097 .enable_bit = OMAP3430_EN_TV_SHIFT,
2106 .clkdm_name = "dss_clkdm", 2098 .clkdm_name = "dss_clkdm",
@@ -2111,7 +2103,6 @@ static struct clk dss2_alwon_fck = {
2111 .name = "dss2_alwon_fck", 2103 .name = "dss2_alwon_fck",
2112 .ops = &clkops_omap2_dflt, 2104 .ops = &clkops_omap2_dflt,
2113 .parent = &sys_ck, 2105 .parent = &sys_ck,
2114 .init = &omap2_init_clk_clkdm,
2115 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), 2106 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2116 .enable_bit = OMAP3430_EN_DSS2_SHIFT, 2107 .enable_bit = OMAP3430_EN_DSS2_SHIFT,
2117 .clkdm_name = "dss_clkdm", 2108 .clkdm_name = "dss_clkdm",
@@ -2123,7 +2114,6 @@ static struct clk dss_ick_3430es1 = {
2123 .name = "dss_ick", 2114 .name = "dss_ick",
2124 .ops = &clkops_omap2_dflt, 2115 .ops = &clkops_omap2_dflt,
2125 .parent = &l4_ick, 2116 .parent = &l4_ick,
2126 .init = &omap2_init_clk_clkdm,
2127 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), 2117 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
2128 .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, 2118 .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
2129 .clkdm_name = "dss_clkdm", 2119 .clkdm_name = "dss_clkdm",
@@ -2135,7 +2125,6 @@ static struct clk dss_ick_3430es2 = {
2135 .name = "dss_ick", 2125 .name = "dss_ick",
2136 .ops = &clkops_omap3430es2_dss_usbhost_wait, 2126 .ops = &clkops_omap3430es2_dss_usbhost_wait,
2137 .parent = &l4_ick, 2127 .parent = &l4_ick,
2138 .init = &omap2_init_clk_clkdm,
2139 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), 2128 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
2140 .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, 2129 .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
2141 .clkdm_name = "dss_clkdm", 2130 .clkdm_name = "dss_clkdm",
@@ -2159,7 +2148,6 @@ static struct clk cam_ick = {
2159 .name = "cam_ick", 2148 .name = "cam_ick",
2160 .ops = &clkops_omap2_dflt, 2149 .ops = &clkops_omap2_dflt,
2161 .parent = &l4_ick, 2150 .parent = &l4_ick,
2162 .init = &omap2_init_clk_clkdm,
2163 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), 2151 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
2164 .enable_bit = OMAP3430_EN_CAM_SHIFT, 2152 .enable_bit = OMAP3430_EN_CAM_SHIFT,
2165 .clkdm_name = "cam_clkdm", 2153 .clkdm_name = "cam_clkdm",
@@ -2170,7 +2158,6 @@ static struct clk csi2_96m_fck = {
2170 .name = "csi2_96m_fck", 2158 .name = "csi2_96m_fck",
2171 .ops = &clkops_omap2_dflt, 2159 .ops = &clkops_omap2_dflt,
2172 .parent = &core_96m_fck, 2160 .parent = &core_96m_fck,
2173 .init = &omap2_init_clk_clkdm,
2174 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), 2161 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
2175 .enable_bit = OMAP3430_EN_CSI2_SHIFT, 2162 .enable_bit = OMAP3430_EN_CSI2_SHIFT,
2176 .clkdm_name = "cam_clkdm", 2163 .clkdm_name = "cam_clkdm",
@@ -2183,7 +2170,6 @@ static struct clk usbhost_120m_fck = {
2183 .name = "usbhost_120m_fck", 2170 .name = "usbhost_120m_fck",
2184 .ops = &clkops_omap2_dflt, 2171 .ops = &clkops_omap2_dflt,
2185 .parent = &dpll5_m2_ck, 2172 .parent = &dpll5_m2_ck,
2186 .init = &omap2_init_clk_clkdm,
2187 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), 2173 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
2188 .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT, 2174 .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT,
2189 .clkdm_name = "usbhost_clkdm", 2175 .clkdm_name = "usbhost_clkdm",
@@ -2194,7 +2180,6 @@ static struct clk usbhost_48m_fck = {
2194 .name = "usbhost_48m_fck", 2180 .name = "usbhost_48m_fck",
2195 .ops = &clkops_omap3430es2_dss_usbhost_wait, 2181 .ops = &clkops_omap3430es2_dss_usbhost_wait,
2196 .parent = &omap_48m_fck, 2182 .parent = &omap_48m_fck,
2197 .init = &omap2_init_clk_clkdm,
2198 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), 2183 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
2199 .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT, 2184 .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
2200 .clkdm_name = "usbhost_clkdm", 2185 .clkdm_name = "usbhost_clkdm",
@@ -2206,7 +2191,6 @@ static struct clk usbhost_ick = {
2206 .name = "usbhost_ick", 2191 .name = "usbhost_ick",
2207 .ops = &clkops_omap3430es2_dss_usbhost_wait, 2192 .ops = &clkops_omap3430es2_dss_usbhost_wait,
2208 .parent = &l4_ick, 2193 .parent = &l4_ick,
2209 .init = &omap2_init_clk_clkdm,
2210 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), 2194 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
2211 .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, 2195 .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT,
2212 .clkdm_name = "usbhost_clkdm", 2196 .clkdm_name = "usbhost_clkdm",
@@ -2268,7 +2252,6 @@ static struct clk gpt1_fck = {
2268static struct clk wkup_32k_fck = { 2252static struct clk wkup_32k_fck = {
2269 .name = "wkup_32k_fck", 2253 .name = "wkup_32k_fck",
2270 .ops = &clkops_null, 2254 .ops = &clkops_null,
2271 .init = &omap2_init_clk_clkdm,
2272 .parent = &omap_32k_fck, 2255 .parent = &omap_32k_fck,
2273 .clkdm_name = "wkup_clkdm", 2256 .clkdm_name = "wkup_clkdm",
2274 .recalc = &followparent_recalc, 2257 .recalc = &followparent_recalc,
@@ -2383,7 +2366,6 @@ static struct clk per_96m_fck = {
2383 .name = "per_96m_fck", 2366 .name = "per_96m_fck",
2384 .ops = &clkops_null, 2367 .ops = &clkops_null,
2385 .parent = &omap_96m_alwon_fck, 2368 .parent = &omap_96m_alwon_fck,
2386 .init = &omap2_init_clk_clkdm,
2387 .clkdm_name = "per_clkdm", 2369 .clkdm_name = "per_clkdm",
2388 .recalc = &followparent_recalc, 2370 .recalc = &followparent_recalc,
2389}; 2371};
@@ -2392,7 +2374,6 @@ static struct clk per_48m_fck = {
2392 .name = "per_48m_fck", 2374 .name = "per_48m_fck",
2393 .ops = &clkops_null, 2375 .ops = &clkops_null,
2394 .parent = &omap_48m_fck, 2376 .parent = &omap_48m_fck,
2395 .init = &omap2_init_clk_clkdm,
2396 .clkdm_name = "per_clkdm", 2377 .clkdm_name = "per_clkdm",
2397 .recalc = &followparent_recalc, 2378 .recalc = &followparent_recalc,
2398}; 2379};
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 0e7d501865b6..4ef7b4f5474e 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -299,7 +299,8 @@ struct clockdomain *clkdm_lookup(const char *name)
299 * anything else to indicate failure; or -EINVAL if the function pointer 299 * anything else to indicate failure; or -EINVAL if the function pointer
300 * is null. 300 * is null.
301 */ 301 */
302int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) 302int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
303 void *user)
303{ 304{
304 struct clockdomain *clkdm; 305 struct clockdomain *clkdm;
305 int ret = 0; 306 int ret = 0;
@@ -309,7 +310,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
309 310
310 mutex_lock(&clkdm_mutex); 311 mutex_lock(&clkdm_mutex);
311 list_for_each_entry(clkdm, &clkdm_list, node) { 312 list_for_each_entry(clkdm, &clkdm_list, node) {
312 ret = (*fn)(clkdm); 313 ret = (*fn)(clkdm, user);
313 if (ret) 314 if (ret)
314 break; 315 break;
315 } 316 }
@@ -484,6 +485,8 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
484 v << __ffs(clkdm->clktrctrl_mask), 485 v << __ffs(clkdm->clktrctrl_mask),
485 clkdm->pwrdm.ptr->prcm_offs, 486 clkdm->pwrdm.ptr->prcm_offs,
486 CM_CLKSTCTRL); 487 CM_CLKSTCTRL);
488
489 pwrdm_clkdm_state_switch(clkdm);
487} 490}
488 491
489/** 492/**
@@ -572,6 +575,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
572 omap2_clkdm_wakeup(clkdm); 575 omap2_clkdm_wakeup(clkdm);
573 576
574 pwrdm_wait_transition(clkdm->pwrdm.ptr); 577 pwrdm_wait_transition(clkdm->pwrdm.ptr);
578 pwrdm_clkdm_state_switch(clkdm);
575 579
576 return 0; 580 return 0;
577} 581}
@@ -624,6 +628,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
624 else 628 else
625 omap2_clkdm_sleep(clkdm); 629 omap2_clkdm_sleep(clkdm);
626 630
631 pwrdm_clkdm_state_switch(clkdm);
632
627 return 0; 633 return 0;
628} 634}
629 635
diff --git a/arch/arm/mach-omap2/cm.c b/arch/arm/mach-omap2/cm.c
new file mode 100644
index 000000000000..8eb2dab8c7db
--- /dev/null
+++ b/arch/arm/mach-omap2/cm.c
@@ -0,0 +1,70 @@
1/*
2 * OMAP2/3 CM module functions
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/types.h>
15#include <linux/delay.h>
16#include <linux/spinlock.h>
17#include <linux/list.h>
18#include <linux/errno.h>
19#include <linux/err.h>
20#include <linux/io.h>
21
22#include <asm/atomic.h>
23
24#include "cm.h"
25#include "cm-regbits-24xx.h"
26#include "cm-regbits-34xx.h"
27
28/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
29#define MAX_MODULE_READY_TIME 20000
30
31static const u8 cm_idlest_offs[] = {
32 CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
33};
34
35/**
36 * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
37 * @prcm_mod: PRCM module offset
38 * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
39 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
40 *
41 * XXX document
42 */
43int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
44{
45 int ena = 0, i = 0;
46 u8 cm_idlest_reg;
47 u32 mask;
48
49 if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs)))
50 return -EINVAL;
51
52 cm_idlest_reg = cm_idlest_offs[idlest_id - 1];
53
54 if (cpu_is_omap24xx())
55 ena = idlest_shift;
56 else if (cpu_is_omap34xx())
57 ena = 0;
58 else
59 BUG();
60
61 mask = 1 << idlest_shift;
62
63 /* XXX should be OMAP2 CM */
64 while (((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) != ena) &&
65 (i++ < MAX_MODULE_READY_TIME))
66 udelay(1);
67
68 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
69}
70
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index f3c91a1ca391..cfd0b726ba44 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -17,11 +17,11 @@
17#include "prcm-common.h" 17#include "prcm-common.h"
18 18
19#define OMAP2420_CM_REGADDR(module, reg) \ 19#define OMAP2420_CM_REGADDR(module, reg) \
20 IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) 20 OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
21#define OMAP2430_CM_REGADDR(module, reg) \ 21#define OMAP2430_CM_REGADDR(module, reg) \
22 IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) 22 OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
23#define OMAP34XX_CM_REGADDR(module, reg) \ 23#define OMAP34XX_CM_REGADDR(module, reg) \
24 IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) 24 OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
25 25
26/* 26/*
27 * Architecture-specific global CM registers 27 * Architecture-specific global CM registers
@@ -98,6 +98,10 @@ extern u32 cm_read_mod_reg(s16 module, u16 idx);
98extern void cm_write_mod_reg(u32 val, s16 module, u16 idx); 98extern void cm_write_mod_reg(u32 val, s16 module, u16 idx);
99extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); 99extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
100 100
101extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
102 u8 idlest_shift);
103extern int omap4_cm_wait_module_ready(u32 prcm_mod, u8 prcm_dev_offs);
104
101static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) 105static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
102{ 106{
103 return cm_rmw_mod_reg_bits(bits, bits, module, idx); 107 return cm_rmw_mod_reg_bits(bits, bits, module, idx);
diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c
new file mode 100644
index 000000000000..e4ebd6d53135
--- /dev/null
+++ b/arch/arm/mach-omap2/cm4xxx.c
@@ -0,0 +1,68 @@
1/*
2 * OMAP4 CM module functions
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/types.h>
15#include <linux/delay.h>
16#include <linux/spinlock.h>
17#include <linux/list.h>
18#include <linux/errno.h>
19#include <linux/err.h>
20#include <linux/io.h>
21
22#include <asm/atomic.h>
23
24#include "cm.h"
25#include "cm-regbits-4xxx.h"
26
27/* XXX move this to cm.h */
28/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
29#define MAX_MODULE_READY_TIME 20000
30
31/*
32 * OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK: isolates the IDLEST field in the
33 * CM_CLKCTRL register.
34 */
35#define OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK (0x2 << 16)
36
37/*
38 * OMAP4 prcm_mod u32 fields contain packed data: the CM ID in bit 16 and
39 * the PRCM module offset address (from the CM module base) in bits 15-0.
40 */
41#define OMAP4_PRCM_MOD_CM_ID_SHIFT 16
42#define OMAP4_PRCM_MOD_OFFS_MASK 0xffff
43
44/**
45 * omap4_cm_wait_idlest_ready - wait for a module to leave idle or standby
46 * @prcm_mod: PRCM module offset (XXX example)
47 * @prcm_dev_offs: PRCM device offset (e.g. MCASP XXX example)
48 *
49 * XXX document
50 */
51int omap4_cm_wait_idlest_ready(u32 prcm_mod, u8 prcm_dev_offs)
52{
53 int i = 0;
54 u8 cm_id;
55 u16 prcm_mod_offs;
56 u32 mask = OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK;
57
58 cm_id = prcm_mod >> OMAP4_PRCM_MOD_CM_ID_SHIFT;
59 prcm_mod_offs = prcm_mod & OMAP4_PRCM_MOD_OFFS_MASK;
60
61 while (((omap4_cm_read_mod_reg(cm_id, prcm_mod_offs, prcm_dev_offs,
62 OMAP4_CM_CLKCTRL_DREG) & mask) != 0) &&
63 (i++ < MAX_MODULE_READY_TIME))
64 udelay(1);
65
66 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
67}
68
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 894cc355818a..a2e915639b72 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -513,6 +513,47 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
513 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); 513 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
514 } 514 }
515 } 515 }
516
517 if (cpu_is_omap3430()) {
518 if (controller_nr == 0) {
519 omap_cfg_reg(N28_3430_MMC1_CLK);
520 omap_cfg_reg(M27_3430_MMC1_CMD);
521 omap_cfg_reg(N27_3430_MMC1_DAT0);
522 if (mmc_controller->slots[0].wires == 4 ||
523 mmc_controller->slots[0].wires == 8) {
524 omap_cfg_reg(N26_3430_MMC1_DAT1);
525 omap_cfg_reg(N25_3430_MMC1_DAT2);
526 omap_cfg_reg(P28_3430_MMC1_DAT3);
527 }
528 if (mmc_controller->slots[0].wires == 8) {
529 omap_cfg_reg(P27_3430_MMC1_DAT4);
530 omap_cfg_reg(P26_3430_MMC1_DAT5);
531 omap_cfg_reg(R27_3430_MMC1_DAT6);
532 omap_cfg_reg(R25_3430_MMC1_DAT7);
533 }
534 }
535 if (controller_nr == 1) {
536 /* MMC2 */
537 omap_cfg_reg(AE2_3430_MMC2_CLK);
538 omap_cfg_reg(AG5_3430_MMC2_CMD);
539 omap_cfg_reg(AH5_3430_MMC2_DAT0);
540
541 /*
542 * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
543 * in the board-*.c files
544 */
545 if (mmc_controller->slots[0].wires == 4 ||
546 mmc_controller->slots[0].wires == 8) {
547 omap_cfg_reg(AH4_3430_MMC2_DAT1);
548 omap_cfg_reg(AG4_3430_MMC2_DAT2);
549 omap_cfg_reg(AF4_3430_MMC2_DAT3);
550 }
551 }
552
553 /*
554 * For MMC3 the pins need to be muxed in the board-*.c files
555 */
556 }
516} 557}
517 558
518void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, 559void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e9b9bcb19b4e..7574b6f20e8e 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -32,17 +32,23 @@
32#include <mach/sram.h> 32#include <mach/sram.h>
33#include <mach/sdrc.h> 33#include <mach/sdrc.h>
34#include <mach/gpmc.h> 34#include <mach/gpmc.h>
35#include <mach/serial.h>
35 36
36#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ 37#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */
37#include "clock.h" 38#include "clock.h"
38 39
40#include <mach/omap-pm.h>
39#include <mach/powerdomain.h> 41#include <mach/powerdomain.h>
40
41#include "powerdomains.h" 42#include "powerdomains.h"
42 43
43#include <mach/clockdomain.h> 44#include <mach/clockdomain.h>
44#include "clockdomains.h" 45#include "clockdomains.h"
45#endif 46#endif
47#include <mach/omap_hwmod.h>
48#include "omap_hwmod_2420.h"
49#include "omap_hwmod_2430.h"
50#include "omap_hwmod_34xx.h"
51
46/* 52/*
47 * The machine specific code may provide the extra mapping besides the 53 * The machine specific code may provide the extra mapping besides the
48 * default mapping provided here. 54 * default mapping provided here.
@@ -279,11 +285,26 @@ static int __init _omap2_init_reprogram_sdrc(void)
279void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, 285void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
280 struct omap_sdrc_params *sdrc_cs1) 286 struct omap_sdrc_params *sdrc_cs1)
281{ 287{
288 struct omap_hwmod **hwmods = NULL;
289
290 if (cpu_is_omap2420())
291 hwmods = omap2420_hwmods;
292 else if (cpu_is_omap2430())
293 hwmods = omap2430_hwmods;
294 else if (cpu_is_omap34xx())
295 hwmods = omap34xx_hwmods;
296
297 omap_hwmod_init(hwmods);
282 omap2_mux_init(); 298 omap2_mux_init();
283#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */ 299#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
300 /* The OPP tables have to be registered before a clk init */
301 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
284 pwrdm_init(powerdomains_omap); 302 pwrdm_init(powerdomains_omap);
285 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); 303 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
286 omap2_clk_init(); 304 omap2_clk_init();
305 omap_serial_early_init();
306 omap_hwmod_late_init();
307 omap_pm_if_init();
287 omap2_sdrc_init(sdrc_cs0, sdrc_cs1); 308 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
288 _omap2_init_reprogram_sdrc(); 309 _omap2_init_reprogram_sdrc();
289#endif 310#endif
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index 015f22a53ead..2d9b5cc981cd 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -217,10 +217,19 @@ static ssize_t omap2_dump_cr(struct iommu *obj, struct cr_regs *cr, char *buf)
217} 217}
218 218
219#define pr_reg(name) \ 219#define pr_reg(name) \
220 p += sprintf(p, "%20s: %08x\n", \ 220 do { \
221 __stringify(name), iommu_read_reg(obj, MMU_##name)); 221 ssize_t bytes; \
222 222 const char *str = "%20s: %08x\n"; \
223static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf) 223 const int maxcol = 32; \
224 bytes = snprintf(p, maxcol, str, __stringify(name), \
225 iommu_read_reg(obj, MMU_##name)); \
226 p += bytes; \
227 len -= bytes; \
228 if (len < maxcol) \
229 goto out; \
230 } while (0)
231
232static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len)
224{ 233{
225 char *p = buf; 234 char *p = buf;
226 235
@@ -242,7 +251,7 @@ static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf)
242 pr_reg(READ_CAM); 251 pr_reg(READ_CAM);
243 pr_reg(READ_RAM); 252 pr_reg(READ_RAM);
244 pr_reg(EMU_FAULT_AD); 253 pr_reg(EMU_FAULT_AD);
245 254out:
246 return p - buf; 255 return p - buf;
247} 256}
248 257
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 43d6b92b65f2..2daa595aaff4 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -492,6 +492,61 @@ MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262,
492 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) 492 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
493MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264, 493MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,
494 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) 494 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
495
496/* MMC1 */
497MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144,
498 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
499MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146,
500 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
501MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148,
502 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
503MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a,
504 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
505MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c,
506 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
507MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e,
508 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
509MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150,
510 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
511MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152,
512 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
513MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154,
514 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
515MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156,
516 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
517
518/* MMC2 */
519MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158,
520 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
521MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A,
522 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
523MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c,
524 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
525MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e,
526 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
527MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160,
528 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
529MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162,
530 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
531
532/* MMC3 */
533MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8,
534 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
535MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0,
536 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLUP)
537MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4,
538 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
539MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6,
540 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
541MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8,
542 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
543MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
544 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
545
546/* SYS_NIRQ T2 INT1 */
547MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0,
548 OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP |
549 OMAP34XX_MUX_MODE0)
495}; 550};
496 551
497#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) 552#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 8fe8d230f21b..48ee295db275 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -54,7 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
54 * for us: do so 54 * for us: do so
55 */ 55 */
56 56
57 gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); 57 gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
58 58
59 /* 59 /*
60 * Synchronise with the boot thread. 60 * Synchronise with the boot thread.
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
new file mode 100644
index 000000000000..d2e0f1c95961
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -0,0 +1,1554 @@
1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 * With fixes and testing from Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Benoit Cousson,
9 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
10 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This code manages "OMAP modules" (on-chip devices) and their
17 * integration with Linux device driver and bus code.
18 *
19 * References:
20 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
21 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
22 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
23 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
24 * - Open Core Protocol Specification 2.2
25 *
26 * To do:
27 * - pin mux handling
28 * - handle IO mapping
29 * - bus throughput & module latency measurement code
30 *
31 * XXX add tests at the beginning of each function to ensure the hwmod is
32 * in the appropriate state
33 * XXX error return values should be checked to ensure that they are
34 * appropriate
35 */
36#undef DEBUG
37
38#include <linux/kernel.h>
39#include <linux/errno.h>
40#include <linux/io.h>
41#include <linux/clk.h>
42#include <linux/delay.h>
43#include <linux/err.h>
44#include <linux/list.h>
45#include <linux/mutex.h>
46#include <linux/bootmem.h>
47
48#include <mach/cpu.h>
49#include <mach/clockdomain.h>
50#include <mach/powerdomain.h>
51#include <mach/clock.h>
52#include <mach/omap_hwmod.h>
53
54#include "cm.h"
55
56/* Maximum microseconds to wait for OMAP module to reset */
57#define MAX_MODULE_RESET_WAIT 10000
58
59/* Name of the OMAP hwmod for the MPU */
60#define MPU_INITIATOR_NAME "mpu_hwmod"
61
62/* omap_hwmod_list contains all registered struct omap_hwmods */
63static LIST_HEAD(omap_hwmod_list);
64
65static DEFINE_MUTEX(omap_hwmod_mutex);
66
67/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
68static struct omap_hwmod *mpu_oh;
69
70/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
71static u8 inited;
72
73
74/* Private functions */
75
76/**
77 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
78 * @oh: struct omap_hwmod *
79 *
80 * Load the current value of the hwmod OCP_SYSCONFIG register into the
81 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
82 * OCP_SYSCONFIG register or 0 upon success.
83 */
84static int _update_sysc_cache(struct omap_hwmod *oh)
85{
86 if (!oh->sysconfig) {
87 WARN(!oh->sysconfig, "omap_hwmod: %s: cannot read "
88 "OCP_SYSCONFIG: not defined on hwmod\n", oh->name);
89 return -EINVAL;
90 }
91
92 /* XXX ensure module interface clock is up */
93
94 oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs);
95
96 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
97
98 return 0;
99}
100
101/**
102 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
103 * @v: OCP_SYSCONFIG value to write
104 * @oh: struct omap_hwmod *
105 *
106 * Write @v into the module OCP_SYSCONFIG register, if it has one. No
107 * return value.
108 */
109static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
110{
111 if (!oh->sysconfig) {
112 WARN(!oh->sysconfig, "omap_hwmod: %s: cannot write "
113 "OCP_SYSCONFIG: not defined on hwmod\n", oh->name);
114 return;
115 }
116
117 /* XXX ensure module interface clock is up */
118
119 if (oh->_sysc_cache != v) {
120 oh->_sysc_cache = v;
121 omap_hwmod_writel(v, oh, oh->sysconfig->sysc_offs);
122 }
123}
124
125/**
126 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
127 * @oh: struct omap_hwmod *
128 * @standbymode: MIDLEMODE field bits
129 * @v: pointer to register contents to modify
130 *
131 * Update the master standby mode bits in @v to be @standbymode for
132 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
133 * upon error or 0 upon success.
134 */
135static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
136 u32 *v)
137{
138 if (!oh->sysconfig ||
139 !(oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE))
140 return -EINVAL;
141
142 *v &= ~SYSC_MIDLEMODE_MASK;
143 *v |= __ffs(standbymode) << SYSC_MIDLEMODE_SHIFT;
144
145 return 0;
146}
147
148/**
149 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
150 * @oh: struct omap_hwmod *
151 * @idlemode: SIDLEMODE field bits
152 * @v: pointer to register contents to modify
153 *
154 * Update the slave idle mode bits in @v to be @idlemode for the @oh
155 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
156 * or 0 upon success.
157 */
158static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
159{
160 if (!oh->sysconfig ||
161 !(oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE))
162 return -EINVAL;
163
164 *v &= ~SYSC_SIDLEMODE_MASK;
165 *v |= __ffs(idlemode) << SYSC_SIDLEMODE_SHIFT;
166
167 return 0;
168}
169
170/**
171 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
172 * @oh: struct omap_hwmod *
173 * @clockact: CLOCKACTIVITY field bits
174 * @v: pointer to register contents to modify
175 *
176 * Update the clockactivity mode bits in @v to be @clockact for the
177 * @oh hwmod. Used for additional powersaving on some modules. Does
178 * not write to the hardware. Returns -EINVAL upon error or 0 upon
179 * success.
180 */
181static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
182{
183 if (!oh->sysconfig ||
184 !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
185 return -EINVAL;
186
187 *v &= ~SYSC_CLOCKACTIVITY_MASK;
188 *v |= clockact << SYSC_CLOCKACTIVITY_SHIFT;
189
190 return 0;
191}
192
193/**
194 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
195 * @oh: struct omap_hwmod *
196 * @v: pointer to register contents to modify
197 *
198 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
199 * error or 0 upon success.
200 */
201static int _set_softreset(struct omap_hwmod *oh, u32 *v)
202{
203 if (!oh->sysconfig ||
204 !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET))
205 return -EINVAL;
206
207 *v |= SYSC_SOFTRESET_MASK;
208
209 return 0;
210}
211
212/**
213 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
214 * @oh: struct omap_hwmod *
215 *
216 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
217 * upon error or 0 upon success.
218 */
219static int _enable_wakeup(struct omap_hwmod *oh)
220{
221 u32 v;
222
223 if (!oh->sysconfig ||
224 !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
225 return -EINVAL;
226
227 v = oh->_sysc_cache;
228 v |= SYSC_ENAWAKEUP_MASK;
229 _write_sysconfig(v, oh);
230
231 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
232
233 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
234
235 return 0;
236}
237
238/**
239 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
240 * @oh: struct omap_hwmod *
241 *
242 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
243 * upon error or 0 upon success.
244 */
245static int _disable_wakeup(struct omap_hwmod *oh)
246{
247 u32 v;
248
249 if (!oh->sysconfig ||
250 !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
251 return -EINVAL;
252
253 v = oh->_sysc_cache;
254 v &= ~SYSC_ENAWAKEUP_MASK;
255 _write_sysconfig(v, oh);
256
257 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
258
259 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
260
261 return 0;
262}
263
264/**
265 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
266 * @oh: struct omap_hwmod *
267 *
268 * Prevent the hardware module @oh from entering idle while the
269 * hardare module initiator @init_oh is active. Useful when a module
270 * will be accessed by a particular initiator (e.g., if a module will
271 * be accessed by the IVA, there should be a sleepdep between the IVA
272 * initiator and the module). Only applies to modules in smart-idle
273 * mode. Returns -EINVAL upon error or passes along
274 * pwrdm_add_sleepdep() value upon success.
275 */
276static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
277{
278 if (!oh->_clk)
279 return -EINVAL;
280
281 return pwrdm_add_sleepdep(oh->_clk->clkdm->pwrdm.ptr,
282 init_oh->_clk->clkdm->pwrdm.ptr);
283}
284
285/**
286 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
287 * @oh: struct omap_hwmod *
288 *
289 * Allow the hardware module @oh to enter idle while the hardare
290 * module initiator @init_oh is active. Useful when a module will not
291 * be accessed by a particular initiator (e.g., if a module will not
292 * be accessed by the IVA, there should be no sleepdep between the IVA
293 * initiator and the module). Only applies to modules in smart-idle
294 * mode. Returns -EINVAL upon error or passes along
295 * pwrdm_add_sleepdep() value upon success.
296 */
297static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
298{
299 if (!oh->_clk)
300 return -EINVAL;
301
302 return pwrdm_del_sleepdep(oh->_clk->clkdm->pwrdm.ptr,
303 init_oh->_clk->clkdm->pwrdm.ptr);
304}
305
306/**
307 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
308 * @oh: struct omap_hwmod *
309 *
310 * Called from _init_clocks(). Populates the @oh _clk (main
311 * functional clock pointer) if a main_clk is present. Returns 0 on
312 * success or -EINVAL on error.
313 */
314static int _init_main_clk(struct omap_hwmod *oh)
315{
316 struct clk *c;
317 int ret = 0;
318
319 if (!oh->clkdev_con_id)
320 return 0;
321
322 c = clk_get_sys(oh->clkdev_dev_id, oh->clkdev_con_id);
323 WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get main_clk %s.%s\n",
324 oh->name, oh->clkdev_dev_id, oh->clkdev_con_id);
325 if (IS_ERR(c))
326 ret = -EINVAL;
327 oh->_clk = c;
328
329 return ret;
330}
331
332/**
333 * _init_interface_clk - get a struct clk * for the the hwmod's interface clks
334 * @oh: struct omap_hwmod *
335 *
336 * Called from _init_clocks(). Populates the @oh OCP slave interface
337 * clock pointers. Returns 0 on success or -EINVAL on error.
338 */
339static int _init_interface_clks(struct omap_hwmod *oh)
340{
341 struct omap_hwmod_ocp_if *os;
342 struct clk *c;
343 int i;
344 int ret = 0;
345
346 if (oh->slaves_cnt == 0)
347 return 0;
348
349 for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
350 if (!os->clkdev_con_id)
351 continue;
352
353 c = clk_get_sys(os->clkdev_dev_id, os->clkdev_con_id);
354 WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get "
355 "interface_clk %s.%s\n", oh->name,
356 os->clkdev_dev_id, os->clkdev_con_id);
357 if (IS_ERR(c))
358 ret = -EINVAL;
359 os->_clk = c;
360 }
361
362 return ret;
363}
364
365/**
366 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
367 * @oh: struct omap_hwmod *
368 *
369 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
370 * clock pointers. Returns 0 on success or -EINVAL on error.
371 */
372static int _init_opt_clks(struct omap_hwmod *oh)
373{
374 struct omap_hwmod_opt_clk *oc;
375 struct clk *c;
376 int i;
377 int ret = 0;
378
379 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
380 c = clk_get_sys(oc->clkdev_dev_id, oc->clkdev_con_id);
381 WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get opt_clk "
382 "%s.%s\n", oh->name, oc->clkdev_dev_id,
383 oc->clkdev_con_id);
384 if (IS_ERR(c))
385 ret = -EINVAL;
386 oc->_clk = c;
387 }
388
389 return ret;
390}
391
392/**
393 * _enable_clocks - enable hwmod main clock and interface clocks
394 * @oh: struct omap_hwmod *
395 *
396 * Enables all clocks necessary for register reads and writes to succeed
397 * on the hwmod @oh. Returns 0.
398 */
399static int _enable_clocks(struct omap_hwmod *oh)
400{
401 struct omap_hwmod_ocp_if *os;
402 int i;
403
404 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
405
406 if (oh->_clk && !IS_ERR(oh->_clk))
407 clk_enable(oh->_clk);
408
409 if (oh->slaves_cnt > 0) {
410 for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
411 struct clk *c = os->_clk;
412
413 if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE))
414 clk_enable(c);
415 }
416 }
417
418 /* The opt clocks are controlled by the device driver. */
419
420 return 0;
421}
422
423/**
424 * _disable_clocks - disable hwmod main clock and interface clocks
425 * @oh: struct omap_hwmod *
426 *
427 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
428 */
429static int _disable_clocks(struct omap_hwmod *oh)
430{
431 struct omap_hwmod_ocp_if *os;
432 int i;
433
434 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
435
436 if (oh->_clk && !IS_ERR(oh->_clk))
437 clk_disable(oh->_clk);
438
439 if (oh->slaves_cnt > 0) {
440 for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
441 struct clk *c = os->_clk;
442
443 if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE))
444 clk_disable(c);
445 }
446 }
447
448 /* The opt clocks are controlled by the device driver. */
449
450 return 0;
451}
452
453/**
454 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
455 * @oh: struct omap_hwmod *
456 *
457 * Returns the array index of the OCP slave port that the MPU
458 * addresses the device on, or -EINVAL upon error or not found.
459 */
460static int _find_mpu_port_index(struct omap_hwmod *oh)
461{
462 struct omap_hwmod_ocp_if *os;
463 int i;
464 int found = 0;
465
466 if (!oh || oh->slaves_cnt == 0)
467 return -EINVAL;
468
469 for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
470 if (os->user & OCP_USER_MPU) {
471 found = 1;
472 break;
473 }
474 }
475
476 if (found)
477 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
478 oh->name, i);
479 else
480 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
481 oh->name);
482
483 return (found) ? i : -EINVAL;
484}
485
486/**
487 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
488 * @oh: struct omap_hwmod *
489 *
490 * Return the virtual address of the base of the register target of
491 * device @oh, or NULL on error.
492 */
493static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
494{
495 struct omap_hwmod_ocp_if *os;
496 struct omap_hwmod_addr_space *mem;
497 int i;
498 int found = 0;
499
500 if (!oh || oh->slaves_cnt == 0)
501 return NULL;
502
503 os = *oh->slaves + index;
504
505 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
506 if (mem->flags & ADDR_TYPE_RT) {
507 found = 1;
508 break;
509 }
510 }
511
512 /* XXX use ioremap() instead? */
513
514 if (found)
515 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
516 oh->name, OMAP2_IO_ADDRESS(mem->pa_start));
517 else
518 pr_debug("omap_hwmod: %s: no MPU register target found\n",
519 oh->name);
520
521 return (found) ? OMAP2_IO_ADDRESS(mem->pa_start) : NULL;
522}
523
524/**
525 * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG
526 * @oh: struct omap_hwmod *
527 *
528 * If module is marked as SWSUP_SIDLE, force the module out of slave
529 * idle; otherwise, configure it for smart-idle. If module is marked
530 * as SWSUP_MSUSPEND, force the module out of master standby;
531 * otherwise, configure it for smart-standby. No return value.
532 */
533static void _sysc_enable(struct omap_hwmod *oh)
534{
535 u8 idlemode;
536 u32 v;
537
538 if (!oh->sysconfig)
539 return;
540
541 v = oh->_sysc_cache;
542
543 if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) {
544 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
545 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
546 _set_slave_idlemode(oh, idlemode, &v);
547 }
548
549 if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) {
550 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
551 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
552 _set_master_standbymode(oh, idlemode, &v);
553 }
554
555 /* XXX OCP AUTOIDLE bit? */
556
557 if (oh->flags & HWMOD_SET_DEFAULT_CLOCKACT &&
558 oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY)
559 _set_clockactivity(oh, oh->sysconfig->clockact, &v);
560
561 _write_sysconfig(v, oh);
562}
563
564/**
565 * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG
566 * @oh: struct omap_hwmod *
567 *
568 * If module is marked as SWSUP_SIDLE, force the module into slave
569 * idle; otherwise, configure it for smart-idle. If module is marked
570 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
571 * configure it for smart-standby. No return value.
572 */
573static void _sysc_idle(struct omap_hwmod *oh)
574{
575 u8 idlemode;
576 u32 v;
577
578 if (!oh->sysconfig)
579 return;
580
581 v = oh->_sysc_cache;
582
583 if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) {
584 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
585 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
586 _set_slave_idlemode(oh, idlemode, &v);
587 }
588
589 if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) {
590 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
591 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
592 _set_master_standbymode(oh, idlemode, &v);
593 }
594
595 _write_sysconfig(v, oh);
596}
597
598/**
599 * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG
600 * @oh: struct omap_hwmod *
601 *
602 * Force the module into slave idle and master suspend. No return
603 * value.
604 */
605static void _sysc_shutdown(struct omap_hwmod *oh)
606{
607 u32 v;
608
609 if (!oh->sysconfig)
610 return;
611
612 v = oh->_sysc_cache;
613
614 if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE)
615 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
616
617 if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE)
618 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
619
620 /* XXX clear OCP AUTOIDLE bit? */
621
622 _write_sysconfig(v, oh);
623}
624
625/**
626 * _lookup - find an omap_hwmod by name
627 * @name: find an omap_hwmod by name
628 *
629 * Return a pointer to an omap_hwmod by name, or NULL if not found.
630 * Caller must hold omap_hwmod_mutex.
631 */
632static struct omap_hwmod *_lookup(const char *name)
633{
634 struct omap_hwmod *oh, *temp_oh;
635
636 oh = NULL;
637
638 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
639 if (!strcmp(name, temp_oh->name)) {
640 oh = temp_oh;
641 break;
642 }
643 }
644
645 return oh;
646}
647
648/**
649 * _init_clocks - clk_get() all clocks associated with this hwmod
650 * @oh: struct omap_hwmod *
651 *
652 * Called by omap_hwmod_late_init() (after omap2_clk_init()).
653 * Resolves all clock names embedded in the hwmod. Must be called
654 * with omap_hwmod_mutex held. Returns -EINVAL if the omap_hwmod
655 * has not yet been registered or if the clocks have already been
656 * initialized, 0 on success, or a non-zero error on failure.
657 */
658static int _init_clocks(struct omap_hwmod *oh)
659{
660 int ret = 0;
661
662 if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
663 return -EINVAL;
664
665 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
666
667 ret |= _init_main_clk(oh);
668 ret |= _init_interface_clks(oh);
669 ret |= _init_opt_clks(oh);
670
671 oh->_state = _HWMOD_STATE_CLKS_INITED;
672
673 return ret;
674}
675
676/**
677 * _wait_target_ready - wait for a module to leave slave idle
678 * @oh: struct omap_hwmod *
679 *
680 * Wait for a module @oh to leave slave idle. Returns 0 if the module
681 * does not have an IDLEST bit or if the module successfully leaves
682 * slave idle; otherwise, pass along the return value of the
683 * appropriate *_cm_wait_module_ready() function.
684 */
685static int _wait_target_ready(struct omap_hwmod *oh)
686{
687 struct omap_hwmod_ocp_if *os;
688 int ret;
689
690 if (!oh)
691 return -EINVAL;
692
693 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
694 return 0;
695
696 os = *oh->slaves + oh->_mpu_port_index;
697
698 if (!(os->flags & OCPIF_HAS_IDLEST))
699 return 0;
700
701 /* XXX check module SIDLEMODE */
702
703 /* XXX check clock enable states */
704
705 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
706 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
707 oh->prcm.omap2.idlest_reg_id,
708 oh->prcm.omap2.idlest_idle_bit);
709#if 0
710 } else if (cpu_is_omap44xx()) {
711 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.module_offs,
712 oh->prcm.omap4.device_offs);
713#endif
714 } else {
715 BUG();
716 };
717
718 return ret;
719}
720
721/**
722 * _reset - reset an omap_hwmod
723 * @oh: struct omap_hwmod *
724 *
725 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
726 * enabled for this to work. Must be called with omap_hwmod_mutex
727 * held. Returns -EINVAL if the hwmod cannot be reset this way or if
728 * the hwmod is in the wrong state, -ETIMEDOUT if the module did not
729 * reset in time, or 0 upon success.
730 */
731static int _reset(struct omap_hwmod *oh)
732{
733 u32 r, v;
734 int c;
735
736 if (!oh->sysconfig ||
737 !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET) ||
738 (oh->sysconfig->sysc_flags & SYSS_MISSING))
739 return -EINVAL;
740
741 /* clocks must be on for this operation */
742 if (oh->_state != _HWMOD_STATE_ENABLED) {
743 WARN(1, "omap_hwmod: %s: reset can only be entered from "
744 "enabled state\n", oh->name);
745 return -EINVAL;
746 }
747
748 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
749
750 v = oh->_sysc_cache;
751 r = _set_softreset(oh, &v);
752 if (r)
753 return r;
754 _write_sysconfig(v, oh);
755
756 c = 0;
757 while (c < MAX_MODULE_RESET_WAIT &&
758 !(omap_hwmod_readl(oh, oh->sysconfig->syss_offs) &
759 SYSS_RESETDONE_MASK)) {
760 udelay(1);
761 c++;
762 }
763
764 if (c == MAX_MODULE_RESET_WAIT)
765 WARN(1, "omap_hwmod: %s: failed to reset in %d usec\n",
766 oh->name, MAX_MODULE_RESET_WAIT);
767 else
768 pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, c);
769
770 /*
771 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
772 * _wait_target_ready() or _reset()
773 */
774
775 return (c == MAX_MODULE_RESET_WAIT) ? -ETIMEDOUT : 0;
776}
777
778/**
779 * _enable - enable an omap_hwmod
780 * @oh: struct omap_hwmod *
781 *
782 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
783 * register target. Must be called with omap_hwmod_mutex held.
784 * Returns -EINVAL if the hwmod is in the wrong state or passes along
785 * the return value of _wait_target_ready().
786 */
787static int _enable(struct omap_hwmod *oh)
788{
789 int r;
790
791 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
792 oh->_state != _HWMOD_STATE_IDLE &&
793 oh->_state != _HWMOD_STATE_DISABLED) {
794 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
795 "from initialized, idle, or disabled state\n", oh->name);
796 return -EINVAL;
797 }
798
799 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
800
801 /* XXX mux balls */
802
803 _add_initiator_dep(oh, mpu_oh);
804 _enable_clocks(oh);
805
806 if (oh->sysconfig) {
807 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
808 _update_sysc_cache(oh);
809 _sysc_enable(oh);
810 }
811
812 r = _wait_target_ready(oh);
813 if (!r)
814 oh->_state = _HWMOD_STATE_ENABLED;
815
816 return r;
817}
818
819/**
820 * _idle - idle an omap_hwmod
821 * @oh: struct omap_hwmod *
822 *
823 * Idles an omap_hwmod @oh. This should be called once the hwmod has
824 * no further work. Returns -EINVAL if the hwmod is in the wrong
825 * state or returns 0.
826 */
827static int _idle(struct omap_hwmod *oh)
828{
829 if (oh->_state != _HWMOD_STATE_ENABLED) {
830 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
831 "enabled state\n", oh->name);
832 return -EINVAL;
833 }
834
835 pr_debug("omap_hwmod: %s: idling\n", oh->name);
836
837 if (oh->sysconfig)
838 _sysc_idle(oh);
839 _del_initiator_dep(oh, mpu_oh);
840 _disable_clocks(oh);
841
842 oh->_state = _HWMOD_STATE_IDLE;
843
844 return 0;
845}
846
847/**
848 * _shutdown - shutdown an omap_hwmod
849 * @oh: struct omap_hwmod *
850 *
851 * Shut down an omap_hwmod @oh. This should be called when the driver
852 * used for the hwmod is removed or unloaded or if the driver is not
853 * used by the system. Returns -EINVAL if the hwmod is in the wrong
854 * state or returns 0.
855 */
856static int _shutdown(struct omap_hwmod *oh)
857{
858 if (oh->_state != _HWMOD_STATE_IDLE &&
859 oh->_state != _HWMOD_STATE_ENABLED) {
860 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
861 "from idle, or enabled state\n", oh->name);
862 return -EINVAL;
863 }
864
865 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
866
867 if (oh->sysconfig)
868 _sysc_shutdown(oh);
869 _del_initiator_dep(oh, mpu_oh);
870 /* XXX what about the other system initiators here? DMA, tesla, d2d */
871 _disable_clocks(oh);
872 /* XXX Should this code also force-disable the optional clocks? */
873
874 /* XXX mux any associated balls to safe mode */
875
876 oh->_state = _HWMOD_STATE_DISABLED;
877
878 return 0;
879}
880
881/**
882 * _write_clockact_lock - set the module's clockactivity bits
883 * @oh: struct omap_hwmod *
884 * @clockact: CLOCKACTIVITY field bits
885 *
886 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
887 * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
888 * wrong state or returns 0.
889 */
890static int _write_clockact_lock(struct omap_hwmod *oh, u8 clockact)
891{
892 u32 v;
893
894 if (!oh->sysconfig ||
895 !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
896 return -EINVAL;
897
898 mutex_lock(&omap_hwmod_mutex);
899 v = oh->_sysc_cache;
900 _set_clockactivity(oh, clockact, &v);
901 _write_sysconfig(v, oh);
902 mutex_unlock(&omap_hwmod_mutex);
903
904 return 0;
905}
906
907
908/**
909 * _setup - do initial configuration of omap_hwmod
910 * @oh: struct omap_hwmod *
911 *
912 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
913 * OCP_SYSCONFIG register. Must be called with omap_hwmod_mutex
914 * held. Returns -EINVAL if the hwmod is in the wrong state or returns
915 * 0.
916 */
917static int _setup(struct omap_hwmod *oh)
918{
919 struct omap_hwmod_ocp_if *os;
920 int i;
921
922 if (!oh)
923 return -EINVAL;
924
925 /* Set iclk autoidle mode */
926 if (oh->slaves_cnt > 0) {
927 for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
928 struct clk *c = os->_clk;
929
930 if (!c || IS_ERR(c))
931 continue;
932
933 if (os->flags & OCPIF_SWSUP_IDLE) {
934 /* XXX omap_iclk_deny_idle(c); */
935 } else {
936 /* XXX omap_iclk_allow_idle(c); */
937 clk_enable(c);
938 }
939 }
940 }
941
942 oh->_state = _HWMOD_STATE_INITIALIZED;
943
944 _enable(oh);
945
946 if (!(oh->flags & HWMOD_INIT_NO_RESET))
947 _reset(oh);
948
949 /* XXX OCP AUTOIDLE bit? */
950 /* XXX OCP ENAWAKEUP bit? */
951
952 if (!(oh->flags & HWMOD_INIT_NO_IDLE))
953 _idle(oh);
954
955 return 0;
956}
957
958
959
960/* Public functions */
961
962u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
963{
964 return __raw_readl(oh->_rt_va + reg_offs);
965}
966
967void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
968{
969 __raw_writel(v, oh->_rt_va + reg_offs);
970}
971
972/**
973 * omap_hwmod_register - register a struct omap_hwmod
974 * @oh: struct omap_hwmod *
975 *
976 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod already
977 * has been registered by the same name; -EINVAL if the omap_hwmod is in the
978 * wrong state, or 0 on success.
979 *
980 * XXX The data should be copied into bootmem, so the original data
981 * should be marked __initdata and freed after init. This would allow
982 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
983 * that the copy process would be relatively complex due to the large number
984 * of substructures.
985 */
986int omap_hwmod_register(struct omap_hwmod *oh)
987{
988 int ret, ms_id;
989
990 if (!oh || (oh->_state != _HWMOD_STATE_UNKNOWN))
991 return -EINVAL;
992
993 mutex_lock(&omap_hwmod_mutex);
994
995 pr_debug("omap_hwmod: %s: registering\n", oh->name);
996
997 if (_lookup(oh->name)) {
998 ret = -EEXIST;
999 goto ohr_unlock;
1000 }
1001
1002 ms_id = _find_mpu_port_index(oh);
1003 if (!IS_ERR_VALUE(ms_id)) {
1004 oh->_mpu_port_index = ms_id;
1005 oh->_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
1006 } else {
1007 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1008 }
1009
1010 list_add_tail(&oh->node, &omap_hwmod_list);
1011
1012 oh->_state = _HWMOD_STATE_REGISTERED;
1013
1014 ret = 0;
1015
1016ohr_unlock:
1017 mutex_unlock(&omap_hwmod_mutex);
1018 return ret;
1019}
1020
1021/**
1022 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1023 * @name: name of the omap_hwmod to look up
1024 *
1025 * Given a @name of an omap_hwmod, return a pointer to the registered
1026 * struct omap_hwmod *, or NULL upon error.
1027 */
1028struct omap_hwmod *omap_hwmod_lookup(const char *name)
1029{
1030 struct omap_hwmod *oh;
1031
1032 if (!name)
1033 return NULL;
1034
1035 mutex_lock(&omap_hwmod_mutex);
1036 oh = _lookup(name);
1037 mutex_unlock(&omap_hwmod_mutex);
1038
1039 return oh;
1040}
1041
1042/**
1043 * omap_hwmod_for_each - call function for each registered omap_hwmod
1044 * @fn: pointer to a callback function
1045 *
1046 * Call @fn for each registered omap_hwmod, passing @data to each
1047 * function. @fn must return 0 for success or any other value for
1048 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1049 * will stop and the non-zero return value will be passed to the
1050 * caller of omap_hwmod_for_each(). @fn is called with
1051 * omap_hwmod_for_each() held.
1052 */
1053int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh))
1054{
1055 struct omap_hwmod *temp_oh;
1056 int ret;
1057
1058 if (!fn)
1059 return -EINVAL;
1060
1061 mutex_lock(&omap_hwmod_mutex);
1062 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1063 ret = (*fn)(temp_oh);
1064 if (ret)
1065 break;
1066 }
1067 mutex_unlock(&omap_hwmod_mutex);
1068
1069 return ret;
1070}
1071
1072
1073/**
1074 * omap_hwmod_init - init omap_hwmod code and register hwmods
1075 * @ohs: pointer to an array of omap_hwmods to register
1076 *
1077 * Intended to be called early in boot before the clock framework is
1078 * initialized. If @ohs is not null, will register all omap_hwmods
1079 * listed in @ohs that are valid for this chip. Returns -EINVAL if
1080 * omap_hwmod_init() has already been called or 0 otherwise.
1081 */
1082int omap_hwmod_init(struct omap_hwmod **ohs)
1083{
1084 struct omap_hwmod *oh;
1085 int r;
1086
1087 if (inited)
1088 return -EINVAL;
1089
1090 inited = 1;
1091
1092 if (!ohs)
1093 return 0;
1094
1095 oh = *ohs;
1096 while (oh) {
1097 if (omap_chip_is(oh->omap_chip)) {
1098 r = omap_hwmod_register(oh);
1099 WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
1100 "%d\n", oh->name, r);
1101 }
1102 oh = *++ohs;
1103 }
1104
1105 return 0;
1106}
1107
1108/**
1109 * omap_hwmod_late_init - do some post-clock framework initialization
1110 *
1111 * Must be called after omap2_clk_init(). Resolves the struct clk names
1112 * to struct clk pointers for each registered omap_hwmod. Also calls
1113 * _setup() on each hwmod. Returns 0.
1114 */
1115int omap_hwmod_late_init(void)
1116{
1117 int r;
1118
1119 /* XXX check return value */
1120 r = omap_hwmod_for_each(_init_clocks);
1121 WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
1122
1123 mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
1124 WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
1125 MPU_INITIATOR_NAME);
1126
1127 omap_hwmod_for_each(_setup);
1128
1129 return 0;
1130}
1131
1132/**
1133 * omap_hwmod_unregister - unregister an omap_hwmod
1134 * @oh: struct omap_hwmod *
1135 *
1136 * Unregisters a previously-registered omap_hwmod @oh. There's probably
1137 * no use case for this, so it is likely to be removed in a later version.
1138 *
1139 * XXX Free all of the bootmem-allocated structures here when that is
1140 * implemented. Make it clear that core code is the only code that is
1141 * expected to unregister modules.
1142 */
1143int omap_hwmod_unregister(struct omap_hwmod *oh)
1144{
1145 if (!oh)
1146 return -EINVAL;
1147
1148 pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
1149
1150 mutex_lock(&omap_hwmod_mutex);
1151 list_del(&oh->node);
1152 mutex_unlock(&omap_hwmod_mutex);
1153
1154 return 0;
1155}
1156
1157/**
1158 * omap_hwmod_enable - enable an omap_hwmod
1159 * @oh: struct omap_hwmod *
1160 *
1161 * Enable an omap_hwomd @oh. Intended to be called by omap_device_enable().
1162 * Returns -EINVAL on error or passes along the return value from _enable().
1163 */
1164int omap_hwmod_enable(struct omap_hwmod *oh)
1165{
1166 int r;
1167
1168 if (!oh)
1169 return -EINVAL;
1170
1171 mutex_lock(&omap_hwmod_mutex);
1172 r = _enable(oh);
1173 mutex_unlock(&omap_hwmod_mutex);
1174
1175 return r;
1176}
1177
1178/**
1179 * omap_hwmod_idle - idle an omap_hwmod
1180 * @oh: struct omap_hwmod *
1181 *
1182 * Idle an omap_hwomd @oh. Intended to be called by omap_device_idle().
1183 * Returns -EINVAL on error or passes along the return value from _idle().
1184 */
1185int omap_hwmod_idle(struct omap_hwmod *oh)
1186{
1187 if (!oh)
1188 return -EINVAL;
1189
1190 mutex_lock(&omap_hwmod_mutex);
1191 _idle(oh);
1192 mutex_unlock(&omap_hwmod_mutex);
1193
1194 return 0;
1195}
1196
1197/**
1198 * omap_hwmod_shutdown - shutdown an omap_hwmod
1199 * @oh: struct omap_hwmod *
1200 *
1201 * Shutdown an omap_hwomd @oh. Intended to be called by
1202 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1203 * the return value from _shutdown().
1204 */
1205int omap_hwmod_shutdown(struct omap_hwmod *oh)
1206{
1207 if (!oh)
1208 return -EINVAL;
1209
1210 mutex_lock(&omap_hwmod_mutex);
1211 _shutdown(oh);
1212 mutex_unlock(&omap_hwmod_mutex);
1213
1214 return 0;
1215}
1216
1217/**
1218 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1219 * @oh: struct omap_hwmod *oh
1220 *
1221 * Intended to be called by the omap_device code.
1222 */
1223int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1224{
1225 mutex_lock(&omap_hwmod_mutex);
1226 _enable_clocks(oh);
1227 mutex_unlock(&omap_hwmod_mutex);
1228
1229 return 0;
1230}
1231
1232/**
1233 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1234 * @oh: struct omap_hwmod *oh
1235 *
1236 * Intended to be called by the omap_device code.
1237 */
1238int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1239{
1240 mutex_lock(&omap_hwmod_mutex);
1241 _disable_clocks(oh);
1242 mutex_unlock(&omap_hwmod_mutex);
1243
1244 return 0;
1245}
1246
1247/**
1248 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1249 * @oh: struct omap_hwmod *oh
1250 *
1251 * Intended to be called by drivers and core code when all posted
1252 * writes to a device must complete before continuing further
1253 * execution (for example, after clearing some device IRQSTATUS
1254 * register bits)
1255 *
1256 * XXX what about targets with multiple OCP threads?
1257 */
1258void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1259{
1260 BUG_ON(!oh);
1261
1262 if (!oh->sysconfig || !oh->sysconfig->sysc_flags) {
1263 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1264 "device configuration\n", oh->name);
1265 return;
1266 }
1267
1268 /*
1269 * Forces posted writes to complete on the OCP thread handling
1270 * register writes
1271 */
1272 omap_hwmod_readl(oh, oh->sysconfig->sysc_offs);
1273}
1274
1275/**
1276 * omap_hwmod_reset - reset the hwmod
1277 * @oh: struct omap_hwmod *
1278 *
1279 * Under some conditions, a driver may wish to reset the entire device.
1280 * Called from omap_device code. Returns -EINVAL on error or passes along
1281 * the return value from _reset()/_enable().
1282 */
1283int omap_hwmod_reset(struct omap_hwmod *oh)
1284{
1285 int r;
1286
1287 if (!oh || !(oh->_state & _HWMOD_STATE_ENABLED))
1288 return -EINVAL;
1289
1290 mutex_lock(&omap_hwmod_mutex);
1291 r = _reset(oh);
1292 if (!r)
1293 r = _enable(oh);
1294 mutex_unlock(&omap_hwmod_mutex);
1295
1296 return r;
1297}
1298
1299/**
1300 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1301 * @oh: struct omap_hwmod *
1302 * @res: pointer to the first element of an array of struct resource to fill
1303 *
1304 * Count the number of struct resource array elements necessary to
1305 * contain omap_hwmod @oh resources. Intended to be called by code
1306 * that registers omap_devices. Intended to be used to determine the
1307 * size of a dynamically-allocated struct resource array, before
1308 * calling omap_hwmod_fill_resources(). Returns the number of struct
1309 * resource array elements needed.
1310 *
1311 * XXX This code is not optimized. It could attempt to merge adjacent
1312 * resource IDs.
1313 *
1314 */
1315int omap_hwmod_count_resources(struct omap_hwmod *oh)
1316{
1317 int ret, i;
1318
1319 ret = oh->mpu_irqs_cnt + oh->sdma_chs_cnt;
1320
1321 for (i = 0; i < oh->slaves_cnt; i++)
1322 ret += (*oh->slaves + i)->addr_cnt;
1323
1324 return ret;
1325}
1326
1327/**
1328 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1329 * @oh: struct omap_hwmod *
1330 * @res: pointer to the first element of an array of struct resource to fill
1331 *
1332 * Fill the struct resource array @res with resource data from the
1333 * omap_hwmod @oh. Intended to be called by code that registers
1334 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1335 * number of array elements filled.
1336 */
1337int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1338{
1339 int i, j;
1340 int r = 0;
1341
1342 /* For each IRQ, DMA, memory area, fill in array.*/
1343
1344 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
1345 (res + r)->start = *(oh->mpu_irqs + i);
1346 (res + r)->end = *(oh->mpu_irqs + i);
1347 (res + r)->flags = IORESOURCE_IRQ;
1348 r++;
1349 }
1350
1351 for (i = 0; i < oh->sdma_chs_cnt; i++) {
1352 (res + r)->name = (oh->sdma_chs + i)->name;
1353 (res + r)->start = (oh->sdma_chs + i)->dma_ch;
1354 (res + r)->end = (oh->sdma_chs + i)->dma_ch;
1355 (res + r)->flags = IORESOURCE_DMA;
1356 r++;
1357 }
1358
1359 for (i = 0; i < oh->slaves_cnt; i++) {
1360 struct omap_hwmod_ocp_if *os;
1361
1362 os = *oh->slaves + i;
1363
1364 for (j = 0; j < os->addr_cnt; j++) {
1365 (res + r)->start = (os->addr + j)->pa_start;
1366 (res + r)->end = (os->addr + j)->pa_end;
1367 (res + r)->flags = IORESOURCE_MEM;
1368 r++;
1369 }
1370 }
1371
1372 return r;
1373}
1374
1375/**
1376 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1377 * @oh: struct omap_hwmod *
1378 *
1379 * Return the powerdomain pointer associated with the OMAP module
1380 * @oh's main clock. If @oh does not have a main clk, return the
1381 * powerdomain associated with the interface clock associated with the
1382 * module's MPU port. (XXX Perhaps this should use the SDMA port
1383 * instead?) Returns NULL on error, or a struct powerdomain * on
1384 * success.
1385 */
1386struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1387{
1388 struct clk *c;
1389
1390 if (!oh)
1391 return NULL;
1392
1393 if (oh->_clk) {
1394 c = oh->_clk;
1395 } else {
1396 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1397 return NULL;
1398 c = oh->slaves[oh->_mpu_port_index]->_clk;
1399 }
1400
1401 return c->clkdm->pwrdm.ptr;
1402
1403}
1404
1405/**
1406 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1407 * @oh: struct omap_hwmod *
1408 * @init_oh: struct omap_hwmod * (initiator)
1409 *
1410 * Add a sleep dependency between the initiator @init_oh and @oh.
1411 * Intended to be called by DSP/Bridge code via platform_data for the
1412 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1413 * code needs to add/del initiator dependencies dynamically
1414 * before/after accessing a device. Returns the return value from
1415 * _add_initiator_dep().
1416 *
1417 * XXX Keep a usecount in the clockdomain code
1418 */
1419int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1420 struct omap_hwmod *init_oh)
1421{
1422 return _add_initiator_dep(oh, init_oh);
1423}
1424
1425/*
1426 * XXX what about functions for drivers to save/restore ocp_sysconfig
1427 * for context save/restore operations?
1428 */
1429
1430/**
1431 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1432 * @oh: struct omap_hwmod *
1433 * @init_oh: struct omap_hwmod * (initiator)
1434 *
1435 * Remove a sleep dependency between the initiator @init_oh and @oh.
1436 * Intended to be called by DSP/Bridge code via platform_data for the
1437 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1438 * code needs to add/del initiator dependencies dynamically
1439 * before/after accessing a device. Returns the return value from
1440 * _del_initiator_dep().
1441 *
1442 * XXX Keep a usecount in the clockdomain code
1443 */
1444int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1445 struct omap_hwmod *init_oh)
1446{
1447 return _del_initiator_dep(oh, init_oh);
1448}
1449
1450/**
1451 * omap_hwmod_set_clockact_none - set clockactivity test to BOTH
1452 * @oh: struct omap_hwmod *
1453 *
1454 * On some modules, this function can affect the wakeup latency vs.
1455 * power consumption balance. Intended to be called by the
1456 * omap_device layer. Passes along the return value from
1457 * _write_clockact_lock().
1458 */
1459int omap_hwmod_set_clockact_both(struct omap_hwmod *oh)
1460{
1461 return _write_clockact_lock(oh, CLOCKACT_TEST_BOTH);
1462}
1463
1464/**
1465 * omap_hwmod_set_clockact_none - set clockactivity test to MAIN
1466 * @oh: struct omap_hwmod *
1467 *
1468 * On some modules, this function can affect the wakeup latency vs.
1469 * power consumption balance. Intended to be called by the
1470 * omap_device layer. Passes along the return value from
1471 * _write_clockact_lock().
1472 */
1473int omap_hwmod_set_clockact_main(struct omap_hwmod *oh)
1474{
1475 return _write_clockact_lock(oh, CLOCKACT_TEST_MAIN);
1476}
1477
1478/**
1479 * omap_hwmod_set_clockact_none - set clockactivity test to ICLK
1480 * @oh: struct omap_hwmod *
1481 *
1482 * On some modules, this function can affect the wakeup latency vs.
1483 * power consumption balance. Intended to be called by the
1484 * omap_device layer. Passes along the return value from
1485 * _write_clockact_lock().
1486 */
1487int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh)
1488{
1489 return _write_clockact_lock(oh, CLOCKACT_TEST_ICLK);
1490}
1491
1492/**
1493 * omap_hwmod_set_clockact_none - set clockactivity test to NONE
1494 * @oh: struct omap_hwmod *
1495 *
1496 * On some modules, this function can affect the wakeup latency vs.
1497 * power consumption balance. Intended to be called by the
1498 * omap_device layer. Passes along the return value from
1499 * _write_clockact_lock().
1500 */
1501int omap_hwmod_set_clockact_none(struct omap_hwmod *oh)
1502{
1503 return _write_clockact_lock(oh, CLOCKACT_TEST_NONE);
1504}
1505
1506/**
1507 * omap_hwmod_enable_wakeup - allow device to wake up the system
1508 * @oh: struct omap_hwmod *
1509 *
1510 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
1511 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
1512 * registers to cause the PRCM to receive wakeup events from the
1513 * module. Does not set any wakeup routing registers beyond this
1514 * point - if the module is to wake up any other module or subsystem,
1515 * that must be set separately. Called by omap_device code. Returns
1516 * -EINVAL on error or 0 upon success.
1517 */
1518int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
1519{
1520 if (!oh->sysconfig ||
1521 !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
1522 return -EINVAL;
1523
1524 mutex_lock(&omap_hwmod_mutex);
1525 _enable_wakeup(oh);
1526 mutex_unlock(&omap_hwmod_mutex);
1527
1528 return 0;
1529}
1530
1531/**
1532 * omap_hwmod_disable_wakeup - prevent device from waking the system
1533 * @oh: struct omap_hwmod *
1534 *
1535 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
1536 * from sending wakeups to the PRCM. Eventually this should clear
1537 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
1538 * from the module. Does not set any wakeup routing registers beyond
1539 * this point - if the module is to wake up any other module or
1540 * subsystem, that must be set separately. Called by omap_device
1541 * code. Returns -EINVAL on error or 0 upon success.
1542 */
1543int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
1544{
1545 if (!oh->sysconfig ||
1546 !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
1547 return -EINVAL;
1548
1549 mutex_lock(&omap_hwmod_mutex);
1550 _disable_wakeup(oh);
1551 mutex_unlock(&omap_hwmod_mutex);
1552
1553 return 0;
1554}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420.h b/arch/arm/mach-omap2/omap_hwmod_2420.h
new file mode 100644
index 000000000000..767e4965ac4e
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2420.h
@@ -0,0 +1,141 @@
1/*
2 * omap_hwmod_2420.h - hardware modules present on the OMAP2420 chips
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX handle crossbar/shared link difference for L3?
12 *
13 */
14#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H
15#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H
16
17#ifdef CONFIG_ARCH_OMAP2420
18
19#include <mach/omap_hwmod.h>
20#include <mach/irqs.h>
21#include <mach/cpu.h>
22#include <mach/dma.h>
23
24#include "prm-regbits-24xx.h"
25
26static struct omap_hwmod omap2420_mpu_hwmod;
27static struct omap_hwmod omap2420_l3_hwmod;
28static struct omap_hwmod omap2420_l4_core_hwmod;
29
30/* L3 -> L4_CORE interface */
31static struct omap_hwmod_ocp_if omap2420_l3__l4_core = {
32 .master = &omap2420_l3_hwmod,
33 .slave = &omap2420_l4_core_hwmod,
34 .user = OCP_USER_MPU | OCP_USER_SDMA,
35};
36
37/* MPU -> L3 interface */
38static struct omap_hwmod_ocp_if omap2420_mpu__l3 = {
39 .master = &omap2420_mpu_hwmod,
40 .slave = &omap2420_l3_hwmod,
41 .user = OCP_USER_MPU,
42};
43
44/* Slave interfaces on the L3 interconnect */
45static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = {
46 &omap2420_mpu__l3,
47};
48
49/* Master interfaces on the L3 interconnect */
50static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = {
51 &omap2420_l3__l4_core,
52};
53
54/* L3 */
55static struct omap_hwmod omap2420_l3_hwmod = {
56 .name = "l3_hwmod",
57 .masters = omap2420_l3_masters,
58 .masters_cnt = ARRAY_SIZE(omap2420_l3_masters),
59 .slaves = omap2420_l3_slaves,
60 .slaves_cnt = ARRAY_SIZE(omap2420_l3_slaves),
61 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
62};
63
64static struct omap_hwmod omap2420_l4_wkup_hwmod;
65
66/* L4_CORE -> L4_WKUP interface */
67static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
68 .master = &omap2420_l4_core_hwmod,
69 .slave = &omap2420_l4_wkup_hwmod,
70 .user = OCP_USER_MPU | OCP_USER_SDMA,
71};
72
73/* Slave interfaces on the L4_CORE interconnect */
74static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
75 &omap2420_l3__l4_core,
76};
77
78/* Master interfaces on the L4_CORE interconnect */
79static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
80 &omap2420_l4_core__l4_wkup,
81};
82
83/* L4 CORE */
84static struct omap_hwmod omap2420_l4_core_hwmod = {
85 .name = "l4_core_hwmod",
86 .masters = omap2420_l4_core_masters,
87 .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters),
88 .slaves = omap2420_l4_core_slaves,
89 .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves),
90 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
91};
92
93/* Slave interfaces on the L4_WKUP interconnect */
94static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
95 &omap2420_l4_core__l4_wkup,
96};
97
98/* Master interfaces on the L4_WKUP interconnect */
99static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
100};
101
102/* L4 WKUP */
103static struct omap_hwmod omap2420_l4_wkup_hwmod = {
104 .name = "l4_wkup_hwmod",
105 .masters = omap2420_l4_wkup_masters,
106 .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters),
107 .slaves = omap2420_l4_wkup_slaves,
108 .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves),
109 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
110};
111
112/* Master interfaces on the MPU device */
113static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
114 &omap2420_mpu__l3,
115};
116
117/* MPU */
118static struct omap_hwmod omap2420_mpu_hwmod = {
119 .name = "mpu_hwmod",
120 .clkdev_dev_id = NULL,
121 .clkdev_con_id = "mpu_ck",
122 .masters = omap2420_mpu_masters,
123 .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters),
124 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
125};
126
127static __initdata struct omap_hwmod *omap2420_hwmods[] = {
128 &omap2420_l3_hwmod,
129 &omap2420_l4_core_hwmod,
130 &omap2420_l4_wkup_hwmod,
131 &omap2420_mpu_hwmod,
132 NULL,
133};
134
135#else
136# define omap2420_hwmods 0
137#endif
138
139#endif
140
141
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h
new file mode 100644
index 000000000000..a412be6420ec
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2430.h
@@ -0,0 +1,143 @@
1/*
2 * omap_hwmod_2430.h - hardware modules present on the OMAP2430 chips
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX handle crossbar/shared link difference for L3?
12 *
13 */
14#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H
15#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H
16
17#ifdef CONFIG_ARCH_OMAP2430
18
19#include <mach/omap_hwmod.h>
20#include <mach/irqs.h>
21#include <mach/cpu.h>
22#include <mach/dma.h>
23
24#include "prm-regbits-24xx.h"
25
26static struct omap_hwmod omap2430_mpu_hwmod;
27static struct omap_hwmod omap2430_l3_hwmod;
28static struct omap_hwmod omap2430_l4_core_hwmod;
29
30/* L3 -> L4_CORE interface */
31static struct omap_hwmod_ocp_if omap2430_l3__l4_core = {
32 .master = &omap2430_l3_hwmod,
33 .slave = &omap2430_l4_core_hwmod,
34 .user = OCP_USER_MPU | OCP_USER_SDMA,
35};
36
37/* MPU -> L3 interface */
38static struct omap_hwmod_ocp_if omap2430_mpu__l3 = {
39 .master = &omap2430_mpu_hwmod,
40 .slave = &omap2430_l3_hwmod,
41 .user = OCP_USER_MPU,
42};
43
44/* Slave interfaces on the L3 interconnect */
45static struct omap_hwmod_ocp_if *omap2430_l3_slaves[] = {
46 &omap2430_mpu__l3,
47};
48
49/* Master interfaces on the L3 interconnect */
50static struct omap_hwmod_ocp_if *omap2430_l3_masters[] = {
51 &omap2430_l3__l4_core,
52};
53
54/* L3 */
55static struct omap_hwmod omap2430_l3_hwmod = {
56 .name = "l3_hwmod",
57 .masters = omap2430_l3_masters,
58 .masters_cnt = ARRAY_SIZE(omap2430_l3_masters),
59 .slaves = omap2430_l3_slaves,
60 .slaves_cnt = ARRAY_SIZE(omap2430_l3_slaves),
61 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
62};
63
64static struct omap_hwmod omap2430_l4_wkup_hwmod;
65static struct omap_hwmod omap2430_mmc1_hwmod;
66static struct omap_hwmod omap2430_mmc2_hwmod;
67
68/* L4_CORE -> L4_WKUP interface */
69static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
70 .master = &omap2430_l4_core_hwmod,
71 .slave = &omap2430_l4_wkup_hwmod,
72 .user = OCP_USER_MPU | OCP_USER_SDMA,
73};
74
75/* Slave interfaces on the L4_CORE interconnect */
76static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
77 &omap2430_l3__l4_core,
78};
79
80/* Master interfaces on the L4_CORE interconnect */
81static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
82 &omap2430_l4_core__l4_wkup,
83};
84
85/* L4 CORE */
86static struct omap_hwmod omap2430_l4_core_hwmod = {
87 .name = "l4_core_hwmod",
88 .masters = omap2430_l4_core_masters,
89 .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
90 .slaves = omap2430_l4_core_slaves,
91 .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
92 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
93};
94
95/* Slave interfaces on the L4_WKUP interconnect */
96static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
97 &omap2430_l4_core__l4_wkup,
98};
99
100/* Master interfaces on the L4_WKUP interconnect */
101static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
102};
103
104/* L4 WKUP */
105static struct omap_hwmod omap2430_l4_wkup_hwmod = {
106 .name = "l4_wkup_hwmod",
107 .masters = omap2430_l4_wkup_masters,
108 .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
109 .slaves = omap2430_l4_wkup_slaves,
110 .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
111 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
112};
113
114/* Master interfaces on the MPU device */
115static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
116 &omap2430_mpu__l3,
117};
118
119/* MPU */
120static struct omap_hwmod omap2430_mpu_hwmod = {
121 .name = "mpu_hwmod",
122 .clkdev_dev_id = NULL,
123 .clkdev_con_id = "mpu_ck",
124 .masters = omap2430_mpu_masters,
125 .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
126 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
127};
128
129static __initdata struct omap_hwmod *omap2430_hwmods[] = {
130 &omap2430_l3_hwmod,
131 &omap2430_l4_core_hwmod,
132 &omap2430_l4_wkup_hwmod,
133 &omap2430_mpu_hwmod,
134 NULL,
135};
136
137#else
138# define omap2430_hwmods 0
139#endif
140
141#endif
142
143
diff --git a/arch/arm/mach-omap2/omap_hwmod_34xx.h b/arch/arm/mach-omap2/omap_hwmod_34xx.h
new file mode 100644
index 000000000000..1e069f831575
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_34xx.h
@@ -0,0 +1,168 @@
1/*
2 * omap_hwmod_34xx.h - hardware modules present on the OMAP34xx chips
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
13#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
14
15#ifdef CONFIG_ARCH_OMAP34XX
16
17#include <mach/omap_hwmod.h>
18#include <mach/irqs.h>
19#include <mach/cpu.h>
20#include <mach/dma.h>
21
22#include "prm-regbits-34xx.h"
23
24static struct omap_hwmod omap34xx_mpu_hwmod;
25static struct omap_hwmod omap34xx_l3_hwmod;
26static struct omap_hwmod omap34xx_l4_core_hwmod;
27static struct omap_hwmod omap34xx_l4_per_hwmod;
28
29/* L3 -> L4_CORE interface */
30static struct omap_hwmod_ocp_if omap34xx_l3__l4_core = {
31 .master = &omap34xx_l3_hwmod,
32 .slave = &omap34xx_l4_core_hwmod,
33 .user = OCP_USER_MPU | OCP_USER_SDMA,
34};
35
36/* L3 -> L4_PER interface */
37static struct omap_hwmod_ocp_if omap34xx_l3__l4_per = {
38 .master = &omap34xx_l3_hwmod,
39 .slave = &omap34xx_l4_per_hwmod,
40 .user = OCP_USER_MPU | OCP_USER_SDMA,
41};
42
43/* MPU -> L3 interface */
44static struct omap_hwmod_ocp_if omap34xx_mpu__l3 = {
45 .master = &omap34xx_mpu_hwmod,
46 .slave = &omap34xx_l3_hwmod,
47 .user = OCP_USER_MPU,
48};
49
50/* Slave interfaces on the L3 interconnect */
51static struct omap_hwmod_ocp_if *omap34xx_l3_slaves[] = {
52 &omap34xx_mpu__l3,
53};
54
55/* Master interfaces on the L3 interconnect */
56static struct omap_hwmod_ocp_if *omap34xx_l3_masters[] = {
57 &omap34xx_l3__l4_core,
58 &omap34xx_l3__l4_per,
59};
60
61/* L3 */
62static struct omap_hwmod omap34xx_l3_hwmod = {
63 .name = "l3_hwmod",
64 .masters = omap34xx_l3_masters,
65 .masters_cnt = ARRAY_SIZE(omap34xx_l3_masters),
66 .slaves = omap34xx_l3_slaves,
67 .slaves_cnt = ARRAY_SIZE(omap34xx_l3_slaves),
68 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
69};
70
71static struct omap_hwmod omap34xx_l4_wkup_hwmod;
72
73/* L4_CORE -> L4_WKUP interface */
74static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = {
75 .master = &omap34xx_l4_core_hwmod,
76 .slave = &omap34xx_l4_wkup_hwmod,
77 .user = OCP_USER_MPU | OCP_USER_SDMA,
78};
79
80/* Slave interfaces on the L4_CORE interconnect */
81static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = {
82 &omap34xx_l3__l4_core,
83};
84
85/* Master interfaces on the L4_CORE interconnect */
86static struct omap_hwmod_ocp_if *omap34xx_l4_core_masters[] = {
87 &omap34xx_l4_core__l4_wkup,
88};
89
90/* L4 CORE */
91static struct omap_hwmod omap34xx_l4_core_hwmod = {
92 .name = "l4_core_hwmod",
93 .masters = omap34xx_l4_core_masters,
94 .masters_cnt = ARRAY_SIZE(omap34xx_l4_core_masters),
95 .slaves = omap34xx_l4_core_slaves,
96 .slaves_cnt = ARRAY_SIZE(omap34xx_l4_core_slaves),
97 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
98};
99
100/* Slave interfaces on the L4_PER interconnect */
101static struct omap_hwmod_ocp_if *omap34xx_l4_per_slaves[] = {
102 &omap34xx_l3__l4_per,
103};
104
105/* Master interfaces on the L4_PER interconnect */
106static struct omap_hwmod_ocp_if *omap34xx_l4_per_masters[] = {
107};
108
109/* L4 PER */
110static struct omap_hwmod omap34xx_l4_per_hwmod = {
111 .name = "l4_per_hwmod",
112 .masters = omap34xx_l4_per_masters,
113 .masters_cnt = ARRAY_SIZE(omap34xx_l4_per_masters),
114 .slaves = omap34xx_l4_per_slaves,
115 .slaves_cnt = ARRAY_SIZE(omap34xx_l4_per_slaves),
116 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
117};
118
119/* Slave interfaces on the L4_WKUP interconnect */
120static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_slaves[] = {
121 &omap34xx_l4_core__l4_wkup,
122};
123
124/* Master interfaces on the L4_WKUP interconnect */
125static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_masters[] = {
126};
127
128/* L4 WKUP */
129static struct omap_hwmod omap34xx_l4_wkup_hwmod = {
130 .name = "l4_wkup_hwmod",
131 .masters = omap34xx_l4_wkup_masters,
132 .masters_cnt = ARRAY_SIZE(omap34xx_l4_wkup_masters),
133 .slaves = omap34xx_l4_wkup_slaves,
134 .slaves_cnt = ARRAY_SIZE(omap34xx_l4_wkup_slaves),
135 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
136};
137
138/* Master interfaces on the MPU device */
139static struct omap_hwmod_ocp_if *omap34xx_mpu_masters[] = {
140 &omap34xx_mpu__l3,
141};
142
143/* MPU */
144static struct omap_hwmod omap34xx_mpu_hwmod = {
145 .name = "mpu_hwmod",
146 .clkdev_dev_id = NULL,
147 .clkdev_con_id = "arm_fck",
148 .masters = omap34xx_mpu_masters,
149 .masters_cnt = ARRAY_SIZE(omap34xx_mpu_masters),
150 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
151};
152
153static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
154 &omap34xx_l3_hwmod,
155 &omap34xx_l4_core_hwmod,
156 &omap34xx_l4_per_hwmod,
157 &omap34xx_l4_wkup_hwmod,
158 &omap34xx_mpu_hwmod,
159 NULL,
160};
161
162#else
163# define omap34xx_hwmods 0
164#endif
165
166#endif
167
168
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 6cc375a275be..1b4c1600f8d8 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -20,13 +20,16 @@
20 */ 20 */
21 21
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/timer.h> 23#include <linux/sched.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/err.h> 25#include <linux/err.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/module.h>
27 28
28#include <mach/clock.h> 29#include <mach/clock.h>
29#include <mach/board.h> 30#include <mach/board.h>
31#include <mach/powerdomain.h>
32#include <mach/clockdomain.h>
30 33
31#include "prm.h" 34#include "prm.h"
32#include "cm.h" 35#include "cm.h"
@@ -48,7 +51,9 @@ int omap2_pm_debug;
48 regs[reg_count++].val = __raw_readl(reg) 51 regs[reg_count++].val = __raw_readl(reg)
49#define DUMP_INTC_REG(reg, off) \ 52#define DUMP_INTC_REG(reg, off) \
50 regs[reg_count].name = #reg; \ 53 regs[reg_count].name = #reg; \
51 regs[reg_count++].val = __raw_readl(IO_ADDRESS(0x480fe000 + (off))) 54 regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off)))
55
56static int __init pm_dbg_init(void);
52 57
53void omap2_pm_dump(int mode, int resume, unsigned int us) 58void omap2_pm_dump(int mode, int resume, unsigned int us)
54{ 59{
@@ -150,3 +155,425 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
150 for (i = 0; i < reg_count; i++) 155 for (i = 0; i < reg_count; i++)
151 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); 156 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
152} 157}
158
159#ifdef CONFIG_DEBUG_FS
160#include <linux/debugfs.h>
161#include <linux/seq_file.h>
162
163static void pm_dbg_regset_store(u32 *ptr);
164
165struct dentry *pm_dbg_dir;
166
167static int pm_dbg_init_done;
168
169enum {
170 DEBUG_FILE_COUNTERS = 0,
171 DEBUG_FILE_TIMERS,
172};
173
174struct pm_module_def {
175 char name[8]; /* Name of the module */
176 short type; /* CM or PRM */
177 unsigned short offset;
178 int low; /* First register address on this module */
179 int high; /* Last register address on this module */
180};
181
182#define MOD_CM 0
183#define MOD_PRM 1
184
185static const struct pm_module_def *pm_dbg_reg_modules;
186static const struct pm_module_def omap3_pm_reg_modules[] = {
187 { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
188 { "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
189 { "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
190 { "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
191 { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
192 { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
193 { "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
194 { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
195 { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
196 { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
197 { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
198 { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
199 { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
200
201 { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
202 { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
203 { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
204 { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
205 { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
206 { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
207 { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
208 { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
209 { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
210 { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
211 { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
212 { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
213 { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
214 { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
215 { "", 0, 0, 0, 0 },
216};
217
218#define PM_DBG_MAX_REG_SETS 4
219
220static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
221
222static int pm_dbg_get_regset_size(void)
223{
224 static int regset_size;
225
226 if (regset_size == 0) {
227 int i = 0;
228
229 while (pm_dbg_reg_modules[i].name[0] != 0) {
230 regset_size += pm_dbg_reg_modules[i].high +
231 4 - pm_dbg_reg_modules[i].low;
232 i++;
233 }
234 }
235 return regset_size;
236}
237
238static int pm_dbg_show_regs(struct seq_file *s, void *unused)
239{
240 int i, j;
241 unsigned long val;
242 int reg_set = (int)s->private;
243 u32 *ptr;
244 void *store = NULL;
245 int regs;
246 int linefeed;
247
248 if (reg_set == 0) {
249 store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
250 ptr = store;
251 pm_dbg_regset_store(ptr);
252 } else {
253 ptr = pm_dbg_reg_set[reg_set - 1];
254 }
255
256 i = 0;
257
258 while (pm_dbg_reg_modules[i].name[0] != 0) {
259 regs = 0;
260 linefeed = 0;
261 if (pm_dbg_reg_modules[i].type == MOD_CM)
262 seq_printf(s, "MOD: CM_%s (%08x)\n",
263 pm_dbg_reg_modules[i].name,
264 (u32)(OMAP3430_CM_BASE +
265 pm_dbg_reg_modules[i].offset));
266 else
267 seq_printf(s, "MOD: PRM_%s (%08x)\n",
268 pm_dbg_reg_modules[i].name,
269 (u32)(OMAP3430_PRM_BASE +
270 pm_dbg_reg_modules[i].offset));
271
272 for (j = pm_dbg_reg_modules[i].low;
273 j <= pm_dbg_reg_modules[i].high; j += 4) {
274 val = *(ptr++);
275 if (val != 0) {
276 regs++;
277 if (linefeed) {
278 seq_printf(s, "\n");
279 linefeed = 0;
280 }
281 seq_printf(s, " %02x => %08lx", j, val);
282 if (regs % 4 == 0)
283 linefeed = 1;
284 }
285 }
286 seq_printf(s, "\n");
287 i++;
288 }
289
290 if (store != NULL)
291 kfree(store);
292
293 return 0;
294}
295
296static void pm_dbg_regset_store(u32 *ptr)
297{
298 int i, j;
299 u32 val;
300
301 i = 0;
302
303 while (pm_dbg_reg_modules[i].name[0] != 0) {
304 for (j = pm_dbg_reg_modules[i].low;
305 j <= pm_dbg_reg_modules[i].high; j += 4) {
306 if (pm_dbg_reg_modules[i].type == MOD_CM)
307 val = cm_read_mod_reg(
308 pm_dbg_reg_modules[i].offset, j);
309 else
310 val = prm_read_mod_reg(
311 pm_dbg_reg_modules[i].offset, j);
312 *(ptr++) = val;
313 }
314 i++;
315 }
316}
317
318int pm_dbg_regset_save(int reg_set)
319{
320 if (pm_dbg_reg_set[reg_set-1] == NULL)
321 return -EINVAL;
322
323 pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);
324
325 return 0;
326}
327
328static const char pwrdm_state_names[][4] = {
329 "OFF",
330 "RET",
331 "INA",
332 "ON"
333};
334
335void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
336{
337 s64 t;
338
339 if (!pm_dbg_init_done)
340 return ;
341
342 /* Update timer for previous state */
343 t = sched_clock();
344
345 pwrdm->state_timer[prev] += t - pwrdm->timer;
346
347 pwrdm->timer = t;
348}
349
350static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
351{
352 struct seq_file *s = (struct seq_file *)user;
353
354 if (strcmp(clkdm->name, "emu_clkdm") == 0 ||
355 strcmp(clkdm->name, "wkup_clkdm") == 0 ||
356 strncmp(clkdm->name, "dpll", 4) == 0)
357 return 0;
358
359 seq_printf(s, "%s->%s (%d)", clkdm->name,
360 clkdm->pwrdm.ptr->name,
361 atomic_read(&clkdm->usecount));
362 seq_printf(s, "\n");
363
364 return 0;
365}
366
367static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
368{
369 struct seq_file *s = (struct seq_file *)user;
370 int i;
371
372 if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
373 strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
374 strncmp(pwrdm->name, "dpll", 4) == 0)
375 return 0;
376
377 if (pwrdm->state != pwrdm_read_pwrst(pwrdm))
378 printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n",
379 pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm));
380
381 seq_printf(s, "%s (%s)", pwrdm->name,
382 pwrdm_state_names[pwrdm->state]);
383 for (i = 0; i < 4; i++)
384 seq_printf(s, ",%s:%d", pwrdm_state_names[i],
385 pwrdm->state_counter[i]);
386
387 seq_printf(s, "\n");
388
389 return 0;
390}
391
392static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user)
393{
394 struct seq_file *s = (struct seq_file *)user;
395 int i;
396
397 if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
398 strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
399 strncmp(pwrdm->name, "dpll", 4) == 0)
400 return 0;
401
402 pwrdm_state_switch(pwrdm);
403
404 seq_printf(s, "%s (%s)", pwrdm->name,
405 pwrdm_state_names[pwrdm->state]);
406
407 for (i = 0; i < 4; i++)
408 seq_printf(s, ",%s:%lld", pwrdm_state_names[i],
409 pwrdm->state_timer[i]);
410
411 seq_printf(s, "\n");
412 return 0;
413}
414
415static int pm_dbg_show_counters(struct seq_file *s, void *unused)
416{
417 pwrdm_for_each(pwrdm_dbg_show_counter, s);
418 clkdm_for_each(clkdm_dbg_show_counter, s);
419
420 return 0;
421}
422
423static int pm_dbg_show_timers(struct seq_file *s, void *unused)
424{
425 pwrdm_for_each(pwrdm_dbg_show_timer, s);
426 return 0;
427}
428
429static int pm_dbg_open(struct inode *inode, struct file *file)
430{
431 switch ((int)inode->i_private) {
432 case DEBUG_FILE_COUNTERS:
433 return single_open(file, pm_dbg_show_counters,
434 &inode->i_private);
435 case DEBUG_FILE_TIMERS:
436 default:
437 return single_open(file, pm_dbg_show_timers,
438 &inode->i_private);
439 };
440}
441
442static int pm_dbg_reg_open(struct inode *inode, struct file *file)
443{
444 return single_open(file, pm_dbg_show_regs, inode->i_private);
445}
446
447static const struct file_operations debug_fops = {
448 .open = pm_dbg_open,
449 .read = seq_read,
450 .llseek = seq_lseek,
451 .release = single_release,
452};
453
454static const struct file_operations debug_reg_fops = {
455 .open = pm_dbg_reg_open,
456 .read = seq_read,
457 .llseek = seq_lseek,
458 .release = single_release,
459};
460
461int pm_dbg_regset_init(int reg_set)
462{
463 char name[2];
464
465 if (!pm_dbg_init_done)
466 pm_dbg_init();
467
468 if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS ||
469 pm_dbg_reg_set[reg_set-1] != NULL)
470 return -EINVAL;
471
472 pm_dbg_reg_set[reg_set-1] =
473 kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
474
475 if (pm_dbg_reg_set[reg_set-1] == NULL)
476 return -ENOMEM;
477
478 if (pm_dbg_dir != NULL) {
479 sprintf(name, "%d", reg_set);
480
481 (void) debugfs_create_file(name, S_IRUGO,
482 pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
483 }
484
485 return 0;
486}
487
488static int pwrdm_suspend_get(void *data, u64 *val)
489{
490 *val = omap3_pm_get_suspend_state((struct powerdomain *)data);
491
492 if (*val >= 0)
493 return 0;
494 return *val;
495}
496
497static int pwrdm_suspend_set(void *data, u64 val)
498{
499 return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val);
500}
501
502DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get,
503 pwrdm_suspend_set, "%llu\n");
504
505static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir)
506{
507 int i;
508 s64 t;
509 struct dentry *d;
510
511 t = sched_clock();
512
513 for (i = 0; i < 4; i++)
514 pwrdm->state_timer[i] = 0;
515
516 pwrdm->timer = t;
517
518 if (strncmp(pwrdm->name, "dpll", 4) == 0)
519 return 0;
520
521 d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir);
522
523 (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d,
524 (void *)pwrdm, &pwrdm_suspend_fops);
525
526 return 0;
527}
528
529static int __init pm_dbg_init(void)
530{
531 int i;
532 struct dentry *d;
533 char name[2];
534
535 if (pm_dbg_init_done)
536 return 0;
537
538 if (cpu_is_omap34xx())
539 pm_dbg_reg_modules = omap3_pm_reg_modules;
540 else {
541 printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
542 return -ENODEV;
543 }
544
545 d = debugfs_create_dir("pm_debug", NULL);
546 if (IS_ERR(d))
547 return PTR_ERR(d);
548
549 (void) debugfs_create_file("count", S_IRUGO,
550 d, (void *)DEBUG_FILE_COUNTERS, &debug_fops);
551 (void) debugfs_create_file("time", S_IRUGO,
552 d, (void *)DEBUG_FILE_TIMERS, &debug_fops);
553
554 pwrdm_for_each(pwrdms_setup, (void *)d);
555
556 pm_dbg_dir = debugfs_create_dir("registers", d);
557 if (IS_ERR(pm_dbg_dir))
558 return PTR_ERR(pm_dbg_dir);
559
560 (void) debugfs_create_file("current", S_IRUGO,
561 pm_dbg_dir, (void *)0, &debug_reg_fops);
562
563 for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
564 if (pm_dbg_reg_set[i] != NULL) {
565 sprintf(name, "%d", i+1);
566 (void) debugfs_create_file(name, S_IRUGO,
567 pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
568
569 }
570
571 pm_dbg_init_done = 1;
572
573 return 0;
574}
575arch_initcall(pm_dbg_init);
576
577#else
578void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {}
579#endif
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 21201cd4117b..8400f5768923 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -11,12 +11,23 @@
11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H 11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
12#define __ARCH_ARM_MACH_OMAP2_PM_H 12#define __ARCH_ARM_MACH_OMAP2_PM_H
13 13
14#include <mach/powerdomain.h>
15
16extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
17extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
18
14#ifdef CONFIG_PM_DEBUG 19#ifdef CONFIG_PM_DEBUG
15extern void omap2_pm_dump(int mode, int resume, unsigned int us); 20extern void omap2_pm_dump(int mode, int resume, unsigned int us);
16extern int omap2_pm_debug; 21extern int omap2_pm_debug;
22extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
23extern int pm_dbg_regset_save(int reg_set);
24extern int pm_dbg_regset_init(int reg_set);
17#else 25#else
18#define omap2_pm_dump(mode, resume, us) do {} while (0); 26#define omap2_pm_dump(mode, resume, us) do {} while (0);
19#define omap2_pm_debug 0 27#define omap2_pm_debug 0
28#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
29#define pm_dbg_regset_save(reg_set) do {} while (0);
30#define pm_dbg_regset_init(reg_set) do {} while (0);
20#endif /* CONFIG_PM_DEBUG */ 31#endif /* CONFIG_PM_DEBUG */
21 32
22extern void omap24xx_idle_loop_suspend(void); 33extern void omap24xx_idle_loop_suspend(void);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 528dbdc26e23..bff5c4e89742 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -333,7 +333,7 @@ static struct platform_suspend_ops omap_pm_ops = {
333 .valid = suspend_valid_only_mem, 333 .valid = suspend_valid_only_mem,
334}; 334};
335 335
336static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm) 336static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm, void *unused)
337{ 337{
338 omap2_clkdm_allow_idle(clkdm); 338 omap2_clkdm_allow_idle(clkdm);
339 return 0; 339 return 0;
@@ -385,7 +385,7 @@ static void __init prcm_setup_regs(void)
385 omap2_clkdm_sleep(gfx_clkdm); 385 omap2_clkdm_sleep(gfx_clkdm);
386 386
387 /* Enable clockdomain hardware-supervised control for all clkdms */ 387 /* Enable clockdomain hardware-supervised control for all clkdms */
388 clkdm_for_each(_pm_clkdm_enable_hwsup); 388 clkdm_for_each(_pm_clkdm_enable_hwsup, NULL);
389 389
390 /* Enable clock autoidle for all domains */ 390 /* Enable clock autoidle for all domains */
391 cm_write_mod_reg(OMAP24XX_AUTO_CAM | 391 cm_write_mod_reg(OMAP24XX_AUTO_CAM |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 488d595d8e4b..0ff5a6c53aa0 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -170,6 +170,8 @@ static void omap_sram_idle(void)
170 printk(KERN_ERR "Invalid mpu state in sram_idle\n"); 170 printk(KERN_ERR "Invalid mpu state in sram_idle\n");
171 return; 171 return;
172 } 172 }
173 pwrdm_pre_transition();
174
173 omap2_gpio_prepare_for_retention(); 175 omap2_gpio_prepare_for_retention();
174 omap_uart_prepare_idle(0); 176 omap_uart_prepare_idle(0);
175 omap_uart_prepare_idle(1); 177 omap_uart_prepare_idle(1);
@@ -182,6 +184,9 @@ static void omap_sram_idle(void)
182 omap_uart_resume_idle(1); 184 omap_uart_resume_idle(1);
183 omap_uart_resume_idle(0); 185 omap_uart_resume_idle(0);
184 omap2_gpio_resume_after_retention(); 186 omap2_gpio_resume_after_retention();
187
188 pwrdm_post_transition();
189
185} 190}
186 191
187/* 192/*
@@ -271,6 +276,7 @@ static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
271 if (sleep_switch) { 276 if (sleep_switch) {
272 omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); 277 omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
273 pwrdm_wait_transition(pwrdm); 278 pwrdm_wait_transition(pwrdm);
279 pwrdm_state_switch(pwrdm);
274 } 280 }
275 281
276err: 282err:
@@ -658,14 +664,38 @@ static void __init prcm_setup_regs(void)
658 omap3_d2d_idle(); 664 omap3_d2d_idle();
659} 665}
660 666
661static int __init pwrdms_setup(struct powerdomain *pwrdm) 667int omap3_pm_get_suspend_state(struct powerdomain *pwrdm)
668{
669 struct power_state *pwrst;
670
671 list_for_each_entry(pwrst, &pwrst_list, node) {
672 if (pwrst->pwrdm == pwrdm)
673 return pwrst->next_state;
674 }
675 return -EINVAL;
676}
677
678int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state)
679{
680 struct power_state *pwrst;
681
682 list_for_each_entry(pwrst, &pwrst_list, node) {
683 if (pwrst->pwrdm == pwrdm) {
684 pwrst->next_state = state;
685 return 0;
686 }
687 }
688 return -EINVAL;
689}
690
691static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
662{ 692{
663 struct power_state *pwrst; 693 struct power_state *pwrst;
664 694
665 if (!pwrdm->pwrsts) 695 if (!pwrdm->pwrsts)
666 return 0; 696 return 0;
667 697
668 pwrst = kmalloc(sizeof(struct power_state), GFP_KERNEL); 698 pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
669 if (!pwrst) 699 if (!pwrst)
670 return -ENOMEM; 700 return -ENOMEM;
671 pwrst->pwrdm = pwrdm; 701 pwrst->pwrdm = pwrdm;
@@ -683,7 +713,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
683 * supported. Initiate sleep transition for other clockdomains, if 713 * supported. Initiate sleep transition for other clockdomains, if
684 * they are not used 714 * they are not used
685 */ 715 */
686static int __init clkdms_setup(struct clockdomain *clkdm) 716static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
687{ 717{
688 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) 718 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
689 omap2_clkdm_allow_idle(clkdm); 719 omap2_clkdm_allow_idle(clkdm);
@@ -716,13 +746,13 @@ static int __init omap3_pm_init(void)
716 goto err1; 746 goto err1;
717 } 747 }
718 748
719 ret = pwrdm_for_each(pwrdms_setup); 749 ret = pwrdm_for_each(pwrdms_setup, NULL);
720 if (ret) { 750 if (ret) {
721 printk(KERN_ERR "Failed to setup powerdomains\n"); 751 printk(KERN_ERR "Failed to setup powerdomains\n");
722 goto err2; 752 goto err2;
723 } 753 }
724 754
725 (void) clkdm_for_each(clkdms_setup); 755 (void) clkdm_for_each(clkdms_setup, NULL);
726 756
727 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); 757 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
728 if (mpu_pwrdm == NULL) { 758 if (mpu_pwrdm == NULL) {
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 983f1cb676be..2594cbff3947 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -35,6 +35,13 @@
35#include <mach/powerdomain.h> 35#include <mach/powerdomain.h>
36#include <mach/clockdomain.h> 36#include <mach/clockdomain.h>
37 37
38#include "pm.h"
39
40enum {
41 PWRDM_STATE_NOW = 0,
42 PWRDM_STATE_PREV,
43};
44
38/* pwrdm_list contains all registered struct powerdomains */ 45/* pwrdm_list contains all registered struct powerdomains */
39static LIST_HEAD(pwrdm_list); 46static LIST_HEAD(pwrdm_list);
40 47
@@ -83,7 +90,7 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
83 if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip)) 90 if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip))
84 return ERR_PTR(-EINVAL); 91 return ERR_PTR(-EINVAL);
85 92
86 for (pd = deps; pd; pd++) { 93 for (pd = deps; pd->pwrdm_name; pd++) {
87 94
88 if (!omap_chip_is(pd->omap_chip)) 95 if (!omap_chip_is(pd->omap_chip))
89 continue; 96 continue;
@@ -96,12 +103,71 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
96 103
97 } 104 }
98 105
99 if (!pd) 106 if (!pd->pwrdm_name)
100 return ERR_PTR(-ENOENT); 107 return ERR_PTR(-ENOENT);
101 108
102 return pd->pwrdm; 109 return pd->pwrdm;
103} 110}
104 111
112static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
113{
114
115 int prev;
116 int state;
117
118 if (pwrdm == NULL)
119 return -EINVAL;
120
121 state = pwrdm_read_pwrst(pwrdm);
122
123 switch (flag) {
124 case PWRDM_STATE_NOW:
125 prev = pwrdm->state;
126 break;
127 case PWRDM_STATE_PREV:
128 prev = pwrdm_read_prev_pwrst(pwrdm);
129 if (pwrdm->state != prev)
130 pwrdm->state_counter[prev]++;
131 break;
132 default:
133 return -EINVAL;
134 }
135
136 if (state != prev)
137 pwrdm->state_counter[state]++;
138
139 pm_dbg_update_time(pwrdm, prev);
140
141 pwrdm->state = state;
142
143 return 0;
144}
145
146static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
147{
148 pwrdm_clear_all_prev_pwrst(pwrdm);
149 _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
150 return 0;
151}
152
153static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
154{
155 _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
156 return 0;
157}
158
159static __init void _pwrdm_setup(struct powerdomain *pwrdm)
160{
161 int i;
162
163 for (i = 0; i < 4; i++)
164 pwrdm->state_counter[i] = 0;
165
166 pwrdm_wait_transition(pwrdm);
167 pwrdm->state = pwrdm_read_pwrst(pwrdm);
168 pwrdm->state_counter[pwrdm->state] = 1;
169
170}
105 171
106/* Public functions */ 172/* Public functions */
107 173
@@ -117,9 +183,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
117{ 183{
118 struct powerdomain **p = NULL; 184 struct powerdomain **p = NULL;
119 185
120 if (pwrdm_list) 186 if (pwrdm_list) {
121 for (p = pwrdm_list; *p; p++) 187 for (p = pwrdm_list; *p; p++) {
122 pwrdm_register(*p); 188 pwrdm_register(*p);
189 _pwrdm_setup(*p);
190 }
191 }
123} 192}
124 193
125/** 194/**
@@ -217,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name)
217 * anything else to indicate failure; or -EINVAL if the function 286 * anything else to indicate failure; or -EINVAL if the function
218 * pointer is null. 287 * pointer is null.
219 */ 288 */
220int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) 289int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
290 void *user)
221{ 291{
222 struct powerdomain *temp_pwrdm; 292 struct powerdomain *temp_pwrdm;
223 unsigned long flags; 293 unsigned long flags;
@@ -228,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
228 298
229 read_lock_irqsave(&pwrdm_rwlock, flags); 299 read_lock_irqsave(&pwrdm_rwlock, flags);
230 list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { 300 list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
231 ret = (*fn)(temp_pwrdm); 301 ret = (*fn)(temp_pwrdm, user);
232 if (ret) 302 if (ret)
233 break; 303 break;
234 } 304 }
@@ -1110,4 +1180,36 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
1110 return 0; 1180 return 0;
1111} 1181}
1112 1182
1183int pwrdm_state_switch(struct powerdomain *pwrdm)
1184{
1185 return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
1186}
1187
1188int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
1189{
1190 if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) {
1191 pwrdm_wait_transition(clkdm->pwrdm.ptr);
1192 return pwrdm_state_switch(clkdm->pwrdm.ptr);
1193 }
1194
1195 return -EINVAL;
1196}
1197int pwrdm_clk_state_switch(struct clk *clk)
1198{
1199 if (clk != NULL && clk->clkdm != NULL)
1200 return pwrdm_clkdm_state_switch(clk->clkdm);
1201 return -EINVAL;
1202}
1203
1204int pwrdm_pre_transition(void)
1205{
1206 pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
1207 return 0;
1208}
1209
1210int pwrdm_post_transition(void)
1211{
1212 pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
1213 return 0;
1214}
1113 1215
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 9937e2814696..03c467c35f54 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -17,11 +17,11 @@
17#include "prcm-common.h" 17#include "prcm-common.h"
18 18
19#define OMAP2420_PRM_REGADDR(module, reg) \ 19#define OMAP2420_PRM_REGADDR(module, reg) \
20 IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) 20 OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
21#define OMAP2430_PRM_REGADDR(module, reg) \ 21#define OMAP2430_PRM_REGADDR(module, reg) \
22 IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) 22 OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
23#define OMAP34XX_PRM_REGADDR(module, reg) \ 23#define OMAP34XX_PRM_REGADDR(module, reg) \
24 IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) 24 OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
25 25
26/* 26/*
27 * Architecture-specific global PRM registers 27 * Architecture-specific global PRM registers
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 1a8bbd094066..0837eda5f2b6 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -48,9 +48,9 @@ static inline u32 sms_read_reg(u16 reg)
48 return __raw_readl(OMAP_SMS_REGADDR(reg)); 48 return __raw_readl(OMAP_SMS_REGADDR(reg));
49} 49}
50#else 50#else
51#define OMAP242X_SDRC_REGADDR(reg) IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) 51#define OMAP242X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
52#define OMAP243X_SDRC_REGADDR(reg) IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) 52#define OMAP243X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
53#define OMAP34XX_SDRC_REGADDR(reg) IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) 53#define OMAP34XX_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
54#endif /* __ASSEMBLER__ */ 54#endif /* __ASSEMBLER__ */
55 55
56#endif 56#endif
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index ce22344b94e7..3a529c77daa8 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -73,7 +73,7 @@ static LIST_HEAD(uart_list);
73 73
74static struct plat_serial8250_port serial_platform_data0[] = { 74static struct plat_serial8250_port serial_platform_data0[] = {
75 { 75 {
76 .membase = IO_ADDRESS(OMAP_UART1_BASE), 76 .membase = OMAP2_IO_ADDRESS(OMAP_UART1_BASE),
77 .mapbase = OMAP_UART1_BASE, 77 .mapbase = OMAP_UART1_BASE,
78 .irq = 72, 78 .irq = 72,
79 .flags = UPF_BOOT_AUTOCONF, 79 .flags = UPF_BOOT_AUTOCONF,
@@ -87,7 +87,7 @@ static struct plat_serial8250_port serial_platform_data0[] = {
87 87
88static struct plat_serial8250_port serial_platform_data1[] = { 88static struct plat_serial8250_port serial_platform_data1[] = {
89 { 89 {
90 .membase = IO_ADDRESS(OMAP_UART2_BASE), 90 .membase = OMAP2_IO_ADDRESS(OMAP_UART2_BASE),
91 .mapbase = OMAP_UART2_BASE, 91 .mapbase = OMAP_UART2_BASE,
92 .irq = 73, 92 .irq = 73,
93 .flags = UPF_BOOT_AUTOCONF, 93 .flags = UPF_BOOT_AUTOCONF,
@@ -101,7 +101,7 @@ static struct plat_serial8250_port serial_platform_data1[] = {
101 101
102static struct plat_serial8250_port serial_platform_data2[] = { 102static struct plat_serial8250_port serial_platform_data2[] = {
103 { 103 {
104 .membase = IO_ADDRESS(OMAP_UART3_BASE), 104 .membase = OMAP2_IO_ADDRESS(OMAP_UART3_BASE),
105 .mapbase = OMAP_UART3_BASE, 105 .mapbase = OMAP_UART3_BASE,
106 .irq = 74, 106 .irq = 74,
107 .flags = UPF_BOOT_AUTOCONF, 107 .flags = UPF_BOOT_AUTOCONF,
@@ -123,6 +123,21 @@ static struct plat_serial8250_port serial_platform_data2[] = {
123 } 123 }
124}; 124};
125 125
126#ifdef CONFIG_ARCH_OMAP4
127static struct plat_serial8250_port serial_platform_data3[] = {
128 {
129 .membase = IO_ADDRESS(OMAP_UART4_BASE),
130 .mapbase = OMAP_UART4_BASE,
131 .irq = 70,
132 .flags = UPF_BOOT_AUTOCONF,
133 .iotype = UPIO_MEM,
134 .regshift = 2,
135 .uartclk = OMAP24XX_BASE_BAUD * 16,
136 }, {
137 .flags = 0
138 }
139};
140#endif
126static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, 141static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
127 int offset) 142 int offset)
128{ 143{
@@ -470,7 +485,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
470 uart->padconf = 0; 485 uart->padconf = 0;
471 } 486 }
472 487
473 p->flags |= UPF_SHARE_IRQ; 488 p->irqflags |= IRQF_SHARED;
474 ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED, 489 ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED,
475 "serial idle", (void *)uart); 490 "serial idle", (void *)uart);
476 WARN_ON(ret); 491 WARN_ON(ret);
@@ -560,12 +575,22 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = {
560 }, 575 },
561 }, 576 },
562 }, 577 },
578#ifdef CONFIG_ARCH_OMAP4
579 {
580 .pdev = {
581 .name = "serial8250",
582 .id = 3
583 .dev = {
584 .platform_data = serial_platform_data3,
585 },
586 },
587 },
588#endif
563}; 589};
564 590
565void __init omap_serial_init(void) 591void __init omap_serial_early_init(void)
566{ 592{
567 int i; 593 int i;
568 const struct omap_uart_config *info;
569 char name[16]; 594 char name[16];
570 595
571 /* 596 /*
@@ -574,23 +599,12 @@ void __init omap_serial_init(void)
574 * if not needed. 599 * if not needed.
575 */ 600 */
576 601
577 info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
578
579 if (info == NULL)
580 return;
581
582 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { 602 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
583 struct omap_uart_state *uart = &omap_uart[i]; 603 struct omap_uart_state *uart = &omap_uart[i];
584 struct platform_device *pdev = &uart->pdev; 604 struct platform_device *pdev = &uart->pdev;
585 struct device *dev = &pdev->dev; 605 struct device *dev = &pdev->dev;
586 struct plat_serial8250_port *p = dev->platform_data; 606 struct plat_serial8250_port *p = dev->platform_data;
587 607
588 if (!(info->enabled_uarts & (1 << i))) {
589 p->membase = NULL;
590 p->mapbase = 0;
591 continue;
592 }
593
594 sprintf(name, "uart%d_ick", i+1); 608 sprintf(name, "uart%d_ick", i+1);
595 uart->ick = clk_get(NULL, name); 609 uart->ick = clk_get(NULL, name);
596 if (IS_ERR(uart->ick)) { 610 if (IS_ERR(uart->ick)) {
@@ -605,8 +619,11 @@ void __init omap_serial_init(void)
605 uart->fck = NULL; 619 uart->fck = NULL;
606 } 620 }
607 621
608 if (!uart->ick || !uart->fck) 622 /* FIXME: Remove this once the clkdev is ready */
609 continue; 623 if (!cpu_is_omap44xx()) {
624 if (!uart->ick || !uart->fck)
625 continue;
626 }
610 627
611 uart->num = i; 628 uart->num = i;
612 p->private_data = uart; 629 p->private_data = uart;
@@ -617,6 +634,18 @@ void __init omap_serial_init(void)
617 p->irq += 32; 634 p->irq += 32;
618 635
619 omap_uart_enable_clocks(uart); 636 omap_uart_enable_clocks(uart);
637 }
638}
639
640void __init omap_serial_init(void)
641{
642 int i;
643
644 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
645 struct omap_uart_state *uart = &omap_uart[i];
646 struct platform_device *pdev = &uart->pdev;
647 struct device *dev = &pdev->dev;
648
620 omap_uart_reset(uart); 649 omap_uart_reset(uart);
621 omap_uart_idle_init(uart); 650 omap_uart_idle_init(uart);
622 651
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index bb299851116d..9b62208658bc 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl:
128prcm_mask_val: 128prcm_mask_val:
129 .word 0xFFFF3FFC 129 .word 0xFFFF3FFC
130omap242x_sdi_timer_32ksynct_cr: 130omap242x_sdi_timer_32ksynct_cr:
131 .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) 131 .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
132ENTRY(omap242x_sram_ddr_init_sz) 132ENTRY(omap242x_sram_ddr_init_sz)
133 .word . - omap242x_sram_ddr_init 133 .word . - omap242x_sram_ddr_init
134 134
@@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl:
224ddr_prcm_mask_val: 224ddr_prcm_mask_val:
225 .word 0xFFFF3FFC 225 .word 0xFFFF3FFC
226omap242x_srs_timer_32ksynct: 226omap242x_srs_timer_32ksynct:
227 .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) 227 .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
228 228
229ENTRY(omap242x_sram_reprogram_sdrc_sz) 229ENTRY(omap242x_sram_reprogram_sdrc_sz)
230 .word . - omap242x_sram_reprogram_sdrc 230 .word . - omap242x_sram_reprogram_sdrc
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index 9955abcaeb31..df2cd9277c00 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl:
128prcm_mask_val: 128prcm_mask_val:
129 .word 0xFFFF3FFC 129 .word 0xFFFF3FFC
130omap243x_sdi_timer_32ksynct_cr: 130omap243x_sdi_timer_32ksynct_cr:
131 .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) 131 .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
132ENTRY(omap243x_sram_ddr_init_sz) 132ENTRY(omap243x_sram_ddr_init_sz)
133 .word . - omap243x_sram_ddr_init 133 .word . - omap243x_sram_ddr_init
134 134
@@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl:
224ddr_prcm_mask_val: 224ddr_prcm_mask_val:
225 .word 0xFFFF3FFC 225 .word 0xFFFF3FFC
226omap243x_srs_timer_32ksynct: 226omap243x_srs_timer_32ksynct:
227 .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) 227 .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
228 228
229ENTRY(omap243x_sram_reprogram_sdrc_sz) 229ENTRY(omap243x_sram_reprogram_sdrc_sz)
230 .word . - omap243x_sram_reprogram_sdrc 230 .word . - omap243x_sram_reprogram_sdrc
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 97eeeebcb066..e2338c0aebcf 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -231,7 +231,7 @@ static void __init omap2_gp_clocksource_init(void)
231static void __init omap2_gp_timer_init(void) 231static void __init omap2_gp_timer_init(void)
232{ 232{
233#ifdef CONFIG_LOCAL_TIMERS 233#ifdef CONFIG_LOCAL_TIMERS
234 twd_base = IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); 234 twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
235#endif 235#endif
236 omap_dm_timer_init(); 236 omap_dm_timer_init();
237 237
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 739e59e8025c..1145a2562b0f 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -31,15 +31,6 @@
31#include <mach/mux.h> 31#include <mach/mux.h>
32#include <mach/usb.h> 32#include <mach/usb.h>
33 33
34#define OTG_SYSCONFIG (OMAP34XX_HSUSB_OTG_BASE + 0x404)
35
36static void __init usb_musb_pm_init(void)
37{
38 /* Ensure force-idle mode for OTG controller */
39 if (cpu_is_omap34xx())
40 omap_writel(0, OTG_SYSCONFIG);
41}
42
43#ifdef CONFIG_USB_MUSB_SOC 34#ifdef CONFIG_USB_MUSB_SOC
44 35
45static struct resource musb_resources[] = { 36static struct resource musb_resources[] = {
@@ -173,13 +164,10 @@ void __init usb_musb_init(void)
173 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n"); 164 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
174 return; 165 return;
175 } 166 }
176
177 usb_musb_pm_init();
178} 167}
179 168
180#else 169#else
181void __init usb_musb_init(void) 170void __init usb_musb_init(void)
182{ 171{
183 usb_musb_pm_init();
184} 172}
185#endif /* CONFIG_USB_MUSB_SOC */ 173#endif /* CONFIG_USB_MUSB_SOC */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index efe85d095190..64b3f52bd9b2 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -120,6 +120,10 @@ config OMAP_MBOX_FWK
120config OMAP_IOMMU 120config OMAP_IOMMU
121 tristate 121 tristate
122 122
123config OMAP_IOMMU_DEBUG
124 depends on OMAP_IOMMU
125 tristate
126
123choice 127choice
124 prompt "System timer" 128 prompt "System timer"
125 default OMAP_MPU_TIMER 129 default OMAP_MPU_TIMER
@@ -183,6 +187,19 @@ config OMAP_SERIAL_WAKE
183 to data on the serial RX line. This allows you to wake the 187 to data on the serial RX line. This allows you to wake the
184 system from serial console. 188 system from serial console.
185 189
190choice
191 prompt "OMAP PM layer selection"
192 depends on ARCH_OMAP
193 default OMAP_PM_NOOP
194
195config OMAP_PM_NONE
196 bool "No PM layer"
197
198config OMAP_PM_NOOP
199 bool "No-op/debug PM layer"
200
201endchoice
202
186endmenu 203endmenu
187 204
188endif 205endif
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index a83279523958..98f01910c2cf 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -12,8 +12,13 @@ obj- :=
12# OCPI interconnect support for 1710, 1610 and 5912 12# OCPI interconnect support for 1710, 1610 and 5912
13obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o 13obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
14 14
15# omap_device support (OMAP2+ only at the moment)
16obj-$(CONFIG_ARCH_OMAP2) += omap_device.o
17obj-$(CONFIG_ARCH_OMAP3) += omap_device.o
18
15obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 19obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
16obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o 20obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o
21obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o
17 22
18obj-$(CONFIG_CPU_FREQ) += cpu-omap.o 23obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
19obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 24obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
@@ -25,3 +30,4 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
25# OMAP mailbox framework 30# OMAP mailbox framework
26obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o 31obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
27 32
33obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o \ No newline at end of file
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index e8c327a45a55..bf880e966d3b 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -488,7 +488,7 @@ static int __init clk_debugfs_init(void)
488 } 488 }
489 return 0; 489 return 0;
490err_out: 490err_out:
491 debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */ 491 debugfs_remove_recursive(clk_debugfs_root);
492 return err; 492 return err;
493} 493}
494late_initcall(clk_debugfs_init); 494late_initcall(clk_debugfs_init);
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 95587b6c0259..3a4768d55895 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -54,50 +54,6 @@ static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
54 struct omap_board_config_kernel *kinfo = NULL; 54 struct omap_board_config_kernel *kinfo = NULL;
55 int i; 55 int i;
56 56
57#ifdef CONFIG_OMAP_BOOT_TAG
58 struct omap_board_config_entry *info = NULL;
59
60 if (omap_bootloader_tag_len > 4)
61 info = (struct omap_board_config_entry *) omap_bootloader_tag;
62 while (info != NULL) {
63 u8 *next;
64
65 if (info->tag == tag) {
66 if (skip == 0)
67 break;
68 skip--;
69 }
70
71 if ((info->len & 0x03) != 0) {
72 /* We bail out to avoid an alignment fault */
73 printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
74 info->len, info->tag);
75 return NULL;
76 }
77 next = (u8 *) info + sizeof(*info) + info->len;
78 if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
79 info = NULL;
80 else
81 info = (struct omap_board_config_entry *) next;
82 }
83 if (info != NULL) {
84 /* Check the length as a lame attempt to check for
85 * binary inconsistency. */
86 if (len != NO_LENGTH_CHECK) {
87 /* Word-align len */
88 if (len & 0x03)
89 len = (len + 3) & ~0x03;
90 if (info->len != len) {
91 printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
92 tag, len, info->len);
93 return NULL;
94 }
95 }
96 if (len_out != NULL)
97 *len_out = info->len;
98 return info->data;
99 }
100#endif
101 /* Try to find the config from the board-specific structures 57 /* Try to find the config from the board-specific structures
102 * in the kernel. */ 58 * in the kernel. */
103 for (i = 0; i < omap_board_config_size; i++) { 59 for (i = 0; i < omap_board_config_size; i++) {
@@ -127,50 +83,6 @@ const void *omap_get_var_config(u16 tag, size_t *len)
127} 83}
128EXPORT_SYMBOL(omap_get_var_config); 84EXPORT_SYMBOL(omap_get_var_config);
129 85
130static int __init omap_add_serial_console(void)
131{
132 const struct omap_serial_console_config *con_info;
133 const struct omap_uart_config *uart_info;
134 static char speed[11], *opt = NULL;
135 int line, i, uart_idx;
136
137 uart_info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
138 con_info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
139 struct omap_serial_console_config);
140 if (uart_info == NULL || con_info == NULL)
141 return 0;
142
143 if (con_info->console_uart == 0)
144 return 0;
145
146 if (con_info->console_speed) {
147 snprintf(speed, sizeof(speed), "%u", con_info->console_speed);
148 opt = speed;
149 }
150
151 uart_idx = con_info->console_uart - 1;
152 if (uart_idx >= OMAP_MAX_NR_PORTS) {
153 printk(KERN_INFO "Console: external UART#%d. "
154 "Not adding it as console this time.\n",
155 uart_idx + 1);
156 return 0;
157 }
158 if (!(uart_info->enabled_uarts & (1 << uart_idx))) {
159 printk(KERN_ERR "Console: Selected UART#%d is "
160 "not enabled for this platform\n",
161 uart_idx + 1);
162 return -1;
163 }
164 line = 0;
165 for (i = 0; i < uart_idx; i++) {
166 if (uart_info->enabled_uarts & (1 << i))
167 line++;
168 }
169 return add_preferred_console("ttyS", line, opt);
170}
171console_initcall(omap_add_serial_console);
172
173
174/* 86/*
175 * 32KHz clocksource ... always available, on pretty most chips except 87 * 32KHz clocksource ... always available, on pretty most chips except
176 * OMAP 730 and 1510. Other timers could be used as clocksources, with 88 * OMAP 730 and 1510. Other timers could be used as clocksources, with
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 9b00f4cbc903..fd3154ae69b1 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2347,16 +2347,16 @@ static int __init omap_init_dma(void)
2347 int ch, r; 2347 int ch, r;
2348 2348
2349 if (cpu_class_is_omap1()) { 2349 if (cpu_class_is_omap1()) {
2350 omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE); 2350 omap_dma_base = OMAP1_IO_ADDRESS(OMAP1_DMA_BASE);
2351 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; 2351 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
2352 } else if (cpu_is_omap24xx()) { 2352 } else if (cpu_is_omap24xx()) {
2353 omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE); 2353 omap_dma_base = OMAP2_IO_ADDRESS(OMAP24XX_DMA4_BASE);
2354 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2354 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2355 } else if (cpu_is_omap34xx()) { 2355 } else if (cpu_is_omap34xx()) {
2356 omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE); 2356 omap_dma_base = OMAP2_IO_ADDRESS(OMAP34XX_DMA4_BASE);
2357 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2357 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2358 } else if (cpu_is_omap44xx()) { 2358 } else if (cpu_is_omap44xx()) {
2359 omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE); 2359 omap_dma_base = OMAP2_IO_ADDRESS(OMAP44XX_DMA4_BASE);
2360 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2360 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2361 } else { 2361 } else {
2362 pr_err("DMA init failed for unsupported omap\n"); 2362 pr_err("DMA init failed for unsupported omap\n");
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 7f50b6103dee..d325b54daeb5 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -774,7 +774,10 @@ int __init omap_dm_timer_init(void)
774 774
775 for (i = 0; i < dm_timer_count; i++) { 775 for (i = 0; i < dm_timer_count; i++) {
776 timer = &dm_timers[i]; 776 timer = &dm_timers[i];
777 timer->io_base = IO_ADDRESS(timer->phys_base); 777 if (cpu_class_is_omap1())
778 timer->io_base = OMAP1_IO_ADDRESS(timer->phys_base);
779 else
780 timer->io_base = OMAP2_IO_ADDRESS(timer->phys_base);
778#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ 781#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
779 defined(CONFIG_ARCH_OMAP4) 782 defined(CONFIG_ARCH_OMAP4)
780 if (cpu_class_is_omap2()) { 783 if (cpu_class_is_omap2()) {
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 176c86e5531d..693839c89ad0 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -31,7 +31,7 @@
31/* 31/*
32 * OMAP1510 GPIO registers 32 * OMAP1510 GPIO registers
33 */ 33 */
34#define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000) 34#define OMAP1510_GPIO_BASE OMAP1_IO_ADDRESS(0xfffce000)
35#define OMAP1510_GPIO_DATA_INPUT 0x00 35#define OMAP1510_GPIO_DATA_INPUT 0x00
36#define OMAP1510_GPIO_DATA_OUTPUT 0x04 36#define OMAP1510_GPIO_DATA_OUTPUT 0x04
37#define OMAP1510_GPIO_DIR_CONTROL 0x08 37#define OMAP1510_GPIO_DIR_CONTROL 0x08
@@ -45,10 +45,10 @@
45/* 45/*
46 * OMAP1610 specific GPIO registers 46 * OMAP1610 specific GPIO registers
47 */ 47 */
48#define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400) 48#define OMAP1610_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbe400)
49#define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00) 49#define OMAP1610_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbec00)
50#define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400) 50#define OMAP1610_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbb400)
51#define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00) 51#define OMAP1610_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbbc00)
52#define OMAP1610_GPIO_REVISION 0x0000 52#define OMAP1610_GPIO_REVISION 0x0000
53#define OMAP1610_GPIO_SYSCONFIG 0x0010 53#define OMAP1610_GPIO_SYSCONFIG 0x0010
54#define OMAP1610_GPIO_SYSSTATUS 0x0014 54#define OMAP1610_GPIO_SYSSTATUS 0x0014
@@ -70,12 +70,12 @@
70/* 70/*
71 * OMAP730 specific GPIO registers 71 * OMAP730 specific GPIO registers
72 */ 72 */
73#define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000) 73#define OMAP730_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000)
74#define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800) 74#define OMAP730_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800)
75#define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000) 75#define OMAP730_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000)
76#define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800) 76#define OMAP730_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800)
77#define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000) 77#define OMAP730_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000)
78#define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800) 78#define OMAP730_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800)
79#define OMAP730_GPIO_DATA_INPUT 0x00 79#define OMAP730_GPIO_DATA_INPUT 0x00
80#define OMAP730_GPIO_DATA_OUTPUT 0x04 80#define OMAP730_GPIO_DATA_OUTPUT 0x04
81#define OMAP730_GPIO_DIR_CONTROL 0x08 81#define OMAP730_GPIO_DIR_CONTROL 0x08
@@ -86,12 +86,12 @@
86/* 86/*
87 * OMAP850 specific GPIO registers 87 * OMAP850 specific GPIO registers
88 */ 88 */
89#define OMAP850_GPIO1_BASE IO_ADDRESS(0xfffbc000) 89#define OMAP850_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000)
90#define OMAP850_GPIO2_BASE IO_ADDRESS(0xfffbc800) 90#define OMAP850_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800)
91#define OMAP850_GPIO3_BASE IO_ADDRESS(0xfffbd000) 91#define OMAP850_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000)
92#define OMAP850_GPIO4_BASE IO_ADDRESS(0xfffbd800) 92#define OMAP850_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800)
93#define OMAP850_GPIO5_BASE IO_ADDRESS(0xfffbe000) 93#define OMAP850_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000)
94#define OMAP850_GPIO6_BASE IO_ADDRESS(0xfffbe800) 94#define OMAP850_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800)
95#define OMAP850_GPIO_DATA_INPUT 0x00 95#define OMAP850_GPIO_DATA_INPUT 0x00
96#define OMAP850_GPIO_DATA_OUTPUT 0x04 96#define OMAP850_GPIO_DATA_OUTPUT 0x04
97#define OMAP850_GPIO_DIR_CONTROL 0x08 97#define OMAP850_GPIO_DIR_CONTROL 0x08
@@ -99,19 +99,21 @@
99#define OMAP850_GPIO_INT_MASK 0x10 99#define OMAP850_GPIO_INT_MASK 0x10
100#define OMAP850_GPIO_INT_STATUS 0x14 100#define OMAP850_GPIO_INT_STATUS 0x14
101 101
102#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
103
102/* 104/*
103 * omap24xx specific GPIO registers 105 * omap24xx specific GPIO registers
104 */ 106 */
105#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) 107#define OMAP242X_GPIO1_BASE OMAP2_IO_ADDRESS(0x48018000)
106#define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000) 108#define OMAP242X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4801a000)
107#define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000) 109#define OMAP242X_GPIO3_BASE OMAP2_IO_ADDRESS(0x4801c000)
108#define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000) 110#define OMAP242X_GPIO4_BASE OMAP2_IO_ADDRESS(0x4801e000)
109 111
110#define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000) 112#define OMAP243X_GPIO1_BASE OMAP2_IO_ADDRESS(0x4900C000)
111#define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000) 113#define OMAP243X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4900E000)
112#define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000) 114#define OMAP243X_GPIO3_BASE OMAP2_IO_ADDRESS(0x49010000)
113#define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000) 115#define OMAP243X_GPIO4_BASE OMAP2_IO_ADDRESS(0x49012000)
114#define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000) 116#define OMAP243X_GPIO5_BASE OMAP2_IO_ADDRESS(0x480B6000)
115 117
116#define OMAP24XX_GPIO_REVISION 0x0000 118#define OMAP24XX_GPIO_REVISION 0x0000
117#define OMAP24XX_GPIO_SYSCONFIG 0x0010 119#define OMAP24XX_GPIO_SYSCONFIG 0x0010
@@ -168,24 +170,22 @@
168 * omap34xx specific GPIO registers 170 * omap34xx specific GPIO registers
169 */ 171 */
170 172
171#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000) 173#define OMAP34XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x48310000)
172#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000) 174#define OMAP34XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x49050000)
173#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000) 175#define OMAP34XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x49052000)
174#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000) 176#define OMAP34XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x49054000)
175#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) 177#define OMAP34XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x49056000)
176#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) 178#define OMAP34XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x49058000)
177 179
178/* 180/*
179 * OMAP44XX specific GPIO registers 181 * OMAP44XX specific GPIO registers
180 */ 182 */
181#define OMAP44XX_GPIO1_BASE IO_ADDRESS(0x4a310000) 183#define OMAP44XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x4a310000)
182#define OMAP44XX_GPIO2_BASE IO_ADDRESS(0x48055000) 184#define OMAP44XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x48055000)
183#define OMAP44XX_GPIO3_BASE IO_ADDRESS(0x48057000) 185#define OMAP44XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x48057000)
184#define OMAP44XX_GPIO4_BASE IO_ADDRESS(0x48059000) 186#define OMAP44XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x48059000)
185#define OMAP44XX_GPIO5_BASE IO_ADDRESS(0x4805B000) 187#define OMAP44XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x4805B000)
186#define OMAP44XX_GPIO6_BASE IO_ADDRESS(0x4805D000) 188#define OMAP44XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x4805D000)
187
188#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
189 189
190struct gpio_bank { 190struct gpio_bank {
191 void __iomem *base; 191 void __iomem *base;
@@ -221,7 +221,7 @@ struct gpio_bank {
221 221
222#ifdef CONFIG_ARCH_OMAP16XX 222#ifdef CONFIG_ARCH_OMAP16XX
223static struct gpio_bank gpio_bank_1610[5] = { 223static struct gpio_bank gpio_bank_1610[5] = {
224 { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, 224 { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO},
225 { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, 225 { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 },
226 { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, 226 { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
227 { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, 227 { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
@@ -231,14 +231,14 @@ static struct gpio_bank gpio_bank_1610[5] = {
231 231
232#ifdef CONFIG_ARCH_OMAP15XX 232#ifdef CONFIG_ARCH_OMAP15XX
233static struct gpio_bank gpio_bank_1510[2] = { 233static struct gpio_bank gpio_bank_1510[2] = {
234 { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, 234 { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
235 { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } 235 { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 }
236}; 236};
237#endif 237#endif
238 238
239#ifdef CONFIG_ARCH_OMAP730 239#ifdef CONFIG_ARCH_OMAP730
240static struct gpio_bank gpio_bank_730[7] = { 240static struct gpio_bank gpio_bank_730[7] = {
241 { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, 241 { OMAP1_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
242 { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, 242 { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 },
243 { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, 243 { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 },
244 { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, 244 { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 },
@@ -250,7 +250,7 @@ static struct gpio_bank gpio_bank_730[7] = {
250 250
251#ifdef CONFIG_ARCH_OMAP850 251#ifdef CONFIG_ARCH_OMAP850
252static struct gpio_bank gpio_bank_850[7] = { 252static struct gpio_bank gpio_bank_850[7] = {
253 { OMAP_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, 253 { OMAP1_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
254 { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 }, 254 { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
255 { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 }, 255 { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
256 { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 }, 256 { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },
@@ -2032,7 +2032,7 @@ void omap2_gpio_resume_after_retention(void)
2032 return; 2032 return;
2033 for (i = 0; i < gpio_bank_count; i++) { 2033 for (i = 0; i < gpio_bank_count; i++) {
2034 struct gpio_bank *bank = &gpio_bank[i]; 2034 struct gpio_bank *bank = &gpio_bank[i];
2035 u32 l; 2035 u32 l, gen, gen0, gen1;
2036 2036
2037 if (!(bank->enabled_non_wakeup_gpios)) 2037 if (!(bank->enabled_non_wakeup_gpios))
2038 continue; 2038 continue;
@@ -2056,13 +2056,32 @@ void omap2_gpio_resume_after_retention(void)
2056 * this silicon bug. */ 2056 * this silicon bug. */
2057 l ^= bank->saved_datain; 2057 l ^= bank->saved_datain;
2058 l &= bank->non_wakeup_gpios; 2058 l &= bank->non_wakeup_gpios;
2059 if (l) { 2059
2060 /*
2061 * No need to generate IRQs for the rising edge for gpio IRQs
2062 * configured with falling edge only; and vice versa.
2063 */
2064 gen0 = l & bank->saved_fallingdetect;
2065 gen0 &= bank->saved_datain;
2066
2067 gen1 = l & bank->saved_risingdetect;
2068 gen1 &= ~(bank->saved_datain);
2069
2070 /* FIXME: Consider GPIO IRQs with level detections properly! */
2071 gen = l & (~(bank->saved_fallingdetect) &
2072 ~(bank->saved_risingdetect));
2073 /* Consider all GPIO IRQs needed to be updated */
2074 gen |= gen0 | gen1;
2075
2076 if (gen) {
2060 u32 old0, old1; 2077 u32 old0, old1;
2061#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 2078#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
2062 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); 2079 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
2063 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); 2080 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
2064 __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); 2081 __raw_writel(old0 | gen, bank->base +
2065 __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1); 2082 OMAP24XX_GPIO_LEVELDETECT0);
2083 __raw_writel(old1 | gen, bank->base +
2084 OMAP24XX_GPIO_LEVELDETECT1);
2066 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); 2085 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
2067 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); 2086 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
2068#endif 2087#endif
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index 50ea79a0efa2..8e913c322810 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -16,10 +16,8 @@
16 16
17/* Different peripheral ids */ 17/* Different peripheral ids */
18#define OMAP_TAG_CLOCK 0x4f01 18#define OMAP_TAG_CLOCK 0x4f01
19#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
20#define OMAP_TAG_LCD 0x4f05 19#define OMAP_TAG_LCD 0x4f05
21#define OMAP_TAG_GPIO_SWITCH 0x4f06 20#define OMAP_TAG_GPIO_SWITCH 0x4f06
22#define OMAP_TAG_UART 0x4f07
23#define OMAP_TAG_FBMEM 0x4f08 21#define OMAP_TAG_FBMEM 0x4f08
24#define OMAP_TAG_STI_CONSOLE 0x4f09 22#define OMAP_TAG_STI_CONSOLE 0x4f09
25#define OMAP_TAG_CAMERA_SENSOR 0x4f0a 23#define OMAP_TAG_CAMERA_SENSOR 0x4f0a
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h
index b9d0dd2da89b..99ebd886f134 100644
--- a/arch/arm/plat-omap/include/mach/clockdomain.h
+++ b/arch/arm/plat-omap/include/mach/clockdomain.h
@@ -95,7 +95,8 @@ int clkdm_register(struct clockdomain *clkdm);
95int clkdm_unregister(struct clockdomain *clkdm); 95int clkdm_unregister(struct clockdomain *clkdm);
96struct clockdomain *clkdm_lookup(const char *name); 96struct clockdomain *clkdm_lookup(const char *name);
97 97
98int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)); 98int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
99 void *user);
99struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm); 100struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
100 101
101void omap2_clkdm_allow_idle(struct clockdomain *clkdm); 102void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index 8140dbccb7bc..826d317cdbec 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -20,15 +20,15 @@
20 20
21#ifndef __ASSEMBLY__ 21#ifndef __ASSEMBLY__
22#define OMAP242X_CTRL_REGADDR(reg) \ 22#define OMAP242X_CTRL_REGADDR(reg) \
23 IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 23 OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
24#define OMAP243X_CTRL_REGADDR(reg) \ 24#define OMAP243X_CTRL_REGADDR(reg) \
25 IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 25 OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
26#define OMAP343X_CTRL_REGADDR(reg) \ 26#define OMAP343X_CTRL_REGADDR(reg) \
27 IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 27 OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
28#else 28#else
29#define OMAP242X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 29#define OMAP242X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
30#define OMAP243X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 30#define OMAP243X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
31#define OMAP343X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 31#define OMAP343X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
32#endif /* __ASSEMBLY__ */ 32#endif /* __ASSEMBLY__ */
33 33
34/* 34/*
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 56426ed45ef4..a5592991634d 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -41,7 +41,7 @@
41 .endm 41 .endm
42 42
43 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 43 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
44 ldr \base, =IO_ADDRESS(OMAP_IH1_BASE) 44 ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
45 ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] 45 ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
46 ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] 46 ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET]
47 mov \irqstat, #0xffffffff 47 mov \irqstat, #0xffffffff
@@ -53,7 +53,7 @@
53 cmp \irqnr, #0 53 cmp \irqnr, #0
54 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] 54 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
55 cmpeq \irqnr, #INT_IH2_IRQ 55 cmpeq \irqnr, #INT_IH2_IRQ
56 ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE) 56 ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
57 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] 57 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
58 addeqs \irqnr, \irqnr, #32 58 addeqs \irqnr, \irqnr, #32
591510: 591510:
@@ -68,9 +68,9 @@
68 68
69/* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ 69/* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */
70#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) 70#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430)
71#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) 71#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE)
72#elif defined(CONFIG_ARCH_OMAP34XX) 72#elif defined(CONFIG_ARCH_OMAP34XX)
73#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE) 73#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE)
74#endif 74#endif
75#if defined(CONFIG_ARCH_OMAP4) 75#if defined(CONFIG_ARCH_OMAP4)
76#include <mach/omap44xx.h> 76#include <mach/omap44xx.h>
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 2b22a8799bc6..633ff688b928 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -29,7 +29,7 @@
29#include <linux/io.h> 29#include <linux/io.h>
30#include <mach/irqs.h> 30#include <mach/irqs.h>
31 31
32#define OMAP_MPUIO_BASE 0xfffb5000 32#define OMAP1_MPUIO_BASE 0xfffb5000
33 33
34#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)) 34#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
35 35
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 21fb0efdda86..8d32df32b0b1 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -54,17 +54,33 @@
54 * ---------------------------------------------------------------------------- 54 * ----------------------------------------------------------------------------
55 */ 55 */
56 56
57#if defined(CONFIG_ARCH_OMAP1) 57#ifdef __ASSEMBLER__
58#define IOMEM(x) (x)
59#else
60#define IOMEM(x) ((void __force __iomem *)(x))
61#endif
62
63#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
64#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
65
66#define OMAP2_IO_OFFSET 0x90000000
67#define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */
68
69/*
70 * ----------------------------------------------------------------------------
71 * Omap1 specific IO mapping
72 * ----------------------------------------------------------------------------
73 */
58 74
59#define IO_PHYS 0xFFFB0000 75#define OMAP1_IO_PHYS 0xFFFB0000
60#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ 76#define OMAP1_IO_SIZE 0x40000
61#define IO_SIZE 0x40000 77#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
62#define IO_VIRT (IO_PHYS - IO_OFFSET)
63#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET)
64#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
65#define io_v2p(va) ((va) + IO_OFFSET)
66 78
67#elif defined(CONFIG_ARCH_OMAP2) 79/*
80 * ----------------------------------------------------------------------------
81 * Omap2 specific IO mapping
82 * ----------------------------------------------------------------------------
83 */
68 84
69/* We map both L3 and L4 on OMAP2 */ 85/* We map both L3 and L4 on OMAP2 */
70#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ 86#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */
@@ -87,11 +103,6 @@
87#define OMAP243X_SMS_VIRT 0xFC000000 103#define OMAP243X_SMS_VIRT 0xFC000000
88#define OMAP243X_SMS_SIZE SZ_1M 104#define OMAP243X_SMS_SIZE SZ_1M
89 105
90#define IO_OFFSET 0x90000000
91#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
92#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
93#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
94
95/* DSP */ 106/* DSP */
96#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ 107#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
97#define DSP_MEM_24XX_VIRT 0xe0000000 108#define DSP_MEM_24XX_VIRT 0xe0000000
@@ -103,7 +114,11 @@
103#define DSP_MMU_24XX_VIRT 0xe2000000 114#define DSP_MMU_24XX_VIRT 0xe2000000
104#define DSP_MMU_24XX_SIZE SZ_4K 115#define DSP_MMU_24XX_SIZE SZ_4K
105 116
106#elif defined(CONFIG_ARCH_OMAP3) 117/*
118 * ----------------------------------------------------------------------------
119 * Omap3 specific IO mapping
120 * ----------------------------------------------------------------------------
121 */
107 122
108/* We map both L3 and L4 on OMAP3 */ 123/* We map both L3 and L4 on OMAP3 */
109#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ 124#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */
@@ -143,12 +158,6 @@
143#define OMAP343X_SDRC_VIRT 0xFD000000 158#define OMAP343X_SDRC_VIRT 0xFD000000
144#define OMAP343X_SDRC_SIZE SZ_1M 159#define OMAP343X_SDRC_SIZE SZ_1M
145 160
146
147#define IO_OFFSET 0x90000000
148#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
149#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
150#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
151
152/* DSP */ 161/* DSP */
153#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ 162#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */
154#define DSP_MEM_34XX_VIRT 0xe0000000 163#define DSP_MEM_34XX_VIRT 0xe0000000
@@ -160,8 +169,12 @@
160#define DSP_MMU_34XX_VIRT 0xe2000000 169#define DSP_MMU_34XX_VIRT 0xe2000000
161#define DSP_MMU_34XX_SIZE SZ_4K 170#define DSP_MMU_34XX_SIZE SZ_4K
162 171
172/*
173 * ----------------------------------------------------------------------------
174 * Omap4 specific IO mapping
175 * ----------------------------------------------------------------------------
176 */
163 177
164#elif defined(CONFIG_ARCH_OMAP4)
165/* We map both L3 and L4 on OMAP4 */ 178/* We map both L3 and L4 on OMAP4 */
166#define L3_44XX_PHYS L3_44XX_BASE 179#define L3_44XX_PHYS L3_44XX_BASE
167#define L3_44XX_VIRT 0xd4000000 180#define L3_44XX_VIRT 0xd4000000
@@ -189,38 +202,24 @@
189#define OMAP44XX_GPMC_SIZE SZ_1M 202#define OMAP44XX_GPMC_SIZE SZ_1M
190 203
191 204
192#define IO_OFFSET 0x90000000 205/*
193#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 206 * ----------------------------------------------------------------------------
194#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 207 * Omap specific register access
195#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ 208 * ----------------------------------------------------------------------------
196 209 */
197#endif
198
199#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
200#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa))
201#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa))
202 210
203#ifdef __ASSEMBLER__ 211#ifndef __ASSEMBLER__
204#define IOMEM(x) (x)
205#else
206#define IOMEM(x) ((void __force __iomem *)(x))
207 212
208/* 213/*
209 * Functions to access the OMAP IO region 214 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
210 *
211 * NOTE: - Use omap_read/write[bwl] for physical register addresses
212 * - Use __raw_read/write[bwl]() for virtual register addresses
213 * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
214 * - DO NOT use hardcoded virtual addresses to allow changing the
215 * IO address space again if needed
216 */ 215 */
217#define omap_readb(a) __raw_readb(IO_ADDRESS(a))
218#define omap_readw(a) __raw_readw(IO_ADDRESS(a))
219#define omap_readl(a) __raw_readl(IO_ADDRESS(a))
220 216
221#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a)) 217extern u8 omap_readb(u32 pa);
222#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a)) 218extern u16 omap_readw(u32 pa);
223#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a)) 219extern u32 omap_readl(u32 pa);
220extern void omap_writeb(u8 v, u32 pa);
221extern void omap_writew(u16 v, u32 pa);
222extern void omap_writel(u32 v, u32 pa);
224 223
225struct omap_sdrc_params; 224struct omap_sdrc_params;
226 225
diff --git a/arch/arm/plat-omap/include/mach/iommu.h b/arch/arm/plat-omap/include/mach/iommu.h
index 769b00b4c34a..46d41ac83dbf 100644
--- a/arch/arm/plat-omap/include/mach/iommu.h
+++ b/arch/arm/plat-omap/include/mach/iommu.h
@@ -95,7 +95,7 @@ struct iommu_functions {
95 95
96 void (*save_ctx)(struct iommu *obj); 96 void (*save_ctx)(struct iommu *obj);
97 void (*restore_ctx)(struct iommu *obj); 97 void (*restore_ctx)(struct iommu *obj);
98 ssize_t (*dump_ctx)(struct iommu *obj, char *buf); 98 ssize_t (*dump_ctx)(struct iommu *obj, char *buf, ssize_t len);
99}; 99};
100 100
101struct iommu_platform_data { 101struct iommu_platform_data {
@@ -162,7 +162,7 @@ extern void uninstall_iommu_arch(const struct iommu_functions *ops);
162extern int foreach_iommu_device(void *data, 162extern int foreach_iommu_device(void *data,
163 int (*fn)(struct device *, void *)); 163 int (*fn)(struct device *, void *));
164 164
165extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf); 165extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len);
166extern size_t dump_tlb_entries(struct iommu *obj, char *buf); 166extern size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t len);
167 167
168#endif /* __MACH_IOMMU_H */ 168#endif /* __MACH_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/mach/mtd-xip.h b/arch/arm/plat-omap/include/mach/mtd-xip.h
index 39b591ff54bb..f82a8dcaad94 100644
--- a/arch/arm/plat-omap/include/mach/mtd-xip.h
+++ b/arch/arm/plat-omap/include/mach/mtd-xip.h
@@ -25,7 +25,7 @@ typedef struct {
25} xip_omap_mpu_timer_regs_t; 25} xip_omap_mpu_timer_regs_t;
26 26
27#define xip_omap_mpu_timer_base(n) \ 27#define xip_omap_mpu_timer_base(n) \
28((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ 28((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
29 (n)*OMAP_MPU_TIMER_OFFSET)) 29 (n)*OMAP_MPU_TIMER_OFFSET))
30 30
31static inline unsigned long xip_omap_mpu_timer_read(int nr) 31static inline unsigned long xip_omap_mpu_timer_read(int nr)
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 80281c458baf..98dfab651dfc 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -857,6 +857,37 @@ enum omap34xx_index {
857 /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */ 857 /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
858 H16_34XX_SDRC_CKE0, 858 H16_34XX_SDRC_CKE0,
859 H17_34XX_SDRC_CKE1, 859 H17_34XX_SDRC_CKE1,
860
861 /* MMC1 */
862 N28_3430_MMC1_CLK,
863 M27_3430_MMC1_CMD,
864 N27_3430_MMC1_DAT0,
865 N26_3430_MMC1_DAT1,
866 N25_3430_MMC1_DAT2,
867 P28_3430_MMC1_DAT3,
868 P27_3430_MMC1_DAT4,
869 P26_3430_MMC1_DAT5,
870 R27_3430_MMC1_DAT6,
871 R25_3430_MMC1_DAT7,
872
873 /* MMC2 */
874 AE2_3430_MMC2_CLK,
875 AG5_3430_MMC2_CMD,
876 AH5_3430_MMC2_DAT0,
877 AH4_3430_MMC2_DAT1,
878 AG4_3430_MMC2_DAT2,
879 AF4_3430_MMC2_DAT3,
880
881 /* MMC3 */
882 AF10_3430_MMC3_CLK,
883 AC3_3430_MMC3_CMD,
884 AE11_3430_MMC3_DAT0,
885 AH9_3430_MMC3_DAT1,
886 AF13_3430_MMC3_DAT2,
887 AF13_3430_MMC3_DAT3,
888
889 /* SYS_NIRQ T2 INT1 */
890 AF26_34XX_SYS_NIRQ,
860}; 891};
861 892
862struct omap_mux_cfg { 893struct omap_mux_cfg {
diff --git a/arch/arm/plat-omap/include/mach/omap-pm.h b/arch/arm/plat-omap/include/mach/omap-pm.h
new file mode 100644
index 000000000000..3ee41d711492
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap-pm.h
@@ -0,0 +1,301 @@
1/*
2 * omap-pm.h - OMAP power management interface
3 *
4 * Copyright (C) 2008-2009 Texas Instruments, Inc.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 * Paul Walmsley
7 *
8 * Interface developed by (in alphabetical order): Karthik Dasu, Jouni
9 * Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa,
10 * Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley,
11 * Richard Woodruff
12 */
13
14#ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H
15#define ASM_ARM_ARCH_OMAP_OMAP_PM_H
16
17#include <linux/device.h>
18#include <linux/cpufreq.h>
19
20#include "powerdomain.h"
21
22/**
23 * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
24 * @rate: target clock rate
25 * @opp_id: OPP ID
26 * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
27 *
28 * Operating performance point data. Can vary by OMAP chip and board.
29 */
30struct omap_opp {
31 unsigned long rate;
32 u8 opp_id;
33 u16 min_vdd;
34};
35
36extern struct omap_opp *mpu_opps;
37extern struct omap_opp *dsp_opps;
38extern struct omap_opp *l3_opps;
39
40/*
41 * agent_id values for use with omap_pm_set_min_bus_tput():
42 *
43 * OCP_INITIATOR_AGENT is only valid for devices that can act as
44 * initiators -- it represents the device's L3 interconnect
45 * connection. OCP_TARGET_AGENT represents the device's L4
46 * interconnect connection.
47 */
48#define OCP_TARGET_AGENT 1
49#define OCP_INITIATOR_AGENT 2
50
51/**
52 * omap_pm_if_early_init - OMAP PM init code called before clock fw init
53 * @mpu_opp_table: array ptr to struct omap_opp for MPU
54 * @dsp_opp_table: array ptr to struct omap_opp for DSP
55 * @l3_opp_table : array ptr to struct omap_opp for CORE
56 *
57 * Initialize anything that must be configured before the clock
58 * framework starts. The "_if_" is to avoid name collisions with the
59 * PM idle-loop code.
60 */
61int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
62 struct omap_opp *dsp_opp_table,
63 struct omap_opp *l3_opp_table);
64
65/**
66 * omap_pm_if_init - OMAP PM init code called after clock fw init
67 *
68 * The main initialization code. OPP tables are passed in here. The
69 * "_if_" is to avoid name collisions with the PM idle-loop code.
70 */
71int __init omap_pm_if_init(void);
72
73/**
74 * omap_pm_if_exit - OMAP PM exit code
75 *
76 * Exit code; currently unused. The "_if_" is to avoid name
77 * collisions with the PM idle-loop code.
78 */
79void omap_pm_if_exit(void);
80
81/*
82 * Device-driver-originated constraints (via board-*.c files, platform_data)
83 */
84
85
86/**
87 * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
88 * @dev: struct device * requesting the constraint
89 * @t: maximum MPU wakeup latency in microseconds
90 *
91 * Request that the maximum interrupt latency for the MPU to be no
92 * greater than 't' microseconds. "Interrupt latency" in this case is
93 * defined as the elapsed time from the occurrence of a hardware or
94 * timer interrupt to the time when the device driver's interrupt
95 * service routine has been entered by the MPU.
96 *
97 * It is intended that underlying PM code will use this information to
98 * determine what power state to put the MPU powerdomain into, and
99 * possibly the CORE powerdomain as well, since interrupt handling
100 * code currently runs from SDRAM. Advanced PM or board*.c code may
101 * also configure interrupt controller priorities, OCP bus priorities,
102 * CPU speed(s), etc.
103 *
104 * This function will not affect device wakeup latency, e.g., time
105 * elapsed from when a device driver enables a hardware device with
106 * clk_enable(), to when the device is ready for register access or
107 * other use. To control this device wakeup latency, use
108 * set_max_dev_wakeup_lat()
109 *
110 * Multiple calls to set_max_mpu_wakeup_lat() will replace the
111 * previous t value. To remove the latency target for the MPU, call
112 * with t = -1.
113 *
114 * No return value.
115 */
116void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
117
118
119/**
120 * omap_pm_set_min_bus_tput - set minimum bus throughput needed by device
121 * @dev: struct device * requesting the constraint
122 * @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT)
123 * @r: minimum throughput (in KiB/s)
124 *
125 * Request that the minimum data throughput on the OCP interconnect
126 * attached to device 'dev' interconnect agent 'tbus_id' be no less
127 * than 'r' KiB/s.
128 *
129 * It is expected that the OMAP PM or bus code will use this
130 * information to set the interconnect clock to run at the lowest
131 * possible speed that satisfies all current system users. The PM or
132 * bus code will adjust the estimate based on its model of the bus, so
133 * device driver authors should attempt to specify an accurate
134 * quantity for their device use case, and let the PM or bus code
135 * overestimate the numbers as necessary to handle request/response
136 * latency, other competing users on the system, etc. On OMAP2/3, if
137 * a driver requests a minimum L4 interconnect speed constraint, the
138 * code will also need to add an minimum L3 interconnect speed
139 * constraint,
140 *
141 * Multiple calls to set_min_bus_tput() will replace the previous rate
142 * value for this device. To remove the interconnect throughput
143 * restriction for this device, call with r = 0.
144 *
145 * No return value.
146 */
147void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
148
149
150/**
151 * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
152 * @dev: struct device *
153 * @t: maximum device wakeup latency in microseconds
154 *
155 * Request that the maximum amount of time necessary for a device to
156 * become accessible after its clocks are enabled should be no greater
157 * than 't' microseconds. Specifically, this represents the time from
158 * when a device driver enables device clocks with clk_enable(), to
159 * when the register reads and writes on the device will succeed.
160 * This function should be called before clk_disable() is called,
161 * since the power state transition decision may be made during
162 * clk_disable().
163 *
164 * It is intended that underlying PM code will use this information to
165 * determine what power state to put the powerdomain enclosing this
166 * device into.
167 *
168 * Multiple calls to set_max_dev_wakeup_lat() will replace the
169 * previous wakeup latency values for this device. To remove the wakeup
170 * latency restriction for this device, call with t = -1.
171 *
172 * No return value.
173 */
174void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t);
175
176
177/**
178 * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
179 * @dev: struct device *
180 * @t: maximum DMA transfer start latency in microseconds
181 *
182 * Request that the maximum system DMA transfer start latency for this
183 * device 'dev' should be no greater than 't' microseconds. "DMA
184 * transfer start latency" here is defined as the elapsed time from
185 * when a device (e.g., McBSP) requests that a system DMA transfer
186 * start or continue, to the time at which data starts to flow into
187 * that device from the system DMA controller.
188 *
189 * It is intended that underlying PM code will use this information to
190 * determine what power state to put the CORE powerdomain into.
191 *
192 * Since system DMA transfers may not involve the MPU, this function
193 * will not affect MPU wakeup latency. Use set_max_cpu_lat() to do
194 * so. Similarly, this function will not affect device wakeup latency
195 * -- use set_max_dev_wakeup_lat() to affect that.
196 *
197 * Multiple calls to set_max_sdma_lat() will replace the previous t
198 * value for this device. To remove the maximum DMA latency for this
199 * device, call with t = -1.
200 *
201 * No return value.
202 */
203void omap_pm_set_max_sdma_lat(struct device *dev, long t);
204
205
206/*
207 * DSP Bridge-specific constraints
208 */
209
210/**
211 * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
212 *
213 * Intended for use by DSPBridge. Returns an array of OPP->DSP clock
214 * frequency entries. The final item in the array should have .rate =
215 * .opp_id = 0.
216 */
217const struct omap_opp *omap_pm_dsp_get_opp_table(void);
218
219/**
220 * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
221 * @opp_id: target DSP OPP ID
222 *
223 * Set a minimum OPP ID for the DSP. This is intended to be called
224 * only from the DSP Bridge MPU-side driver. Unfortunately, the only
225 * information that code receives from the DSP/BIOS load estimator is the
226 * target OPP ID; hence, this interface. No return value.
227 */
228void omap_pm_dsp_set_min_opp(u8 opp_id);
229
230/**
231 * omap_pm_dsp_get_opp - report the current DSP OPP ID
232 *
233 * Report the current OPP for the DSP. Since on OMAP3, the DSP and
234 * MPU share a single voltage domain, the OPP ID returned back may
235 * represent a higher DSP speed than the OPP requested via
236 * omap_pm_dsp_set_min_opp().
237 *
238 * Returns the current VDD1 OPP ID, or 0 upon error.
239 */
240u8 omap_pm_dsp_get_opp(void);
241
242
243/*
244 * CPUFreq-originated constraint
245 *
246 * In the future, this should be handled by custom OPP clocktype
247 * functions.
248 */
249
250/**
251 * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
252 *
253 * Provide a frequency table usable by CPUFreq for the current chip/board.
254 * Returns a pointer to a struct cpufreq_frequency_table array or NULL
255 * upon error.
256 */
257struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
258
259/**
260 * omap_pm_cpu_set_freq - set the current minimum MPU frequency
261 * @f: MPU frequency in Hz
262 *
263 * Set the current minimum CPU frequency. The actual CPU frequency
264 * used could end up higher if the DSP requested a higher OPP.
265 * Intended to be called by plat-omap/cpu_omap.c:omap_target(). No
266 * return value.
267 */
268void omap_pm_cpu_set_freq(unsigned long f);
269
270/**
271 * omap_pm_cpu_get_freq - report the current CPU frequency
272 *
273 * Returns the current MPU frequency, or 0 upon error.
274 */
275unsigned long omap_pm_cpu_get_freq(void);
276
277
278/*
279 * Device context loss tracking
280 */
281
282/**
283 * omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx
284 * @dev: struct device *
285 *
286 * This function returns the number of times that the device @dev has
287 * lost its internal context. This generally occurs on a powerdomain
288 * transition to OFF. Drivers use this as an optimization to avoid restoring
289 * context if the device hasn't lost it. To use, drivers should initially
290 * call this in their context save functions and store the result. Early in
291 * the driver's context restore function, the driver should call this function
292 * again, and compare the result to the stored counter. If they differ, the
293 * driver must restore device context. If the number of context losses
294 * exceeds the maximum positive integer, the function will wrap to 0 and
295 * continue counting. Returns the number of context losses for this device,
296 * or -EINVAL upon error.
297 */
298int omap_pm_get_dev_context_loss_count(struct device *dev);
299
300
301#endif
diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h
index 15dec7f1c7c0..b3ba5ac7b4a4 100644
--- a/arch/arm/plat-omap/include/mach/omap44xx.h
+++ b/arch/arm/plat-omap/include/mach/omap44xx.h
@@ -33,14 +33,14 @@
33#define IRQ_SIR_IRQ 0x0040 33#define IRQ_SIR_IRQ 0x0040
34#define OMAP44XX_GIC_DIST_BASE 0x48241000 34#define OMAP44XX_GIC_DIST_BASE 0x48241000
35#define OMAP44XX_GIC_CPU_BASE 0x48240100 35#define OMAP44XX_GIC_CPU_BASE 0x48240100
36#define OMAP44XX_VA_GIC_CPU_BASE IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) 36#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
37#define OMAP44XX_SCU_BASE 0x48240000 37#define OMAP44XX_SCU_BASE 0x48240000
38#define OMAP44XX_VA_SCU_BASE IO_ADDRESS(OMAP44XX_SCU_BASE) 38#define OMAP44XX_VA_SCU_BASE OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)
39#define OMAP44XX_LOCAL_TWD_BASE 0x48240600 39#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
40#define OMAP44XX_VA_LOCAL_TWD_BASE IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE) 40#define OMAP44XX_VA_LOCAL_TWD_BASE OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
41#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100 41#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100
42#define OMAP44XX_WKUPGEN_BASE 0x48281000 42#define OMAP44XX_WKUPGEN_BASE 0x48281000
43#define OMAP44XX_VA_WKUPGEN_BASE IO_ADDRESS(OMAP44XX_WKUPGEN_BASE) 43#define OMAP44XX_VA_WKUPGEN_BASE OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
44 44
45#endif /* __ASM_ARCH_OMAP44XX_H */ 45#endif /* __ASM_ARCH_OMAP44XX_H */
46 46
diff --git a/arch/arm/plat-omap/include/mach/omap_device.h b/arch/arm/plat-omap/include/mach/omap_device.h
new file mode 100644
index 000000000000..bd0e136db337
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap_device.h
@@ -0,0 +1,141 @@
1/*
2 * omap_device headers
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * Developed in collaboration with (alphabetical order): Benoit
8 * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
9 * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
10 * Woodruff
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * Eventually this type of functionality should either be
17 * a) implemented via arch-specific pointers in platform_device
18 * or
19 * b) implemented as a proper omap_bus/omap_device in Linux, no more
20 * platform_device
21 *
22 * omap_device differs from omap_hwmod in that it includes external
23 * (e.g., board- and system-level) integration details. omap_hwmod
24 * stores hardware data that is invariant for a given OMAP chip.
25 *
26 * To do:
27 * - GPIO integration
28 * - regulator integration
29 *
30 */
31#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
32#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
33
34#include <linux/kernel.h>
35#include <linux/platform_device.h>
36
37#include <mach/omap_hwmod.h>
38
39/* omap_device._state values */
40#define OMAP_DEVICE_STATE_UNKNOWN 0
41#define OMAP_DEVICE_STATE_ENABLED 1
42#define OMAP_DEVICE_STATE_IDLE 2
43#define OMAP_DEVICE_STATE_SHUTDOWN 3
44
45/**
46 * struct omap_device - omap_device wrapper for platform_devices
47 * @pdev: platform_device
48 * @hwmods: (one .. many per omap_device)
49 * @hwmods_cnt: ARRAY_SIZE() of @hwmods
50 * @pm_lats: ptr to an omap_device_pm_latency table
51 * @pm_lats_cnt: ARRAY_SIZE() of what is passed to @pm_lats
52 * @pm_lat_level: array index of the last odpl entry executed - -1 if never
53 * @dev_wakeup_lat: dev wakeup latency in microseconds
54 * @_dev_wakeup_lat_limit: dev wakeup latency limit in usec - set by OMAP PM
55 * @_state: one of OMAP_DEVICE_STATE_* (see above)
56 * @flags: device flags
57 *
58 * Integrates omap_hwmod data into Linux platform_device.
59 *
60 * Field names beginning with underscores are for the internal use of
61 * the omap_device code.
62 *
63 */
64struct omap_device {
65 struct platform_device pdev;
66 struct omap_hwmod **hwmods;
67 struct omap_device_pm_latency *pm_lats;
68 u32 dev_wakeup_lat;
69 u32 _dev_wakeup_lat_limit;
70 u8 pm_lats_cnt;
71 s8 pm_lat_level;
72 u8 hwmods_cnt;
73 u8 _state;
74};
75
76/* Device driver interface (call via platform_data fn ptrs) */
77
78int omap_device_enable(struct platform_device *pdev);
79int omap_device_idle(struct platform_device *pdev);
80int omap_device_shutdown(struct platform_device *pdev);
81
82/* Core code interface */
83
84int omap_device_count_resources(struct omap_device *od);
85int omap_device_fill_resources(struct omap_device *od, struct resource *res);
86
87struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
88 struct omap_hwmod *oh, void *pdata,
89 int pdata_len,
90 struct omap_device_pm_latency *pm_lats,
91 int pm_lats_cnt);
92
93struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
94 struct omap_hwmod **oh, int oh_cnt,
95 void *pdata, int pdata_len,
96 struct omap_device_pm_latency *pm_lats,
97 int pm_lats_cnt);
98
99int omap_device_register(struct omap_device *od);
100
101/* OMAP PM interface */
102int omap_device_align_pm_lat(struct platform_device *pdev,
103 u32 new_wakeup_lat_limit);
104struct powerdomain *omap_device_get_pwrdm(struct omap_device *od);
105
106/* Other */
107
108int omap_device_idle_hwmods(struct omap_device *od);
109int omap_device_enable_hwmods(struct omap_device *od);
110
111int omap_device_disable_clocks(struct omap_device *od);
112int omap_device_enable_clocks(struct omap_device *od);
113
114
115/*
116 * Entries should be kept in latency order ascending
117 *
118 * deact_lat is the maximum number of microseconds required to complete
119 * deactivate_func() at the device's slowest OPP.
120 *
121 * act_lat is the maximum number of microseconds required to complete
122 * activate_func() at the device's slowest OPP.
123 *
124 * This will result in some suboptimal power management decisions at fast
125 * OPPs, but avoids having to recompute all device power management decisions
126 * if the system shifts from a fast OPP to a slow OPP (in order to meet
127 * latency requirements).
128 *
129 * XXX should deactivate_func/activate_func() take platform_device pointers
130 * rather than omap_device pointers?
131 */
132struct omap_device_pm_latency {
133 u32 deactivate_lat;
134 int (*deactivate_func)(struct omap_device *od);
135 u32 activate_lat;
136 int (*activate_func)(struct omap_device *od);
137};
138
139
140#endif
141
diff --git a/arch/arm/plat-omap/include/mach/omap_hwmod.h b/arch/arm/plat-omap/include/mach/omap_hwmod.h
new file mode 100644
index 000000000000..1f79c20e2929
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap_hwmod.h
@@ -0,0 +1,447 @@
1/*
2 * omap_hwmod macros, structures
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * Created in collaboration with (alphabetical order): Benoit Cousson,
8 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
9 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * These headers and macros are used to define OMAP on-chip module
16 * data and their integration with other OMAP modules and Linux.
17 *
18 * References:
19 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
20 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
21 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
22 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
23 * - Open Core Protocol Specification 2.2
24 *
25 * To do:
26 * - add interconnect error log structures
27 * - add pinmuxing
28 * - init_conn_id_bit (CONNID_BIT_VECTOR)
29 * - implement default hwmod SMS/SDRC flags?
30 *
31 */
32#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
33#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
34
35#include <linux/kernel.h>
36#include <linux/ioport.h>
37
38#include <mach/cpu.h>
39
40struct omap_device;
41
42/* OCP SYSCONFIG bit shifts/masks */
43#define SYSC_MIDLEMODE_SHIFT 12
44#define SYSC_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
45#define SYSC_CLOCKACTIVITY_SHIFT 8
46#define SYSC_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
47#define SYSC_SIDLEMODE_SHIFT 3
48#define SYSC_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
49#define SYSC_ENAWAKEUP_SHIFT 2
50#define SYSC_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
51#define SYSC_SOFTRESET_SHIFT 1
52#define SYSC_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
53
54/* OCP SYSSTATUS bit shifts/masks */
55#define SYSS_RESETDONE_SHIFT 0
56#define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
57
58/* Master standby/slave idle mode flags */
59#define HWMOD_IDLEMODE_FORCE (1 << 0)
60#define HWMOD_IDLEMODE_NO (1 << 1)
61#define HWMOD_IDLEMODE_SMART (1 << 2)
62
63
64/**
65 * struct omap_hwmod_dma_info - MPU address space handled by the hwmod
66 * @name: name of the DMA channel (module local name)
67 * @dma_ch: DMA channel ID
68 *
69 * @name should be something short, e.g., "tx" or "rx". It is for use
70 * by platform_get_resource_byname(). It is defined locally to the
71 * hwmod.
72 */
73struct omap_hwmod_dma_info {
74 const char *name;
75 u16 dma_ch;
76};
77
78/**
79 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
80 * @role: "sys", "32k", "tv", etc -- for use in clk_get()
81 * @clkdev_dev_id: opt clock: clkdev dev_id string
82 * @clkdev_con_id: opt clock: clkdev con_id string
83 * @_clk: pointer to the struct clk (filled in at runtime)
84 *
85 * The module's interface clock and main functional clock should not
86 * be added as optional clocks.
87 */
88struct omap_hwmod_opt_clk {
89 const char *role;
90 const char *clkdev_dev_id;
91 const char *clkdev_con_id;
92 struct clk *_clk;
93};
94
95
96/* omap_hwmod_omap2_firewall.flags bits */
97#define OMAP_FIREWALL_L3 (1 << 0)
98#define OMAP_FIREWALL_L4 (1 << 1)
99
100/**
101 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
102 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
103 * @l4_fw_region: L4 firewall region ID
104 * @l4_prot_group: L4 protection group ID
105 * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
106 */
107struct omap_hwmod_omap2_firewall {
108 u8 l3_perm_bit;
109 u8 l4_fw_region;
110 u8 l4_prot_group;
111 u8 flags;
112};
113
114
115/*
116 * omap_hwmod_addr_space.flags bits
117 *
118 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
119 * ADDR_TYPE_RT: Address space contains module register target data.
120 */
121#define ADDR_MAP_ON_INIT (1 << 0)
122#define ADDR_TYPE_RT (1 << 1)
123
124/**
125 * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
126 * @pa_start: starting physical address
127 * @pa_end: ending physical address
128 * @flags: (see omap_hwmod_addr_space.flags macros above)
129 *
130 * Address space doesn't necessarily follow physical interconnect
131 * structure. GPMC is one example.
132 */
133struct omap_hwmod_addr_space {
134 u32 pa_start;
135 u32 pa_end;
136 u8 flags;
137};
138
139
140/*
141 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
142 * interface to interact with the hwmod. Used to add sleep dependencies
143 * when the module is enabled or disabled.
144 */
145#define OCP_USER_MPU (1 << 0)
146#define OCP_USER_SDMA (1 << 1)
147
148/* omap_hwmod_ocp_if.flags bits */
149#define OCPIF_HAS_IDLEST (1 << 0)
150#define OCPIF_SWSUP_IDLE (1 << 1)
151#define OCPIF_CAN_BURST (1 << 2)
152
153/**
154 * struct omap_hwmod_ocp_if - OCP interface data
155 * @master: struct omap_hwmod that initiates OCP transactions on this link
156 * @slave: struct omap_hwmod that responds to OCP transactions on this link
157 * @addr: address space associated with this link
158 * @clkdev_dev_id: interface clock: clkdev dev_id string
159 * @clkdev_con_id: interface clock: clkdev con_id string
160 * @_clk: pointer to the interface struct clk (filled in at runtime)
161 * @fw: interface firewall data
162 * @addr_cnt: ARRAY_SIZE(@addr)
163 * @width: OCP data width
164 * @thread_cnt: number of threads
165 * @max_burst_len: maximum burst length in @width sized words (0 if unlimited)
166 * @user: initiators using this interface (see OCP_USER_* macros above)
167 * @flags: OCP interface flags (see OCPIF_* macros above)
168 *
169 * It may also be useful to add a tag_cnt field for OCP2.x devices.
170 *
171 * Parameter names beginning with an underscore are managed internally by
172 * the omap_hwmod code and should not be set during initialization.
173 */
174struct omap_hwmod_ocp_if {
175 struct omap_hwmod *master;
176 struct omap_hwmod *slave;
177 struct omap_hwmod_addr_space *addr;
178 const char *clkdev_dev_id;
179 const char *clkdev_con_id;
180 struct clk *_clk;
181 union {
182 struct omap_hwmod_omap2_firewall omap2;
183 } fw;
184 u8 addr_cnt;
185 u8 width;
186 u8 thread_cnt;
187 u8 max_burst_len;
188 u8 user;
189 u8 flags;
190};
191
192
193/* Macros for use in struct omap_hwmod_sysconfig */
194
195/* Flags for use in omap_hwmod_sysconfig.idlemodes */
196#define MASTER_STANDBY_SHIFT 2
197#define SLAVE_IDLE_SHIFT 0
198#define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
199#define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
200#define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
201#define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
202#define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
203#define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
204
205/* omap_hwmod_sysconfig.sysc_flags capability flags */
206#define SYSC_HAS_AUTOIDLE (1 << 0)
207#define SYSC_HAS_SOFTRESET (1 << 1)
208#define SYSC_HAS_ENAWAKEUP (1 << 2)
209#define SYSC_HAS_EMUFREE (1 << 3)
210#define SYSC_HAS_CLOCKACTIVITY (1 << 4)
211#define SYSC_HAS_SIDLEMODE (1 << 5)
212#define SYSC_HAS_MIDLEMODE (1 << 6)
213#define SYSS_MISSING (1 << 7)
214
215/* omap_hwmod_sysconfig.clockact flags */
216#define CLOCKACT_TEST_BOTH 0x0
217#define CLOCKACT_TEST_MAIN 0x1
218#define CLOCKACT_TEST_ICLK 0x2
219#define CLOCKACT_TEST_NONE 0x3
220
221/**
222 * struct omap_hwmod_sysconfig - hwmod OCP_SYSCONFIG/OCP_SYSSTATUS data
223 * @rev_offs: IP block revision register offset (from module base addr)
224 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
225 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
226 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
227 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
228 * @clockact: the default value of the module CLOCKACTIVITY bits
229 *
230 * @clockact describes to the module which clocks are likely to be
231 * disabled when the PRCM issues its idle request to the module. Some
232 * modules have separate clockdomains for the interface clock and main
233 * functional clock, and can check whether they should acknowledge the
234 * idle request based on the internal module functionality that has
235 * been associated with the clocks marked in @clockact. This field is
236 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
237 *
238 */
239struct omap_hwmod_sysconfig {
240 u16 rev_offs;
241 u16 sysc_offs;
242 u16 syss_offs;
243 u8 idlemodes;
244 u8 sysc_flags;
245 u8 clockact;
246};
247
248/**
249 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
250 * @module_offs: PRCM submodule offset from the start of the PRM/CM
251 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
252 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
253 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
254 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
255 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
256 *
257 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
258 * WKEN, GRPSEL registers. In an ideal world, no extra information
259 * would be needed for IDLEST information, but alas, there are some
260 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
261 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
262 */
263struct omap_hwmod_omap2_prcm {
264 s16 module_offs;
265 u8 prcm_reg_id;
266 u8 module_bit;
267 u8 idlest_reg_id;
268 u8 idlest_idle_bit;
269 u8 idlest_stdby_bit;
270};
271
272
273/**
274 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
275 * @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2
276 * @device_offs: device register offset from @module_offs
277 * @submodule_wkdep_bit: bit shift of the WKDEP range
278 */
279struct omap_hwmod_omap4_prcm {
280 u32 module_offs;
281 u16 device_offs;
282 u8 submodule_wkdep_bit;
283};
284
285
286/*
287 * omap_hwmod.flags definitions
288 *
289 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
290 * of idle, rather than relying on module smart-idle
291 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
292 * of standby, rather than relying on module smart-standby
293 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
294 * SDRAM controller, etc.
295 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
296 * controller, etc.
297 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
298 */
299#define HWMOD_SWSUP_SIDLE (1 << 0)
300#define HWMOD_SWSUP_MSTANDBY (1 << 1)
301#define HWMOD_INIT_NO_RESET (1 << 2)
302#define HWMOD_INIT_NO_IDLE (1 << 3)
303#define HWMOD_SET_DEFAULT_CLOCKACT (1 << 4)
304
305/*
306 * omap_hwmod._int_flags definitions
307 * These are for internal use only and are managed by the omap_hwmod code.
308 *
309 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
310 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
311 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
312 */
313#define _HWMOD_NO_MPU_PORT (1 << 0)
314#define _HWMOD_WAKEUP_ENABLED (1 << 1)
315#define _HWMOD_SYSCONFIG_LOADED (1 << 2)
316
317/*
318 * omap_hwmod._state definitions
319 *
320 * INITIALIZED: reset (optionally), initialized, enabled, disabled
321 * (optionally)
322 *
323 *
324 */
325#define _HWMOD_STATE_UNKNOWN 0
326#define _HWMOD_STATE_REGISTERED 1
327#define _HWMOD_STATE_CLKS_INITED 2
328#define _HWMOD_STATE_INITIALIZED 3
329#define _HWMOD_STATE_ENABLED 4
330#define _HWMOD_STATE_IDLE 5
331#define _HWMOD_STATE_DISABLED 6
332
333/**
334 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
335 * @name: name of the hwmod
336 * @od: struct omap_device currently associated with this hwmod (internal use)
337 * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
338 * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
339 * @prcm: PRCM data pertaining to this hwmod
340 * @clkdev_dev_id: main clock: clkdev dev_id string
341 * @clkdev_con_id: main clock: clkdev con_id string
342 * @_clk: pointer to the main struct clk (filled in at runtime)
343 * @opt_clks: other device clocks that drivers can request (0..*)
344 * @masters: ptr to array of OCP ifs that this hwmod can initiate on
345 * @slaves: ptr to array of OCP ifs that this hwmod can respond on
346 * @sysconfig: device SYSCONFIG/SYSSTATUS register data
347 * @dev_attr: arbitrary device attributes that can be passed to the driver
348 * @_sysc_cache: internal-use hwmod flags
349 * @_rt_va: cached register target start address (internal use)
350 * @_mpu_port_index: cached MPU register target slave ID (internal use)
351 * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
352 * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
353 * @mpu_irqs_cnt: number of @mpu_irqs
354 * @sdma_chs_cnt: number of @sdma_chs
355 * @opt_clks_cnt: number of @opt_clks
356 * @master_cnt: number of @master entries
357 * @slaves_cnt: number of @slave entries
358 * @response_lat: device OCP response latency (in interface clock cycles)
359 * @_int_flags: internal-use hwmod flags
360 * @_state: internal-use hwmod state
361 * @flags: hwmod flags (documented below)
362 * @omap_chip: OMAP chips this hwmod is present on
363 * @node: list node for hwmod list (internal use)
364 *
365 * @clkdev_dev_id, @clkdev_con_id, and @clk all refer to this module's "main
366 * clock," which for our purposes is defined as "the functional clock needed
367 * for register accesses to complete." Modules may not have a main clock if
368 * the interface clock also serves as a main clock.
369 *
370 * Parameter names beginning with an underscore are managed internally by
371 * the omap_hwmod code and should not be set during initialization.
372 */
373struct omap_hwmod {
374 const char *name;
375 struct omap_device *od;
376 u8 *mpu_irqs;
377 struct omap_hwmod_dma_info *sdma_chs;
378 union {
379 struct omap_hwmod_omap2_prcm omap2;
380 struct omap_hwmod_omap4_prcm omap4;
381 } prcm;
382 const char *clkdev_dev_id;
383 const char *clkdev_con_id;
384 struct clk *_clk;
385 struct omap_hwmod_opt_clk *opt_clks;
386 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
387 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
388 struct omap_hwmod_sysconfig *sysconfig;
389 void *dev_attr;
390 u32 _sysc_cache;
391 void __iomem *_rt_va;
392 struct list_head node;
393 u16 flags;
394 u8 _mpu_port_index;
395 u8 msuspendmux_reg_id;
396 u8 msuspendmux_shift;
397 u8 response_lat;
398 u8 mpu_irqs_cnt;
399 u8 sdma_chs_cnt;
400 u8 opt_clks_cnt;
401 u8 masters_cnt;
402 u8 slaves_cnt;
403 u8 hwmods_cnt;
404 u8 _int_flags;
405 u8 _state;
406 const struct omap_chip_id omap_chip;
407};
408
409int omap_hwmod_init(struct omap_hwmod **ohs);
410int omap_hwmod_register(struct omap_hwmod *oh);
411int omap_hwmod_unregister(struct omap_hwmod *oh);
412struct omap_hwmod *omap_hwmod_lookup(const char *name);
413int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh));
414int omap_hwmod_late_init(void);
415
416int omap_hwmod_enable(struct omap_hwmod *oh);
417int omap_hwmod_idle(struct omap_hwmod *oh);
418int omap_hwmod_shutdown(struct omap_hwmod *oh);
419
420int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
421int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
422
423int omap_hwmod_reset(struct omap_hwmod *oh);
424void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
425
426void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs);
427u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs);
428
429int omap_hwmod_count_resources(struct omap_hwmod *oh);
430int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
431
432struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
433
434int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
435 struct omap_hwmod *init_oh);
436int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
437 struct omap_hwmod *init_oh);
438
439int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
440int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
441int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
442int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
443
444int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
445int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
446
447#endif
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h
index 69c9e675d8ee..6271d8556a40 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -117,6 +117,13 @@ struct powerdomain {
117 117
118 struct list_head node; 118 struct list_head node;
119 119
120 int state;
121 unsigned state_counter[4];
122
123#ifdef CONFIG_PM_DEBUG
124 s64 timer;
125 s64 state_timer[4];
126#endif
120}; 127};
121 128
122 129
@@ -126,7 +133,8 @@ int pwrdm_register(struct powerdomain *pwrdm);
126int pwrdm_unregister(struct powerdomain *pwrdm); 133int pwrdm_unregister(struct powerdomain *pwrdm);
127struct powerdomain *pwrdm_lookup(const char *name); 134struct powerdomain *pwrdm_lookup(const char *name);
128 135
129int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)); 136int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
137 void *user);
130 138
131int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); 139int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
132int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); 140int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
@@ -164,4 +172,9 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
164 172
165int pwrdm_wait_transition(struct powerdomain *pwrdm); 173int pwrdm_wait_transition(struct powerdomain *pwrdm);
166 174
175int pwrdm_state_switch(struct powerdomain *pwrdm);
176int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
177int pwrdm_pre_transition(void);
178int pwrdm_post_transition(void);
179
167#endif 180#endif
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 0be18e4ff182..1c09c78a48f2 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -21,19 +21,28 @@
21/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ 21/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
22 22
23#define SDRC_SYSCONFIG 0x010 23#define SDRC_SYSCONFIG 0x010
24#define SDRC_CS_CFG 0x040
25#define SDRC_SHARING 0x044
26#define SDRC_ERR_TYPE 0x04C
24#define SDRC_DLLA_CTRL 0x060 27#define SDRC_DLLA_CTRL 0x060
25#define SDRC_DLLA_STATUS 0x064 28#define SDRC_DLLA_STATUS 0x064
26#define SDRC_DLLB_CTRL 0x068 29#define SDRC_DLLB_CTRL 0x068
27#define SDRC_DLLB_STATUS 0x06C 30#define SDRC_DLLB_STATUS 0x06C
28#define SDRC_POWER 0x070 31#define SDRC_POWER 0x070
32#define SDRC_MCFG_0 0x080
29#define SDRC_MR_0 0x084 33#define SDRC_MR_0 0x084
34#define SDRC_EMR2_0 0x08c
30#define SDRC_ACTIM_CTRL_A_0 0x09c 35#define SDRC_ACTIM_CTRL_A_0 0x09c
31#define SDRC_ACTIM_CTRL_B_0 0x0a0 36#define SDRC_ACTIM_CTRL_B_0 0x0a0
32#define SDRC_RFR_CTRL_0 0x0a4 37#define SDRC_RFR_CTRL_0 0x0a4
38#define SDRC_MANUAL_0 0x0a8
39#define SDRC_MCFG_1 0x0B0
33#define SDRC_MR_1 0x0B4 40#define SDRC_MR_1 0x0B4
41#define SDRC_EMR2_1 0x0BC
34#define SDRC_ACTIM_CTRL_A_1 0x0C4 42#define SDRC_ACTIM_CTRL_A_1 0x0C4
35#define SDRC_ACTIM_CTRL_B_1 0x0C8 43#define SDRC_ACTIM_CTRL_B_1 0x0C8
36#define SDRC_RFR_CTRL_1 0x0D4 44#define SDRC_RFR_CTRL_1 0x0D4
45#define SDRC_MANUAL_1 0x0D8
37 46
38/* 47/*
39 * These values represent the number of memory clock cycles between 48 * These values represent the number of memory clock cycles between
@@ -71,11 +80,11 @@
71 */ 80 */
72 81
73#define OMAP242X_SMS_REGADDR(reg) \ 82#define OMAP242X_SMS_REGADDR(reg) \
74 (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) 83 (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
75#define OMAP243X_SMS_REGADDR(reg) \ 84#define OMAP243X_SMS_REGADDR(reg) \
76 (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) 85 (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
77#define OMAP343X_SMS_REGADDR(reg) \ 86#define OMAP343X_SMS_REGADDR(reg) \
78 (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) 87 (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
79 88
80/* SMS register offsets - read/write with sms_{read,write}_reg() */ 89/* SMS register offsets - read/write with sms_{read,write}_reg() */
81 90
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h
index def0529c75eb..e249186d26e2 100644
--- a/arch/arm/plat-omap/include/mach/serial.h
+++ b/arch/arm/plat-omap/include/mach/serial.h
@@ -13,6 +13,8 @@
13#ifndef __ASM_ARCH_SERIAL_H 13#ifndef __ASM_ARCH_SERIAL_H
14#define __ASM_ARCH_SERIAL_H 14#define __ASM_ARCH_SERIAL_H
15 15
16#include <linux/init.h>
17
16#if defined(CONFIG_ARCH_OMAP1) 18#if defined(CONFIG_ARCH_OMAP1)
17/* OMAP1 serial ports */ 19/* OMAP1 serial ports */
18#define OMAP_UART1_BASE 0xfffb0000 20#define OMAP_UART1_BASE 0xfffb0000
@@ -53,6 +55,7 @@
53 }) 55 })
54 56
55#ifndef __ASSEMBLER__ 57#ifndef __ASSEMBLER__
58extern void __init omap_serial_early_init(void);
56extern void omap_serial_init(void); 59extern void omap_serial_init(void);
57extern int omap_uart_can_sleep(void); 60extern int omap_uart_can_sleep(void);
58extern void omap_uart_check_wakeup(void); 61extern void omap_uart_check_wakeup(void);
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index 9b42d72d96cf..b6defa23e77e 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -30,8 +30,8 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
30{ 30{
31#ifdef CONFIG_ARCH_OMAP1 31#ifdef CONFIG_ARCH_OMAP1
32 if (cpu_class_is_omap1()) { 32 if (cpu_class_is_omap1()) {
33 if (BETWEEN(p, IO_PHYS, IO_SIZE)) 33 if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
34 return XLATE(p, IO_PHYS, IO_VIRT); 34 return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
35 } 35 }
36 if (cpu_is_omap730()) { 36 if (cpu_is_omap730()) {
37 if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE)) 37 if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE))
@@ -132,3 +132,61 @@ void omap_iounmap(volatile void __iomem *addr)
132 __iounmap(addr); 132 __iounmap(addr);
133} 133}
134EXPORT_SYMBOL(omap_iounmap); 134EXPORT_SYMBOL(omap_iounmap);
135
136/*
137 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
138 */
139
140u8 omap_readb(u32 pa)
141{
142 if (cpu_class_is_omap1())
143 return __raw_readb(OMAP1_IO_ADDRESS(pa));
144 else
145 return __raw_readb(OMAP2_IO_ADDRESS(pa));
146}
147EXPORT_SYMBOL(omap_readb);
148
149u16 omap_readw(u32 pa)
150{
151 if (cpu_class_is_omap1())
152 return __raw_readw(OMAP1_IO_ADDRESS(pa));
153 else
154 return __raw_readw(OMAP2_IO_ADDRESS(pa));
155}
156EXPORT_SYMBOL(omap_readw);
157
158u32 omap_readl(u32 pa)
159{
160 if (cpu_class_is_omap1())
161 return __raw_readl(OMAP1_IO_ADDRESS(pa));
162 else
163 return __raw_readl(OMAP2_IO_ADDRESS(pa));
164}
165EXPORT_SYMBOL(omap_readl);
166
167void omap_writeb(u8 v, u32 pa)
168{
169 if (cpu_class_is_omap1())
170 __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
171 else
172 __raw_writeb(v, OMAP2_IO_ADDRESS(pa));
173}
174EXPORT_SYMBOL(omap_writeb);
175
176void omap_writew(u16 v, u32 pa)
177{
178 if (cpu_class_is_omap1())
179 __raw_writew(v, OMAP1_IO_ADDRESS(pa));
180 else
181 __raw_writew(v, OMAP2_IO_ADDRESS(pa));
182}
183EXPORT_SYMBOL(omap_writew);
184
185void omap_writel(u32 v, u32 pa)
186{
187 if (cpu_class_is_omap1())
188 __raw_writel(v, OMAP1_IO_ADDRESS(pa));
189 else
190 __raw_writel(v, OMAP2_IO_ADDRESS(pa));
191}
192EXPORT_SYMBOL(omap_writel);
diff --git a/arch/arm/plat-omap/iommu-debug.c b/arch/arm/plat-omap/iommu-debug.c
new file mode 100644
index 000000000000..c799b3b0d709
--- /dev/null
+++ b/arch/arm/plat-omap/iommu-debug.c
@@ -0,0 +1,415 @@
1/*
2 * omap iommu: debugfs interface
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/uaccess.h>
17#include <linux/platform_device.h>
18#include <linux/debugfs.h>
19
20#include <mach/iommu.h>
21#include <mach/iovmm.h>
22
23#include "iopgtable.h"
24
25#define MAXCOLUMN 100 /* for short messages */
26
27static DEFINE_MUTEX(iommu_debug_lock);
28
29static struct dentry *iommu_debug_root;
30
31static ssize_t debug_read_ver(struct file *file, char __user *userbuf,
32 size_t count, loff_t *ppos)
33{
34 u32 ver = iommu_arch_version();
35 char buf[MAXCOLUMN], *p = buf;
36
37 p += sprintf(p, "H/W version: %d.%d\n", (ver >> 4) & 0xf , ver & 0xf);
38
39 return simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
40}
41
42static ssize_t debug_read_regs(struct file *file, char __user *userbuf,
43 size_t count, loff_t *ppos)
44{
45 struct iommu *obj = file->private_data;
46 char *p, *buf;
47 ssize_t bytes;
48
49 buf = kmalloc(count, GFP_KERNEL);
50 if (!buf)
51 return -ENOMEM;
52 p = buf;
53
54 mutex_lock(&iommu_debug_lock);
55
56 bytes = iommu_dump_ctx(obj, p, count);
57 bytes = simple_read_from_buffer(userbuf, count, ppos, buf, bytes);
58
59 mutex_unlock(&iommu_debug_lock);
60 kfree(buf);
61
62 return bytes;
63}
64
65static ssize_t debug_read_tlb(struct file *file, char __user *userbuf,
66 size_t count, loff_t *ppos)
67{
68 struct iommu *obj = file->private_data;
69 char *p, *buf;
70 ssize_t bytes, rest;
71
72 buf = kmalloc(count, GFP_KERNEL);
73 if (!buf)
74 return -ENOMEM;
75 p = buf;
76
77 mutex_lock(&iommu_debug_lock);
78
79 p += sprintf(p, "%8s %8s\n", "cam:", "ram:");
80 p += sprintf(p, "-----------------------------------------\n");
81 rest = count - (p - buf);
82 p += dump_tlb_entries(obj, p, rest);
83
84 bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
85
86 mutex_unlock(&iommu_debug_lock);
87 kfree(buf);
88
89 return bytes;
90}
91
92static ssize_t debug_write_pagetable(struct file *file,
93 const char __user *userbuf, size_t count, loff_t *ppos)
94{
95 struct iotlb_entry e;
96 struct cr_regs cr;
97 int err;
98 struct iommu *obj = file->private_data;
99 char buf[MAXCOLUMN], *p = buf;
100
101 count = min(count, sizeof(buf));
102
103 mutex_lock(&iommu_debug_lock);
104 if (copy_from_user(p, userbuf, count)) {
105 mutex_unlock(&iommu_debug_lock);
106 return -EFAULT;
107 }
108
109 sscanf(p, "%x %x", &cr.cam, &cr.ram);
110 if (!cr.cam || !cr.ram) {
111 mutex_unlock(&iommu_debug_lock);
112 return -EINVAL;
113 }
114
115 iotlb_cr_to_e(&cr, &e);
116 err = iopgtable_store_entry(obj, &e);
117 if (err)
118 dev_err(obj->dev, "%s: fail to store cr\n", __func__);
119
120 mutex_unlock(&iommu_debug_lock);
121 return count;
122}
123
124#define dump_ioptable_entry_one(lv, da, val) \
125 ({ \
126 int __err = 0; \
127 ssize_t bytes; \
128 const int maxcol = 22; \
129 const char *str = "%d: %08x %08x\n"; \
130 bytes = snprintf(p, maxcol, str, lv, da, val); \
131 p += bytes; \
132 len -= bytes; \
133 if (len < maxcol) \
134 __err = -ENOMEM; \
135 __err; \
136 })
137
138static ssize_t dump_ioptable(struct iommu *obj, char *buf, ssize_t len)
139{
140 int i;
141 u32 *iopgd;
142 char *p = buf;
143
144 spin_lock(&obj->page_table_lock);
145
146 iopgd = iopgd_offset(obj, 0);
147 for (i = 0; i < PTRS_PER_IOPGD; i++, iopgd++) {
148 int j, err;
149 u32 *iopte;
150 u32 da;
151
152 if (!*iopgd)
153 continue;
154
155 if (!(*iopgd & IOPGD_TABLE)) {
156 da = i << IOPGD_SHIFT;
157
158 err = dump_ioptable_entry_one(1, da, *iopgd);
159 if (err)
160 goto out;
161 continue;
162 }
163
164 iopte = iopte_offset(iopgd, 0);
165
166 for (j = 0; j < PTRS_PER_IOPTE; j++, iopte++) {
167 if (!*iopte)
168 continue;
169
170 da = (i << IOPGD_SHIFT) + (j << IOPTE_SHIFT);
171 err = dump_ioptable_entry_one(2, da, *iopgd);
172 if (err)
173 goto out;
174 }
175 }
176out:
177 spin_unlock(&obj->page_table_lock);
178
179 return p - buf;
180}
181
182static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf,
183 size_t count, loff_t *ppos)
184{
185 struct iommu *obj = file->private_data;
186 char *p, *buf;
187 size_t bytes;
188
189 buf = (char *)__get_free_page(GFP_KERNEL);
190 if (!buf)
191 return -ENOMEM;
192 p = buf;
193
194 p += sprintf(p, "L: %8s %8s\n", "da:", "pa:");
195 p += sprintf(p, "-----------------------------------------\n");
196
197 mutex_lock(&iommu_debug_lock);
198
199 bytes = PAGE_SIZE - (p - buf);
200 p += dump_ioptable(obj, p, bytes);
201
202 bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
203
204 mutex_unlock(&iommu_debug_lock);
205 free_page((unsigned long)buf);
206
207 return bytes;
208}
209
210static ssize_t debug_read_mmap(struct file *file, char __user *userbuf,
211 size_t count, loff_t *ppos)
212{
213 struct iommu *obj = file->private_data;
214 char *p, *buf;
215 struct iovm_struct *tmp;
216 int uninitialized_var(i);
217 ssize_t bytes;
218
219 buf = (char *)__get_free_page(GFP_KERNEL);
220 if (!buf)
221 return -ENOMEM;
222 p = buf;
223
224 p += sprintf(p, "%-3s %-8s %-8s %6s %8s\n",
225 "No", "start", "end", "size", "flags");
226 p += sprintf(p, "-------------------------------------------------\n");
227
228 mutex_lock(&iommu_debug_lock);
229
230 list_for_each_entry(tmp, &obj->mmap, list) {
231 size_t len;
232 const char *str = "%3d %08x-%08x %6x %8x\n";
233 const int maxcol = 39;
234
235 len = tmp->da_end - tmp->da_start;
236 p += snprintf(p, maxcol, str,
237 i, tmp->da_start, tmp->da_end, len, tmp->flags);
238
239 if (PAGE_SIZE - (p - buf) < maxcol)
240 break;
241 i++;
242 }
243
244 bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
245
246 mutex_unlock(&iommu_debug_lock);
247 free_page((unsigned long)buf);
248
249 return bytes;
250}
251
252static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
253 size_t count, loff_t *ppos)
254{
255 struct iommu *obj = file->private_data;
256 char *p, *buf;
257 struct iovm_struct *area;
258 ssize_t bytes;
259
260 count = min_t(ssize_t, count, PAGE_SIZE);
261
262 buf = (char *)__get_free_page(GFP_KERNEL);
263 if (!buf)
264 return -ENOMEM;
265 p = buf;
266
267 mutex_lock(&iommu_debug_lock);
268
269 area = find_iovm_area(obj, (u32)ppos);
270 if (IS_ERR(area)) {
271 bytes = -EINVAL;
272 goto err_out;
273 }
274 memcpy(p, area->va, count);
275 p += count;
276
277 bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
278err_out:
279 mutex_unlock(&iommu_debug_lock);
280 free_page((unsigned long)buf);
281
282 return bytes;
283}
284
285static ssize_t debug_write_mem(struct file *file, const char __user *userbuf,
286 size_t count, loff_t *ppos)
287{
288 struct iommu *obj = file->private_data;
289 struct iovm_struct *area;
290 char *p, *buf;
291
292 count = min_t(size_t, count, PAGE_SIZE);
293
294 buf = (char *)__get_free_page(GFP_KERNEL);
295 if (!buf)
296 return -ENOMEM;
297 p = buf;
298
299 mutex_lock(&iommu_debug_lock);
300
301 if (copy_from_user(p, userbuf, count)) {
302 count = -EFAULT;
303 goto err_out;
304 }
305
306 area = find_iovm_area(obj, (u32)ppos);
307 if (IS_ERR(area)) {
308 count = -EINVAL;
309 goto err_out;
310 }
311 memcpy(area->va, p, count);
312err_out:
313 mutex_unlock(&iommu_debug_lock);
314 free_page((unsigned long)buf);
315
316 return count;
317}
318
319static int debug_open_generic(struct inode *inode, struct file *file)
320{
321 file->private_data = inode->i_private;
322 return 0;
323}
324
325#define DEBUG_FOPS(name) \
326 static const struct file_operations debug_##name##_fops = { \
327 .open = debug_open_generic, \
328 .read = debug_read_##name, \
329 .write = debug_write_##name, \
330 };
331
332#define DEBUG_FOPS_RO(name) \
333 static const struct file_operations debug_##name##_fops = { \
334 .open = debug_open_generic, \
335 .read = debug_read_##name, \
336 };
337
338DEBUG_FOPS_RO(ver);
339DEBUG_FOPS_RO(regs);
340DEBUG_FOPS_RO(tlb);
341DEBUG_FOPS(pagetable);
342DEBUG_FOPS_RO(mmap);
343DEBUG_FOPS(mem);
344
345#define __DEBUG_ADD_FILE(attr, mode) \
346 { \
347 struct dentry *dent; \
348 dent = debugfs_create_file(#attr, mode, parent, \
349 obj, &debug_##attr##_fops); \
350 if (!dent) \
351 return -ENOMEM; \
352 }
353
354#define DEBUG_ADD_FILE(name) __DEBUG_ADD_FILE(name, 600)
355#define DEBUG_ADD_FILE_RO(name) __DEBUG_ADD_FILE(name, 400)
356
357static int iommu_debug_register(struct device *dev, void *data)
358{
359 struct platform_device *pdev = to_platform_device(dev);
360 struct iommu *obj = platform_get_drvdata(pdev);
361 struct dentry *d, *parent;
362
363 if (!obj || !obj->dev)
364 return -EINVAL;
365
366 d = debugfs_create_dir(obj->name, iommu_debug_root);
367 if (!d)
368 return -ENOMEM;
369 parent = d;
370
371 d = debugfs_create_u8("nr_tlb_entries", 400, parent,
372 (u8 *)&obj->nr_tlb_entries);
373 if (!d)
374 return -ENOMEM;
375
376 DEBUG_ADD_FILE_RO(ver);
377 DEBUG_ADD_FILE_RO(regs);
378 DEBUG_ADD_FILE_RO(tlb);
379 DEBUG_ADD_FILE(pagetable);
380 DEBUG_ADD_FILE_RO(mmap);
381 DEBUG_ADD_FILE(mem);
382
383 return 0;
384}
385
386static int __init iommu_debug_init(void)
387{
388 struct dentry *d;
389 int err;
390
391 d = debugfs_create_dir("iommu", NULL);
392 if (!d)
393 return -ENOMEM;
394 iommu_debug_root = d;
395
396 err = foreach_iommu_device(d, iommu_debug_register);
397 if (err)
398 goto err_out;
399 return 0;
400
401err_out:
402 debugfs_remove_recursive(iommu_debug_root);
403 return err;
404}
405module_init(iommu_debug_init)
406
407static void __exit iommu_debugfs_exit(void)
408{
409 debugfs_remove_recursive(iommu_debug_root);
410}
411module_exit(iommu_debugfs_exit)
412
413MODULE_DESCRIPTION("omap iommu: debugfs interface");
414MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
415MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4a0301399013..4b6012707307 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -351,16 +351,14 @@ EXPORT_SYMBOL_GPL(flush_iotlb_all);
351 351
352#if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE) 352#if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
353 353
354ssize_t iommu_dump_ctx(struct iommu *obj, char *buf) 354ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes)
355{ 355{
356 ssize_t bytes;
357
358 if (!obj || !buf) 356 if (!obj || !buf)
359 return -EINVAL; 357 return -EINVAL;
360 358
361 clk_enable(obj->clk); 359 clk_enable(obj->clk);
362 360
363 bytes = arch_iommu->dump_ctx(obj, buf); 361 bytes = arch_iommu->dump_ctx(obj, buf, bytes);
364 362
365 clk_disable(obj->clk); 363 clk_disable(obj->clk);
366 364
@@ -368,7 +366,7 @@ ssize_t iommu_dump_ctx(struct iommu *obj, char *buf)
368} 366}
369EXPORT_SYMBOL_GPL(iommu_dump_ctx); 367EXPORT_SYMBOL_GPL(iommu_dump_ctx);
370 368
371static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs) 369static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs, int num)
372{ 370{
373 int i; 371 int i;
374 struct iotlb_lock saved, l; 372 struct iotlb_lock saved, l;
@@ -379,7 +377,7 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs)
379 iotlb_lock_get(obj, &saved); 377 iotlb_lock_get(obj, &saved);
380 memcpy(&l, &saved, sizeof(saved)); 378 memcpy(&l, &saved, sizeof(saved));
381 379
382 for (i = 0; i < obj->nr_tlb_entries; i++) { 380 for (i = 0; i < num; i++) {
383 struct cr_regs tmp; 381 struct cr_regs tmp;
384 382
385 iotlb_lock_get(obj, &l); 383 iotlb_lock_get(obj, &l);
@@ -402,18 +400,21 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs)
402 * @obj: target iommu 400 * @obj: target iommu
403 * @buf: output buffer 401 * @buf: output buffer
404 **/ 402 **/
405size_t dump_tlb_entries(struct iommu *obj, char *buf) 403size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t bytes)
406{ 404{
407 int i, n; 405 int i, num;
408 struct cr_regs *cr; 406 struct cr_regs *cr;
409 char *p = buf; 407 char *p = buf;
410 408
411 cr = kcalloc(obj->nr_tlb_entries, sizeof(*cr), GFP_KERNEL); 409 num = bytes / sizeof(*cr);
410 num = min(obj->nr_tlb_entries, num);
411
412 cr = kcalloc(num, sizeof(*cr), GFP_KERNEL);
412 if (!cr) 413 if (!cr)
413 return 0; 414 return 0;
414 415
415 n = __dump_tlb_entries(obj, cr); 416 num = __dump_tlb_entries(obj, cr, num);
416 for (i = 0; i < n; i++) 417 for (i = 0; i < num; i++)
417 p += iotlb_dump_cr(obj, cr + i, p); 418 p += iotlb_dump_cr(obj, cr + i, p);
418 kfree(cr); 419 kfree(cr);
419 420
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index 2fce2c151a95..6fc52fcbdc03 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -199,7 +199,7 @@ static void *vmap_sg(const struct sg_table *sgt)
199 va += bytes; 199 va += bytes;
200 } 200 }
201 201
202 flush_cache_vmap(new->addr, total); 202 flush_cache_vmap(new->addr, new->addr + total);
203 return new->addr; 203 return new->addr;
204 204
205err_out: 205err_out:
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
new file mode 100644
index 000000000000..e98f0a2a6c26
--- /dev/null
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -0,0 +1,296 @@
1/*
2 * omap-pm-noop.c - OMAP power management interface - dummy version
3 *
4 * This code implements the OMAP power management interface to
5 * drivers, CPUIdle, CPUFreq, and DSP Bridge. It is strictly for
6 * debug/demonstration use, as it does nothing but printk() whenever a
7 * function is called (when DEBUG is defined, below)
8 *
9 * Copyright (C) 2008-2009 Texas Instruments, Inc.
10 * Copyright (C) 2008-2009 Nokia Corporation
11 * Paul Walmsley
12 *
13 * Interface developed by (in alphabetical order):
14 * Karthik Dasu, Tony Lindgren, Rajendra Nayak, Sakari Poussa, Veeramanikandan
15 * Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, Richard Woodruff
16 */
17
18#undef DEBUG
19
20#include <linux/init.h>
21#include <linux/cpufreq.h>
22#include <linux/device.h>
23
24/* Interface documentation is in mach/omap-pm.h */
25#include <mach/omap-pm.h>
26
27#include <mach/powerdomain.h>
28
29struct omap_opp *dsp_opps;
30struct omap_opp *mpu_opps;
31struct omap_opp *l3_opps;
32
33/*
34 * Device-driver-originated constraints (via board-*.c files)
35 */
36
37void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t)
38{
39 if (!dev || t < -1) {
40 WARN_ON(1);
41 return;
42 };
43
44 if (t == -1)
45 pr_debug("OMAP PM: remove max MPU wakeup latency constraint: "
46 "dev %s\n", dev_name(dev));
47 else
48 pr_debug("OMAP PM: add max MPU wakeup latency constraint: "
49 "dev %s, t = %ld usec\n", dev_name(dev), t);
50
51 /*
52 * For current Linux, this needs to map the MPU to a
53 * powerdomain, then go through the list of current max lat
54 * constraints on the MPU and find the smallest. If
55 * the latency constraint has changed, the code should
56 * recompute the state to enter for the next powerdomain
57 * state.
58 *
59 * TI CDP code can call constraint_set here.
60 */
61}
62
63void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r)
64{
65 if (!dev || (agent_id != OCP_INITIATOR_AGENT &&
66 agent_id != OCP_TARGET_AGENT)) {
67 WARN_ON(1);
68 return;
69 };
70
71 if (r == 0)
72 pr_debug("OMAP PM: remove min bus tput constraint: "
73 "dev %s for agent_id %d\n", dev_name(dev), agent_id);
74 else
75 pr_debug("OMAP PM: add min bus tput constraint: "
76 "dev %s for agent_id %d: rate %ld KiB\n",
77 dev_name(dev), agent_id, r);
78
79 /*
80 * This code should model the interconnect and compute the
81 * required clock frequency, convert that to a VDD2 OPP ID, then
82 * set the VDD2 OPP appropriately.
83 *
84 * TI CDP code can call constraint_set here on the VDD2 OPP.
85 */
86}
87
88void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t)
89{
90 if (!dev || t < -1) {
91 WARN_ON(1);
92 return;
93 };
94
95 if (t == -1)
96 pr_debug("OMAP PM: remove max device latency constraint: "
97 "dev %s\n", dev_name(dev));
98 else
99 pr_debug("OMAP PM: add max device latency constraint: "
100 "dev %s, t = %ld usec\n", dev_name(dev), t);
101
102 /*
103 * For current Linux, this needs to map the device to a
104 * powerdomain, then go through the list of current max lat
105 * constraints on that powerdomain and find the smallest. If
106 * the latency constraint has changed, the code should
107 * recompute the state to enter for the next powerdomain
108 * state. Conceivably, this code should also determine
109 * whether to actually disable the device clocks or not,
110 * depending on how long it takes to re-enable the clocks.
111 *
112 * TI CDP code can call constraint_set here.
113 */
114}
115
116void omap_pm_set_max_sdma_lat(struct device *dev, long t)
117{
118 if (!dev || t < -1) {
119 WARN_ON(1);
120 return;
121 };
122
123 if (t == -1)
124 pr_debug("OMAP PM: remove max DMA latency constraint: "
125 "dev %s\n", dev_name(dev));
126 else
127 pr_debug("OMAP PM: add max DMA latency constraint: "
128 "dev %s, t = %ld usec\n", dev_name(dev), t);
129
130 /*
131 * For current Linux PM QOS params, this code should scan the
132 * list of maximum CPU and DMA latencies and select the
133 * smallest, then set cpu_dma_latency pm_qos_param
134 * accordingly.
135 *
136 * For future Linux PM QOS params, with separate CPU and DMA
137 * latency params, this code should just set the dma_latency param.
138 *
139 * TI CDP code can call constraint_set here.
140 */
141
142}
143
144
145/*
146 * DSP Bridge-specific constraints
147 */
148
149const struct omap_opp *omap_pm_dsp_get_opp_table(void)
150{
151 pr_debug("OMAP PM: DSP request for OPP table\n");
152
153 /*
154 * Return DSP frequency table here: The final item in the
155 * array should have .rate = .opp_id = 0.
156 */
157
158 return NULL;
159}
160
161void omap_pm_dsp_set_min_opp(u8 opp_id)
162{
163 if (opp_id == 0) {
164 WARN_ON(1);
165 return;
166 }
167
168 pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id);
169
170 /*
171 *
172 * For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we
173 * can just test to see which is higher, the CPU's desired OPP
174 * ID or the DSP's desired OPP ID, and use whichever is
175 * highest.
176 *
177 * In CDP12.14+, the VDD1 OPP custom clock that controls the DSP
178 * rate is keyed on MPU speed, not the OPP ID. So we need to
179 * map the OPP ID to the MPU speed for use with clk_set_rate()
180 * if it is higher than the current OPP clock rate.
181 *
182 */
183}
184
185
186u8 omap_pm_dsp_get_opp(void)
187{
188 pr_debug("OMAP PM: DSP requests current DSP OPP ID\n");
189
190 /*
191 * For l-o dev tree, call clk_get_rate() on VDD1 OPP clock
192 *
193 * CDP12.14+:
194 * Call clk_get_rate() on the OPP custom clock, map that to an
195 * OPP ID using the tables defined in board-*.c/chip-*.c files.
196 */
197
198 return 0;
199}
200
201/*
202 * CPUFreq-originated constraint
203 *
204 * In the future, this should be handled by custom OPP clocktype
205 * functions.
206 */
207
208struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void)
209{
210 pr_debug("OMAP PM: CPUFreq request for frequency table\n");
211
212 /*
213 * Return CPUFreq frequency table here: loop over
214 * all VDD1 clkrates, pull out the mpu_ck frequencies, build
215 * table
216 */
217
218 return NULL;
219}
220
221void omap_pm_cpu_set_freq(unsigned long f)
222{
223 if (f == 0) {
224 WARN_ON(1);
225 return;
226 }
227
228 pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n",
229 f);
230
231 /*
232 * For l-o dev tree, determine whether MPU freq or DSP OPP id
233 * freq is higher. Find the OPP ID corresponding to the
234 * higher frequency. Call clk_round_rate() and clk_set_rate()
235 * on the OPP custom clock.
236 *
237 * CDP should just be able to set the VDD1 OPP clock rate here.
238 */
239}
240
241unsigned long omap_pm_cpu_get_freq(void)
242{
243 pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n");
244
245 /*
246 * Call clk_get_rate() on the mpu_ck.
247 */
248
249 return 0;
250}
251
252/*
253 * Device context loss tracking
254 */
255
256int omap_pm_get_dev_context_loss_count(struct device *dev)
257{
258 if (!dev) {
259 WARN_ON(1);
260 return -EINVAL;
261 };
262
263 pr_debug("OMAP PM: returning context loss count for dev %s\n",
264 dev_name(dev));
265
266 /*
267 * Map the device to the powerdomain. Return the powerdomain
268 * off counter.
269 */
270
271 return 0;
272}
273
274
275/* Should be called before clk framework init */
276int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
277 struct omap_opp *dsp_opp_table,
278 struct omap_opp *l3_opp_table)
279{
280 mpu_opps = mpu_opp_table;
281 dsp_opps = dsp_opp_table;
282 l3_opps = l3_opp_table;
283 return 0;
284}
285
286/* Must be called after clock framework is initialized */
287int __init omap_pm_if_init(void)
288{
289 return 0;
290}
291
292void omap_pm_if_exit(void)
293{
294 /* Deallocate CPUFreq frequency table here */
295}
296
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
new file mode 100644
index 000000000000..2c409fc6dd21
--- /dev/null
+++ b/arch/arm/plat-omap/omap_device.c
@@ -0,0 +1,687 @@
1/*
2 * omap_device implementation
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * Developed in collaboration with (alphabetical order): Benoit
8 * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
9 * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
10 * Woodruff
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This code provides a consistent interface for OMAP device drivers
17 * to control power management and interconnect properties of their
18 * devices.
19 *
20 * In the medium- to long-term, this code should either be
21 * a) implemented via arch-specific pointers in platform_data
22 * or
23 * b) implemented as a proper omap_bus/omap_device in Linux, no more
24 * platform_data func pointers
25 *
26 *
27 * Guidelines for usage by driver authors:
28 *
29 * 1. These functions are intended to be used by device drivers via
30 * function pointers in struct platform_data. As an example,
31 * omap_device_enable() should be passed to the driver as
32 *
33 * struct foo_driver_platform_data {
34 * ...
35 * int (*device_enable)(struct platform_device *pdev);
36 * ...
37 * }
38 *
39 * Note that the generic "device_enable" name is used, rather than
40 * "omap_device_enable". This is so other architectures can pass in their
41 * own enable/disable functions here.
42 *
43 * This should be populated during device setup:
44 *
45 * ...
46 * pdata->device_enable = omap_device_enable;
47 * ...
48 *
49 * 2. Drivers should first check to ensure the function pointer is not null
50 * before calling it, as in:
51 *
52 * if (pdata->device_enable)
53 * pdata->device_enable(pdev);
54 *
55 * This allows other architectures that don't use similar device_enable()/
56 * device_shutdown() functions to execute normally.
57 *
58 * ...
59 *
60 * Suggested usage by device drivers:
61 *
62 * During device initialization:
63 * device_enable()
64 *
65 * During device idle:
66 * (save remaining device context if necessary)
67 * device_idle();
68 *
69 * During device resume:
70 * device_enable();
71 * (restore context if necessary)
72 *
73 * During device shutdown:
74 * device_shutdown()
75 * (device must be reinitialized at this point to use it again)
76 *
77 */
78#undef DEBUG
79
80#include <linux/kernel.h>
81#include <linux/platform_device.h>
82#include <linux/err.h>
83#include <linux/io.h>
84
85#include <mach/omap_device.h>
86#include <mach/omap_hwmod.h>
87
88/* These parameters are passed to _omap_device_{de,}activate() */
89#define USE_WAKEUP_LAT 0
90#define IGNORE_WAKEUP_LAT 1
91
92/* XXX this should be moved into a separate file */
93#if defined(CONFIG_ARCH_OMAP2420)
94# define OMAP_32KSYNCT_BASE 0x48004000
95#elif defined(CONFIG_ARCH_OMAP2430)
96# define OMAP_32KSYNCT_BASE 0x49020000
97#elif defined(CONFIG_ARCH_OMAP3430)
98# define OMAP_32KSYNCT_BASE 0x48320000
99#else
100# error Unknown OMAP device
101#endif
102
103/* Private functions */
104
105/**
106 * _read_32ksynct - read the OMAP 32K sync timer
107 *
108 * Returns the current value of the 32KiHz synchronization counter.
109 * XXX this should be generalized to simply read the system clocksource.
110 * XXX this should be moved to a separate synctimer32k.c file
111 */
112static u32 _read_32ksynct(void)
113{
114 if (!cpu_class_is_omap2())
115 BUG();
116
117 return __raw_readl(OMAP2_IO_ADDRESS(OMAP_32KSYNCT_BASE + 0x010));
118}
119
120/**
121 * _omap_device_activate - increase device readiness
122 * @od: struct omap_device *
123 * @ignore_lat: increase to latency target (0) or full readiness (1)?
124 *
125 * Increase readiness of omap_device @od (thus decreasing device
126 * wakeup latency, but consuming more power). If @ignore_lat is
127 * IGNORE_WAKEUP_LAT, make the omap_device fully active. Otherwise,
128 * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
129 * latency is greater than the requested maximum wakeup latency, step
130 * backwards in the omap_device_pm_latency table to ensure the
131 * device's maximum wakeup latency is less than or equal to the
132 * requested maximum wakeup latency. Returns 0.
133 */
134static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
135{
136 u32 a, b;
137
138 pr_debug("omap_device: %s: activating\n", od->pdev.name);
139
140 while (od->pm_lat_level > 0) {
141 struct omap_device_pm_latency *odpl;
142 int act_lat = 0;
143
144 od->pm_lat_level--;
145
146 odpl = od->pm_lats + od->pm_lat_level;
147
148 if (!ignore_lat &&
149 (od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit))
150 break;
151
152 a = _read_32ksynct();
153
154 /* XXX check return code */
155 odpl->activate_func(od);
156
157 b = _read_32ksynct();
158
159 act_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
160
161 pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time "
162 "%d usec\n", od->pdev.name, od->pm_lat_level, act_lat);
163
164 WARN(act_lat > odpl->activate_lat, "omap_device: %s.%d: "
165 "activate step %d took longer than expected (%d > %d)\n",
166 od->pdev.name, od->pdev.id, od->pm_lat_level,
167 act_lat, odpl->activate_lat);
168
169 od->dev_wakeup_lat -= odpl->activate_lat;
170 }
171
172 return 0;
173}
174
175/**
176 * _omap_device_deactivate - decrease device readiness
177 * @od: struct omap_device *
178 * @ignore_lat: decrease to latency target (0) or full inactivity (1)?
179 *
180 * Decrease readiness of omap_device @od (thus increasing device
181 * wakeup latency, but conserving power). If @ignore_lat is
182 * IGNORE_WAKEUP_LAT, make the omap_device fully inactive. Otherwise,
183 * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
184 * latency is less than the requested maximum wakeup latency, step
185 * forwards in the omap_device_pm_latency table to ensure the device's
186 * maximum wakeup latency is less than or equal to the requested
187 * maximum wakeup latency. Returns 0.
188 */
189static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
190{
191 u32 a, b;
192
193 pr_debug("omap_device: %s: deactivating\n", od->pdev.name);
194
195 while (od->pm_lat_level < od->pm_lats_cnt) {
196 struct omap_device_pm_latency *odpl;
197 int deact_lat = 0;
198
199 odpl = od->pm_lats + od->pm_lat_level;
200
201 if (!ignore_lat &&
202 ((od->dev_wakeup_lat + odpl->activate_lat) >
203 od->_dev_wakeup_lat_limit))
204 break;
205
206 a = _read_32ksynct();
207
208 /* XXX check return code */
209 odpl->deactivate_func(od);
210
211 b = _read_32ksynct();
212
213 deact_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
214
215 pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time "
216 "%d usec\n", od->pdev.name, od->pm_lat_level,
217 deact_lat);
218
219 WARN(deact_lat > odpl->deactivate_lat, "omap_device: %s.%d: "
220 "deactivate step %d took longer than expected (%d > %d)\n",
221 od->pdev.name, od->pdev.id, od->pm_lat_level,
222 deact_lat, odpl->deactivate_lat);
223
224 od->dev_wakeup_lat += odpl->activate_lat;
225
226 od->pm_lat_level++;
227 }
228
229 return 0;
230}
231
232static inline struct omap_device *_find_by_pdev(struct platform_device *pdev)
233{
234 return container_of(pdev, struct omap_device, pdev);
235}
236
237
238/* Public functions for use by core code */
239
240/**
241 * omap_device_count_resources - count number of struct resource entries needed
242 * @od: struct omap_device *
243 *
244 * Count the number of struct resource entries needed for this
245 * omap_device @od. Used by omap_device_build_ss() to determine how
246 * much memory to allocate before calling
247 * omap_device_fill_resources(). Returns the count.
248 */
249int omap_device_count_resources(struct omap_device *od)
250{
251 struct omap_hwmod *oh;
252 int c = 0;
253 int i;
254
255 for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
256 c += omap_hwmod_count_resources(oh);
257
258 pr_debug("omap_device: %s: counted %d total resources across %d "
259 "hwmods\n", od->pdev.name, c, od->hwmods_cnt);
260
261 return c;
262}
263
264/**
265 * omap_device_fill_resources - fill in array of struct resource
266 * @od: struct omap_device *
267 * @res: pointer to an array of struct resource to be filled in
268 *
269 * Populate one or more empty struct resource pointed to by @res with
270 * the resource data for this omap_device @od. Used by
271 * omap_device_build_ss() after calling omap_device_count_resources().
272 * Ideally this function would not be needed at all. If omap_device
273 * replaces platform_device, then we can specify our own
274 * get_resource()/ get_irq()/etc functions that use the underlying
275 * omap_hwmod information. Or if platform_device is extended to use
276 * subarchitecture-specific function pointers, the various
277 * platform_device functions can simply call omap_device internal
278 * functions to get device resources. Hacking around the existing
279 * platform_device code wastes memory. Returns 0.
280 */
281int omap_device_fill_resources(struct omap_device *od, struct resource *res)
282{
283 struct omap_hwmod *oh;
284 int c = 0;
285 int i, r;
286
287 for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) {
288 r = omap_hwmod_fill_resources(oh, res);
289 res += r;
290 c += r;
291 }
292
293 return 0;
294}
295
296/**
297 * omap_device_build - build and register an omap_device with one omap_hwmod
298 * @pdev_name: name of the platform_device driver to use
299 * @pdev_id: this platform_device's connection ID
300 * @oh: ptr to the single omap_hwmod that backs this omap_device
301 * @pdata: platform_data ptr to associate with the platform_device
302 * @pdata_len: amount of memory pointed to by @pdata
303 * @pm_lats: pointer to a omap_device_pm_latency array for this device
304 * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
305 *
306 * Convenience function for building and registering a single
307 * omap_device record, which in turn builds and registers a
308 * platform_device record. See omap_device_build_ss() for more
309 * information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise,
310 * passes along the return value of omap_device_build_ss().
311 */
312struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
313 struct omap_hwmod *oh, void *pdata,
314 int pdata_len,
315 struct omap_device_pm_latency *pm_lats,
316 int pm_lats_cnt)
317{
318 struct omap_hwmod *ohs[] = { oh };
319
320 if (!oh)
321 return ERR_PTR(-EINVAL);
322
323 return omap_device_build_ss(pdev_name, pdev_id, ohs, 1, pdata,
324 pdata_len, pm_lats, pm_lats_cnt);
325}
326
327/**
328 * omap_device_build_ss - build and register an omap_device with multiple hwmods
329 * @pdev_name: name of the platform_device driver to use
330 * @pdev_id: this platform_device's connection ID
331 * @oh: ptr to the single omap_hwmod that backs this omap_device
332 * @pdata: platform_data ptr to associate with the platform_device
333 * @pdata_len: amount of memory pointed to by @pdata
334 * @pm_lats: pointer to a omap_device_pm_latency array for this device
335 * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
336 *
337 * Convenience function for building and registering an omap_device
338 * subsystem record. Subsystem records consist of multiple
339 * omap_hwmods. This function in turn builds and registers a
340 * platform_device record. Returns an ERR_PTR() on error, or passes
341 * along the return value of omap_device_register().
342 */
343struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
344 struct omap_hwmod **ohs, int oh_cnt,
345 void *pdata, int pdata_len,
346 struct omap_device_pm_latency *pm_lats,
347 int pm_lats_cnt)
348{
349 int ret = -ENOMEM;
350 struct omap_device *od;
351 char *pdev_name2;
352 struct resource *res = NULL;
353 int res_count;
354 struct omap_hwmod **hwmods;
355
356 if (!ohs || oh_cnt == 0 || !pdev_name)
357 return ERR_PTR(-EINVAL);
358
359 if (!pdata && pdata_len > 0)
360 return ERR_PTR(-EINVAL);
361
362 pr_debug("omap_device: %s: building with %d hwmods\n", pdev_name,
363 oh_cnt);
364
365 od = kzalloc(sizeof(struct omap_device), GFP_KERNEL);
366 if (!od)
367 return ERR_PTR(-ENOMEM);
368
369 od->hwmods_cnt = oh_cnt;
370
371 hwmods = kzalloc(sizeof(struct omap_hwmod *) * oh_cnt,
372 GFP_KERNEL);
373 if (!hwmods)
374 goto odbs_exit1;
375
376 memcpy(hwmods, ohs, sizeof(struct omap_hwmod *) * oh_cnt);
377 od->hwmods = hwmods;
378
379 pdev_name2 = kzalloc(strlen(pdev_name) + 1, GFP_KERNEL);
380 if (!pdev_name2)
381 goto odbs_exit2;
382 strcpy(pdev_name2, pdev_name);
383
384 od->pdev.name = pdev_name2;
385 od->pdev.id = pdev_id;
386
387 res_count = omap_device_count_resources(od);
388 if (res_count > 0) {
389 res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL);
390 if (!res)
391 goto odbs_exit3;
392 }
393 omap_device_fill_resources(od, res);
394
395 od->pdev.num_resources = res_count;
396 od->pdev.resource = res;
397
398 platform_device_add_data(&od->pdev, pdata, pdata_len);
399
400 od->pm_lats = pm_lats;
401 od->pm_lats_cnt = pm_lats_cnt;
402
403 ret = omap_device_register(od);
404 if (ret)
405 goto odbs_exit4;
406
407 return od;
408
409odbs_exit4:
410 kfree(res);
411odbs_exit3:
412 kfree(pdev_name2);
413odbs_exit2:
414 kfree(hwmods);
415odbs_exit1:
416 kfree(od);
417
418 pr_err("omap_device: %s: build failed (%d)\n", pdev_name, ret);
419
420 return ERR_PTR(ret);
421}
422
423/**
424 * omap_device_register - register an omap_device with one omap_hwmod
425 * @od: struct omap_device * to register
426 *
427 * Register the omap_device structure. This currently just calls
428 * platform_device_register() on the underlying platform_device.
429 * Returns the return value of platform_device_register().
430 */
431int omap_device_register(struct omap_device *od)
432{
433 pr_debug("omap_device: %s: registering\n", od->pdev.name);
434
435 return platform_device_register(&od->pdev);
436}
437
438
439/* Public functions for use by device drivers through struct platform_data */
440
441/**
442 * omap_device_enable - fully activate an omap_device
443 * @od: struct omap_device * to activate
444 *
445 * Do whatever is necessary for the hwmods underlying omap_device @od
446 * to be accessible and ready to operate. This generally involves
447 * enabling clocks, setting SYSCONFIG registers; and in the future may
448 * involve remuxing pins. Device drivers should call this function
449 * (through platform_data function pointers) where they would normally
450 * enable clocks, etc. Returns -EINVAL if called when the omap_device
451 * is already enabled, or passes along the return value of
452 * _omap_device_activate().
453 */
454int omap_device_enable(struct platform_device *pdev)
455{
456 int ret;
457 struct omap_device *od;
458
459 od = _find_by_pdev(pdev);
460
461 if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
462 WARN(1, "omap_device: %s.%d: omap_device_enable() called from "
463 "invalid state\n", od->pdev.name, od->pdev.id);
464 return -EINVAL;
465 }
466
467 /* Enable everything if we're enabling this device from scratch */
468 if (od->_state == OMAP_DEVICE_STATE_UNKNOWN)
469 od->pm_lat_level = od->pm_lats_cnt;
470
471 ret = _omap_device_activate(od, IGNORE_WAKEUP_LAT);
472
473 od->dev_wakeup_lat = 0;
474 od->_dev_wakeup_lat_limit = INT_MAX;
475 od->_state = OMAP_DEVICE_STATE_ENABLED;
476
477 return ret;
478}
479
480/**
481 * omap_device_idle - idle an omap_device
482 * @od: struct omap_device * to idle
483 *
484 * Idle omap_device @od by calling as many .deactivate_func() entries
485 * in the omap_device's pm_lats table as is possible without exceeding
486 * the device's maximum wakeup latency limit, pm_lat_limit. Device
487 * drivers should call this function (through platform_data function
488 * pointers) where they would normally disable clocks after operations
489 * complete, etc.. Returns -EINVAL if the omap_device is not
490 * currently enabled, or passes along the return value of
491 * _omap_device_deactivate().
492 */
493int omap_device_idle(struct platform_device *pdev)
494{
495 int ret;
496 struct omap_device *od;
497
498 od = _find_by_pdev(pdev);
499
500 if (od->_state != OMAP_DEVICE_STATE_ENABLED) {
501 WARN(1, "omap_device: %s.%d: omap_device_idle() called from "
502 "invalid state\n", od->pdev.name, od->pdev.id);
503 return -EINVAL;
504 }
505
506 ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
507
508 od->_state = OMAP_DEVICE_STATE_IDLE;
509
510 return ret;
511}
512
513/**
514 * omap_device_shutdown - shut down an omap_device
515 * @od: struct omap_device * to shut down
516 *
517 * Shut down omap_device @od by calling all .deactivate_func() entries
518 * in the omap_device's pm_lats table and then shutting down all of
519 * the underlying omap_hwmods. Used when a device is being "removed"
520 * or a device driver is being unloaded. Returns -EINVAL if the
521 * omap_device is not currently enabled or idle, or passes along the
522 * return value of _omap_device_deactivate().
523 */
524int omap_device_shutdown(struct platform_device *pdev)
525{
526 int ret, i;
527 struct omap_device *od;
528 struct omap_hwmod *oh;
529
530 od = _find_by_pdev(pdev);
531
532 if (od->_state != OMAP_DEVICE_STATE_ENABLED &&
533 od->_state != OMAP_DEVICE_STATE_IDLE) {
534 WARN(1, "omap_device: %s.%d: omap_device_shutdown() called "
535 "from invalid state\n", od->pdev.name, od->pdev.id);
536 return -EINVAL;
537 }
538
539 ret = _omap_device_deactivate(od, IGNORE_WAKEUP_LAT);
540
541 for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
542 omap_hwmod_shutdown(oh);
543
544 od->_state = OMAP_DEVICE_STATE_SHUTDOWN;
545
546 return ret;
547}
548
549/**
550 * omap_device_align_pm_lat - activate/deactivate device to match wakeup lat lim
551 * @od: struct omap_device *
552 *
553 * When a device's maximum wakeup latency limit changes, call some of
554 * the .activate_func or .deactivate_func function pointers in the
555 * omap_device's pm_lats array to ensure that the device's maximum
556 * wakeup latency is less than or equal to the new latency limit.
557 * Intended to be called by OMAP PM code whenever a device's maximum
558 * wakeup latency limit changes (e.g., via
559 * omap_pm_set_dev_wakeup_lat()). Returns 0 if nothing needs to be
560 * done (e.g., if the omap_device is not currently idle, or if the
561 * wakeup latency is already current with the new limit) or passes
562 * along the return value of _omap_device_deactivate() or
563 * _omap_device_activate().
564 */
565int omap_device_align_pm_lat(struct platform_device *pdev,
566 u32 new_wakeup_lat_limit)
567{
568 int ret = -EINVAL;
569 struct omap_device *od;
570
571 od = _find_by_pdev(pdev);
572
573 if (new_wakeup_lat_limit == od->dev_wakeup_lat)
574 return 0;
575
576 od->_dev_wakeup_lat_limit = new_wakeup_lat_limit;
577
578 if (od->_state != OMAP_DEVICE_STATE_IDLE)
579 return 0;
580 else if (new_wakeup_lat_limit > od->dev_wakeup_lat)
581 ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
582 else if (new_wakeup_lat_limit < od->dev_wakeup_lat)
583 ret = _omap_device_activate(od, USE_WAKEUP_LAT);
584
585 return ret;
586}
587
588/**
589 * omap_device_get_pwrdm - return the powerdomain * associated with @od
590 * @od: struct omap_device *
591 *
592 * Return the powerdomain associated with the first underlying
593 * omap_hwmod for this omap_device. Intended for use by core OMAP PM
594 * code. Returns NULL on error or a struct powerdomain * upon
595 * success.
596 */
597struct powerdomain *omap_device_get_pwrdm(struct omap_device *od)
598{
599 /*
600 * XXX Assumes that all omap_hwmod powerdomains are identical.
601 * This may not necessarily be true. There should be a sanity
602 * check in here to WARN() if any difference appears.
603 */
604 if (!od->hwmods_cnt)
605 return NULL;
606
607 return omap_hwmod_get_pwrdm(od->hwmods[0]);
608}
609
610/*
611 * Public functions intended for use in omap_device_pm_latency
612 * .activate_func and .deactivate_func function pointers
613 */
614
615/**
616 * omap_device_enable_hwmods - call omap_hwmod_enable() on all hwmods
617 * @od: struct omap_device *od
618 *
619 * Enable all underlying hwmods. Returns 0.
620 */
621int omap_device_enable_hwmods(struct omap_device *od)
622{
623 struct omap_hwmod *oh;
624 int i;
625
626 for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
627 omap_hwmod_enable(oh);
628
629 /* XXX pass along return value here? */
630 return 0;
631}
632
633/**
634 * omap_device_idle_hwmods - call omap_hwmod_idle() on all hwmods
635 * @od: struct omap_device *od
636 *
637 * Idle all underlying hwmods. Returns 0.
638 */
639int omap_device_idle_hwmods(struct omap_device *od)
640{
641 struct omap_hwmod *oh;
642 int i;
643
644 for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
645 omap_hwmod_idle(oh);
646
647 /* XXX pass along return value here? */
648 return 0;
649}
650
651/**
652 * omap_device_disable_clocks - disable all main and interface clocks
653 * @od: struct omap_device *od
654 *
655 * Disable the main functional clock and interface clock for all of the
656 * omap_hwmods associated with the omap_device. Returns 0.
657 */
658int omap_device_disable_clocks(struct omap_device *od)
659{
660 struct omap_hwmod *oh;
661 int i;
662
663 for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
664 omap_hwmod_disable_clocks(oh);
665
666 /* XXX pass along return value here? */
667 return 0;
668}
669
670/**
671 * omap_device_enable_clocks - enable all main and interface clocks
672 * @od: struct omap_device *od
673 *
674 * Enable the main functional clock and interface clock for all of the
675 * omap_hwmods associated with the omap_device. Returns 0.
676 */
677int omap_device_enable_clocks(struct omap_device *od)
678{
679 struct omap_hwmod *oh;
680 int i;
681
682 for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
683 omap_hwmod_enable_clocks(oh);
684
685 /* XXX pass along return value here? */
686 return 0;
687}
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 5eae7876979c..925f64711c37 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -56,16 +56,16 @@
56#define SRAM_BOOTLOADER_SZ 0x80 56#define SRAM_BOOTLOADER_SZ 0x80
57#endif 57#endif
58 58
59#define OMAP24XX_VA_REQINFOPERM0 IO_ADDRESS(0x68005048) 59#define OMAP24XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68005048)
60#define OMAP24XX_VA_READPERM0 IO_ADDRESS(0x68005050) 60#define OMAP24XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68005050)
61#define OMAP24XX_VA_WRITEPERM0 IO_ADDRESS(0x68005058) 61#define OMAP24XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68005058)
62 62
63#define OMAP34XX_VA_REQINFOPERM0 IO_ADDRESS(0x68012848) 63#define OMAP34XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68012848)
64#define OMAP34XX_VA_READPERM0 IO_ADDRESS(0x68012850) 64#define OMAP34XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68012850)
65#define OMAP34XX_VA_WRITEPERM0 IO_ADDRESS(0x68012858) 65#define OMAP34XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68012858)
66#define OMAP34XX_VA_ADDR_MATCH2 IO_ADDRESS(0x68012880) 66#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_IO_ADDRESS(0x68012880)
67#define OMAP34XX_VA_SMS_RG_ATT0 IO_ADDRESS(0x6C000048) 67#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_IO_ADDRESS(0x6C000048)
68#define OMAP34XX_VA_CONTROL_STAT IO_ADDRESS(0x480022F0) 68#define OMAP34XX_VA_CONTROL_STAT OMAP2_IO_ADDRESS(0x480022F0)
69 69
70#define GP_DEVICE 0x300 70#define GP_DEVICE 0x300
71 71