diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2009-02-06 09:38:22 -0500 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-03-13 05:34:26 -0400 |
commit | 198016e1b12d781ef00aaafbf571775a8e723f54 (patch) | |
tree | d2d45593f7c5e3ce9a703081e78fd5c6b5c29386 /arch/arm | |
parent | c0a5f85523132dc893916d6059370233fac1cb11 (diff) |
[ARM] MXC: add cpu_is_ macros
We had hardcoded cpu_is_ macros for mxc architectures till now. As we
want to run the same kernel on i.MX31 and i.MX35 this patch adds cpu_is_
macros which expand to 0 or 1 if only one architecture is compiled in and
only check for the cpu type if more than one architecture is compiled
in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-mx3/clock.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/cpu.c | 11 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/common.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx21.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx27.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mxc.h | 74 |
7 files changed, 80 insertions, 16 deletions
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c index bc3a3beb9a66..9ab5f8b2bc30 100644 --- a/arch/arm/mach-mx3/clock.c +++ b/arch/arm/mach-mx3/clock.c | |||
@@ -1077,6 +1077,8 @@ int __init mx31_clocks_init(unsigned long fref) | |||
1077 | u32 reg; | 1077 | u32 reg; |
1078 | struct clk **clkp; | 1078 | struct clk **clkp; |
1079 | 1079 | ||
1080 | mxc_set_cpu_type(MXC_CPU_MX31); | ||
1081 | |||
1080 | ckih_rate = fref; | 1082 | ckih_rate = fref; |
1081 | 1083 | ||
1082 | for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) | 1084 | for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) |
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index f204192f9b94..564fd4ebf38a 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile | |||
@@ -3,7 +3,7 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := irq.o clock.o gpio.o time.o devices.o | 6 | obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o |
7 | 7 | ||
8 | obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o | 8 | obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o |
9 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o | 9 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o |
diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c new file mode 100644 index 000000000000..386e0d52cf58 --- /dev/null +++ b/arch/arm/plat-mxc/cpu.c | |||
@@ -0,0 +1,11 @@ | |||
1 | |||
2 | #include <linux/module.h> | ||
3 | |||
4 | unsigned int __mxc_cpu_type; | ||
5 | EXPORT_SYMBOL(__mxc_cpu_type); | ||
6 | |||
7 | void mxc_set_cpu_type(unsigned int type) | ||
8 | { | ||
9 | __mxc_cpu_type = type; | ||
10 | } | ||
11 | |||
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 3051eee99530..f467159cbdce 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -23,5 +23,6 @@ extern int mx27_clocks_init(unsigned long fref); | |||
23 | extern int mx31_clocks_init(unsigned long fref); | 23 | extern int mx31_clocks_init(unsigned long fref); |
24 | extern int mxc_register_gpios(void); | 24 | extern int mxc_register_gpios(void); |
25 | extern int mxc_register_device(struct platform_device *pdev, void *data); | 25 | extern int mxc_register_device(struct platform_device *pdev, void *data); |
26 | extern void mxc_set_cpu_type(unsigned int type); | ||
26 | 27 | ||
27 | #endif | 28 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h index cfdbe051caf6..e8c4cf56c24e 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/plat-mxc/include/mach/mx21.h | |||
@@ -54,9 +54,6 @@ | |||
54 | 54 | ||
55 | #define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */ | 55 | #define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */ |
56 | 56 | ||
57 | /* this is an i.MX21 CPU */ | ||
58 | #define cpu_is_mx21() (1) | ||
59 | |||
60 | /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */ | 57 | /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */ |
61 | #define ARCH_NR_GPIOS (6*32 + 16) | 58 | #define ARCH_NR_GPIOS (6*32 + 16) |
62 | 59 | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index 5f6a8a7bb19c..6e93f2c0b7bb 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h | |||
@@ -120,9 +120,6 @@ extern int mx27_revision(void); | |||
120 | 120 | ||
121 | /* Mandatory defines used globally */ | 121 | /* Mandatory defines used globally */ |
122 | 122 | ||
123 | /* this is an i.MX27 CPU */ | ||
124 | #define cpu_is_mx27() (1) | ||
125 | |||
126 | /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */ | 123 | /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */ |
127 | #define ARCH_NR_GPIOS (192 + 16) | 124 | #define ARCH_NR_GPIOS (192 + 16) |
128 | 125 | ||
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index d6b0c472cd97..5fa2a07f4eaf 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h | |||
@@ -24,21 +24,74 @@ | |||
24 | #error "Do not include directly." | 24 | #error "Do not include directly." |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | /* clean up all things that are not used */ | 27 | #define MXC_CPU_MX1 1 |
28 | #ifndef CONFIG_ARCH_MX3 | 28 | #define MXC_CPU_MX21 21 |
29 | # define cpu_is_mx31() (0) | 29 | #define MXC_CPU_MX27 27 |
30 | #define MXC_CPU_MX31 31 | ||
31 | #define MXC_CPU_MX35 35 | ||
32 | |||
33 | #ifndef __ASSEMBLY__ | ||
34 | extern unsigned int __mxc_cpu_type; | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_ARCH_MX1 | ||
38 | # ifdef mxc_cpu_type | ||
39 | # undef mxc_cpu_type | ||
40 | # define mxc_cpu_type __mxc_cpu_type | ||
41 | # else | ||
42 | # define mxc_cpu_type MXC_CPU_MX1 | ||
43 | # endif | ||
44 | # define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1) | ||
45 | #else | ||
46 | # define cpu_is_mx1() (0) | ||
30 | #endif | 47 | #endif |
31 | 48 | ||
32 | #ifndef CONFIG_MACH_MX21 | 49 | #ifdef CONFIG_MACH_MX21 |
33 | # define cpu_is_mx21() (0) | 50 | # ifdef mxc_cpu_type |
51 | # undef mxc_cpu_type | ||
52 | # define mxc_cpu_type __mxc_cpu_type | ||
53 | # else | ||
54 | # define mxc_cpu_type MXC_CPU_MX21 | ||
55 | # endif | ||
56 | # define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21) | ||
57 | #else | ||
58 | # define cpu_is_mx21() (0) | ||
34 | #endif | 59 | #endif |
35 | 60 | ||
36 | #ifndef CONFIG_MACH_MX27 | 61 | #ifdef CONFIG_MACH_MX27 |
37 | # define cpu_is_mx27() (0) | 62 | # ifdef mxc_cpu_type |
63 | # undef mxc_cpu_type | ||
64 | # define mxc_cpu_type __mxc_cpu_type | ||
65 | # else | ||
66 | # define mxc_cpu_type MXC_CPU_MX27 | ||
67 | # endif | ||
68 | # define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27) | ||
69 | #else | ||
70 | # define cpu_is_mx27() (0) | ||
38 | #endif | 71 | #endif |
39 | 72 | ||
40 | #ifndef CONFIG_MACH_MX21 | 73 | #ifdef CONFIG_ARCH_MX31 |
41 | # define cpu_is_mx21() (0) | 74 | # ifdef mxc_cpu_type |
75 | # undef mxc_cpu_type | ||
76 | # define mxc_cpu_type __mxc_cpu_type | ||
77 | # else | ||
78 | # define mxc_cpu_type MXC_CPU_MX31 | ||
79 | # endif | ||
80 | # define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31) | ||
81 | #else | ||
82 | # define cpu_is_mx31() (0) | ||
83 | #endif | ||
84 | |||
85 | #ifdef CONFIG_ARCH_MX35 | ||
86 | # ifdef mxc_cpu_type | ||
87 | # undef mxc_cpu_type | ||
88 | # define mxc_cpu_type __mxc_cpu_type | ||
89 | # else | ||
90 | # define mxc_cpu_type MXC_CPU_MX35 | ||
91 | # endif | ||
92 | # define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35) | ||
93 | #else | ||
94 | # define cpu_is_mx35() (0) | ||
42 | #endif | 95 | #endif |
43 | 96 | ||
44 | #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) | 97 | #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) |
@@ -47,4 +100,7 @@ | |||
47 | #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) | 100 | #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) |
48 | #endif | 101 | #endif |
49 | 102 | ||
103 | #define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) | ||
104 | #define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) | ||
105 | |||
50 | #endif /* __ASM_ARCH_MXC_H__ */ | 106 | #endif /* __ASM_ARCH_MXC_H__ */ |