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authorTomasz Nowicki <tomasz.nowicki@linaro.org>2015-03-24 10:02:49 -0400
committerWill Deacon <will.deacon@arm.com>2015-03-26 11:13:07 -0400
commitd60fc3892c4de4a25658786f941690462c5a5bab (patch)
tree79273968cdae4cc73bd97a89e2c646431224e542 /arch/arm64/include
parentfbe61ec71ac975279cd47b6c299d5e33f63aac4e (diff)
irqchip: Add GICv2 specific ACPI boot support
ACPI kernel uses MADT table for proper GIC initialization. It needs to parse GIC related subtables, collect CPU interface and distributor addresses and call driver initialization function (which is hardware abstraction agnostic). In a similar way, FDT initialize GICv1/2. NOTE: This commit allow to initialize GICv1/2 basic functionality. While now simple GICv2 init call is used, any further GIC features require generic infrastructure for proper ACPI irqchip initialization. That mechanism and stacked irqdomains to support GICv2 MSI/virtualization extension, GICv3/4 and its ITS are considered as next steps. CC: Jason Cooper <jason@lakedaemon.net> CC: Marc Zyngier <marc.zyngier@arm.com> CC: Thomas Gleixner <tglx@linutronix.de> Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by: Yijing Wang <wangyijing@huawei.com> Tested-by: Mark Langsdorf <mlangsdo@redhat.com> Tested-by: Jon Masters <jcm@redhat.com> Tested-by: Timur Tabi <timur@codeaurora.org> Tested-by: Robert Richter <rrichter@cavium.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Grant Likely <grant.likely@linaro.org> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include')
-rw-r--r--arch/arm64/include/asm/acpi.h2
-rw-r--r--arch/arm64/include/asm/irq.h13
2 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index eea0bc3b09d5..59c05d8ea4a0 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -13,6 +13,8 @@
13#define _ASM_ACPI_H 13#define _ASM_ACPI_H
14 14
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/irqchip/arm-gic-acpi.h>
17
16#include <asm/cputype.h> 18#include <asm/cputype.h>
17#include <asm/smp_plat.h> 19#include <asm/smp_plat.h>
18 20
diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h
index 94c53674a31d..bbb251b14746 100644
--- a/arch/arm64/include/asm/irq.h
+++ b/arch/arm64/include/asm/irq.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_IRQ_H 1#ifndef __ASM_IRQ_H
2#define __ASM_IRQ_H 2#define __ASM_IRQ_H
3 3
4#include <linux/irqchip/arm-gic-acpi.h>
5
4#include <asm-generic/irq.h> 6#include <asm-generic/irq.h>
5 7
6struct pt_regs; 8struct pt_regs;
@@ -8,4 +10,15 @@ struct pt_regs;
8extern void migrate_irqs(void); 10extern void migrate_irqs(void);
9extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); 11extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
10 12
13static inline void acpi_irq_init(void)
14{
15 /*
16 * Hardcode ACPI IRQ chip initialization to GICv2 for now.
17 * Proper irqchip infrastructure will be implemented along with
18 * incoming GICv2m|GICv3|ITS bits.
19 */
20 acpi_gic_init();
21}
22#define acpi_irq_init acpi_irq_init
23
11#endif 24#endif