irqchip: Add GICv2 specific ACPI boot support

ACPI kernel uses MADT table for proper GIC initialization. It needs to
parse GIC related subtables, collect CPU interface and distributor
addresses and call driver initialization function (which is hardware
abstraction agnostic). In a similar way, FDT initialize GICv1/2.

NOTE: This commit allow to initialize GICv1/2 basic functionality.
While now simple GICv2 init call is used, any further GIC features
require generic infrastructure for proper ACPI irqchip initialization.
That mechanism and stacked irqdomains to support GICv2 MSI/virtualization
extension, GICv3/4 and its ITS are considered as next steps.

CC: Jason Cooper <jason@lakedaemon.net>
CC: Marc Zyngier <marc.zyngier@arm.com>
CC: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Tested-by: Yijing Wang <wangyijing@huawei.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Jon Masters <jcm@redhat.com>
Tested-by: Timur Tabi <timur@codeaurora.org>
Tested-by: Robert Richter <rrichter@cavium.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>

3 files changed, 40 insertions, 0 deletions

diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index eea0bc3b09d5..59c05d8ea4a0 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -13,6 +13,8 @@
 #define _ASM_ACPI_H
 
 #include <linux/mm.h>
+#include <linux/irqchip/arm-gic-acpi.h>
+
 #include <asm/cputype.h>
 #include <asm/smp_plat.h>
 
diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h
index 94c53674a31d..bbb251b14746 100644
--- a/arch/arm64/include/asm/irq.h
+++ b/arch/arm64/include/asm/irq.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_IRQ_H
 #define __ASM_IRQ_H
 
+#include <linux/irqchip/arm-gic-acpi.h>
+
 #include <asm-generic/irq.h>
 
 struct pt_regs;
@@ -8,4 +10,15 @@ struct pt_regs;
 extern void migrate_irqs(void);
 extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
 
+static inline void acpi_irq_init(void)
+{
+        /*
+         * Hardcode ACPI IRQ chip initialization to GICv2 for now.
+         * Proper irqchip infrastructure will be implemented along with
+         * incoming  GICv2m|GICv3|ITS bits.
+         */
+        acpi_gic_init();
+}
+#define acpi_irq_init acpi_irq_init
+
 #endif
diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index dec6f8aed3dc..6468f8898530 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -359,3 +359,28 @@ void __init acpi_boot_table_init(void)
                 pr_err("Can't find FADT\n");
         }
 }
+
+void __init acpi_gic_init(void)
+{
+        struct acpi_table_header *table;
+        acpi_status status;
+        acpi_size tbl_size;
+        int err;
+
+        if (acpi_disabled)
+                return;
+
+        status = acpi_get_table_with_size(ACPI_SIG_MADT, 0, &table, &tbl_size);
+        if (ACPI_FAILURE(status)) {
+                const char *msg = acpi_format_exception(status);
+
+                pr_err("Failed to get MADT table, %s\n", msg);
+                return;
+        }
+
+        err = gic_v2_acpi_init(table);
+        if (err)
+                pr_err("Failed to initialize GIC IRQ controller");
+
+        early_acpi_os_unmap_memory((char *)table, tbl_size);
+}