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authorKukjin Kim <kgene.kim@samsung.com>2011-07-20 13:09:46 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-07-20 13:09:46 -0400
commitcf2e9c7b48f1e6c715e30952e5a3a5ef5cd0f8e4 (patch)
tree8e485f710138a330a56285b2a17d7debadf81c9b /arch/arm/plat-samsung
parentb5930b83c2791bd3b2da120f98f844f96fb2ca50 (diff)
parente48055999575750158108b4cfc7fc22e4c972efc (diff)
Merge branch 'next-samsung-clkdev-fix' into next-samsung-cleanup
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/clock.c98
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h3
-rw-r--r--arch/arm/plat-samsung/pwm-clock.c10
-rw-r--r--arch/arm/plat-samsung/time.c2
4 files changed, 21 insertions, 92 deletions
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 772892826ffc..aecf9e90d4fc 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -71,74 +71,6 @@ static int clk_null_enable(struct clk *clk, int enable)
71 return 0; 71 return 0;
72} 72}
73 73
74static int dev_is_s3c_uart(struct device *dev)
75{
76 struct platform_device **pdev = s3c24xx_uart_devs;
77 int i;
78 for (i = 0; i < ARRAY_SIZE(s3c24xx_uart_devs); i++, pdev++)
79 if (*pdev && dev == &(*pdev)->dev)
80 return 1;
81 return 0;
82}
83
84/*
85 * Serial drivers call get_clock() very early, before platform bus
86 * has been set up, this requires a special check to let them get
87 * a proper clock
88 */
89
90static int dev_is_platform_device(struct device *dev)
91{
92 return dev->bus == &platform_bus_type ||
93 (dev->bus == NULL && dev_is_s3c_uart(dev));
94}
95
96/* Clock API calls */
97
98struct clk *clk_get(struct device *dev, const char *id)
99{
100 struct clk *p;
101 struct clk *clk = ERR_PTR(-ENOENT);
102 int idno;
103
104 if (dev == NULL || !dev_is_platform_device(dev))
105 idno = -1;
106 else
107 idno = to_platform_device(dev)->id;
108
109 spin_lock(&clocks_lock);
110
111 list_for_each_entry(p, &clocks, list) {
112 if (p->id == idno &&
113 strcmp(id, p->name) == 0 &&
114 try_module_get(p->owner)) {
115 clk = p;
116 break;
117 }
118 }
119
120 /* check for the case where a device was supplied, but the
121 * clock that was being searched for is not device specific */
122
123 if (IS_ERR(clk)) {
124 list_for_each_entry(p, &clocks, list) {
125 if (p->id == -1 && strcmp(id, p->name) == 0 &&
126 try_module_get(p->owner)) {
127 clk = p;
128 break;
129 }
130 }
131 }
132
133 spin_unlock(&clocks_lock);
134 return clk;
135}
136
137void clk_put(struct clk *clk)
138{
139 module_put(clk->owner);
140}
141
142int clk_enable(struct clk *clk) 74int clk_enable(struct clk *clk)
143{ 75{
144 if (IS_ERR(clk) || clk == NULL) 76 if (IS_ERR(clk) || clk == NULL)
@@ -241,8 +173,6 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
241 return ret; 173 return ret;
242} 174}
243 175
244EXPORT_SYMBOL(clk_get);
245EXPORT_SYMBOL(clk_put);
246EXPORT_SYMBOL(clk_enable); 176EXPORT_SYMBOL(clk_enable);
247EXPORT_SYMBOL(clk_disable); 177EXPORT_SYMBOL(clk_disable);
248EXPORT_SYMBOL(clk_get_rate); 178EXPORT_SYMBOL(clk_get_rate);
@@ -265,7 +195,6 @@ struct clk_ops clk_ops_def_setrate = {
265 195
266struct clk clk_xtal = { 196struct clk clk_xtal = {
267 .name = "xtal", 197 .name = "xtal",
268 .id = -1,
269 .rate = 0, 198 .rate = 0,
270 .parent = NULL, 199 .parent = NULL,
271 .ctrlbit = 0, 200 .ctrlbit = 0,
@@ -273,30 +202,25 @@ struct clk clk_xtal = {
273 202
274struct clk clk_ext = { 203struct clk clk_ext = {
275 .name = "ext", 204 .name = "ext",
276 .id = -1,
277}; 205};
278 206
279struct clk clk_epll = { 207struct clk clk_epll = {
280 .name = "epll", 208 .name = "epll",
281 .id = -1,
282}; 209};
283 210
284struct clk clk_mpll = { 211struct clk clk_mpll = {
285 .name = "mpll", 212 .name = "mpll",
286 .id = -1,
287 .ops = &clk_ops_def_setrate, 213 .ops = &clk_ops_def_setrate,
288}; 214};
289 215
290struct clk clk_upll = { 216struct clk clk_upll = {
291 .name = "upll", 217 .name = "upll",
292 .id = -1,
293 .parent = NULL, 218 .parent = NULL,
294 .ctrlbit = 0, 219 .ctrlbit = 0,
295}; 220};
296 221
297struct clk clk_f = { 222struct clk clk_f = {
298 .name = "fclk", 223 .name = "fclk",
299 .id = -1,
300 .rate = 0, 224 .rate = 0,
301 .parent = &clk_mpll, 225 .parent = &clk_mpll,
302 .ctrlbit = 0, 226 .ctrlbit = 0,
@@ -304,7 +228,6 @@ struct clk clk_f = {
304 228
305struct clk clk_h = { 229struct clk clk_h = {
306 .name = "hclk", 230 .name = "hclk",
307 .id = -1,
308 .rate = 0, 231 .rate = 0,
309 .parent = NULL, 232 .parent = NULL,
310 .ctrlbit = 0, 233 .ctrlbit = 0,
@@ -313,7 +236,6 @@ struct clk clk_h = {
313 236
314struct clk clk_p = { 237struct clk clk_p = {
315 .name = "pclk", 238 .name = "pclk",
316 .id = -1,
317 .rate = 0, 239 .rate = 0,
318 .parent = NULL, 240 .parent = NULL,
319 .ctrlbit = 0, 241 .ctrlbit = 0,
@@ -322,7 +244,6 @@ struct clk clk_p = {
322 244
323struct clk clk_usb_bus = { 245struct clk clk_usb_bus = {
324 .name = "usb-bus", 246 .name = "usb-bus",
325 .id = -1,
326 .rate = 0, 247 .rate = 0,
327 .parent = &clk_upll, 248 .parent = &clk_upll,
328}; 249};
@@ -330,7 +251,6 @@ struct clk clk_usb_bus = {
330 251
331struct clk s3c24xx_uclk = { 252struct clk s3c24xx_uclk = {
332 .name = "uclk", 253 .name = "uclk",
333 .id = -1,
334}; 254};
335 255
336/* initialise the clock system */ 256/* initialise the clock system */
@@ -346,14 +266,11 @@ int s3c24xx_register_clock(struct clk *clk)
346 if (clk->enable == NULL) 266 if (clk->enable == NULL)
347 clk->enable = clk_null_enable; 267 clk->enable = clk_null_enable;
348 268
349 /* add to the list of available clocks */ 269 /* fill up the clk_lookup structure and register it*/
350 270 clk->lookup.dev_id = clk->devname;
351 /* Quick check to see if this clock has already been registered. */ 271 clk->lookup.con_id = clk->name;
352 BUG_ON(clk->list.prev != clk->list.next); 272 clk->lookup.clk = clk;
353 273 clkdev_add(&clk->lookup);
354 spin_lock(&clocks_lock);
355 list_add(&clk->list, &clocks);
356 spin_unlock(&clocks_lock);
357 274
358 return 0; 275 return 0;
359} 276}
@@ -463,10 +380,7 @@ static int clk_debugfs_register_one(struct clk *c)
463 char s[255]; 380 char s[255];
464 char *p = s; 381 char *p = s;
465 382
466 p += sprintf(p, "%s", c->name); 383 p += sprintf(p, "%s", c->devname);
467
468 if (c->id >= 0)
469 sprintf(p, ":%d", c->id);
470 384
471 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); 385 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
472 if (!d) 386 if (!d)
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 983c578b8276..87d5b38a86fb 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -10,6 +10,7 @@
10*/ 10*/
11 11
12#include <linux/spinlock.h> 12#include <linux/spinlock.h>
13#include <linux/clkdev.h>
13 14
14struct clk; 15struct clk;
15 16
@@ -40,6 +41,7 @@ struct clk {
40 struct module *owner; 41 struct module *owner;
41 struct clk *parent; 42 struct clk *parent;
42 const char *name; 43 const char *name;
44 const char *devname;
43 int id; 45 int id;
44 int usage; 46 int usage;
45 unsigned long rate; 47 unsigned long rate;
@@ -47,6 +49,7 @@ struct clk {
47 49
48 struct clk_ops *ops; 50 struct clk_ops *ops;
49 int (*enable)(struct clk *, int enable); 51 int (*enable)(struct clk *, int enable);
52 struct clk_lookup lookup;
50#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) 53#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
51 struct dentry *dent; /* For visible tree hierarchy */ 54 struct dentry *dent; /* For visible tree hierarchy */
52#endif 55#endif
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
index 46c9381e083b..f1bba88ed2f5 100644
--- a/arch/arm/plat-samsung/pwm-clock.c
+++ b/arch/arm/plat-samsung/pwm-clock.c
@@ -268,6 +268,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
268 [0] = { 268 [0] = {
269 .clk = { 269 .clk = {
270 .name = "pwm-tdiv", 270 .name = "pwm-tdiv",
271 .devname = "s3c24xx-pwm.0",
271 .ops = &clk_tdiv_ops, 272 .ops = &clk_tdiv_ops,
272 .parent = &clk_timer_scaler[0], 273 .parent = &clk_timer_scaler[0],
273 }, 274 },
@@ -275,6 +276,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
275 [1] = { 276 [1] = {
276 .clk = { 277 .clk = {
277 .name = "pwm-tdiv", 278 .name = "pwm-tdiv",
279 .devname = "s3c24xx-pwm.1",
278 .ops = &clk_tdiv_ops, 280 .ops = &clk_tdiv_ops,
279 .parent = &clk_timer_scaler[0], 281 .parent = &clk_timer_scaler[0],
280 } 282 }
@@ -282,6 +284,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
282 [2] = { 284 [2] = {
283 .clk = { 285 .clk = {
284 .name = "pwm-tdiv", 286 .name = "pwm-tdiv",
287 .devname = "s3c24xx-pwm.2",
285 .ops = &clk_tdiv_ops, 288 .ops = &clk_tdiv_ops,
286 .parent = &clk_timer_scaler[1], 289 .parent = &clk_timer_scaler[1],
287 }, 290 },
@@ -289,6 +292,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
289 [3] = { 292 [3] = {
290 .clk = { 293 .clk = {
291 .name = "pwm-tdiv", 294 .name = "pwm-tdiv",
295 .devname = "s3c24xx-pwm.3",
292 .ops = &clk_tdiv_ops, 296 .ops = &clk_tdiv_ops,
293 .parent = &clk_timer_scaler[1], 297 .parent = &clk_timer_scaler[1],
294 }, 298 },
@@ -296,6 +300,7 @@ static struct pwm_tdiv_clk clk_timer_tdiv[] = {
296 [4] = { 300 [4] = {
297 .clk = { 301 .clk = {
298 .name = "pwm-tdiv", 302 .name = "pwm-tdiv",
303 .devname = "s3c24xx-pwm.4",
299 .ops = &clk_tdiv_ops, 304 .ops = &clk_tdiv_ops,
300 .parent = &clk_timer_scaler[1], 305 .parent = &clk_timer_scaler[1],
301 }, 306 },
@@ -361,26 +366,31 @@ static struct clk_ops clk_tin_ops = {
361static struct clk clk_tin[] = { 366static struct clk clk_tin[] = {
362 [0] = { 367 [0] = {
363 .name = "pwm-tin", 368 .name = "pwm-tin",
369 .devname = "s3c24xx-pwm.0",
364 .id = 0, 370 .id = 0,
365 .ops = &clk_tin_ops, 371 .ops = &clk_tin_ops,
366 }, 372 },
367 [1] = { 373 [1] = {
368 .name = "pwm-tin", 374 .name = "pwm-tin",
375 .devname = "s3c24xx-pwm.1",
369 .id = 1, 376 .id = 1,
370 .ops = &clk_tin_ops, 377 .ops = &clk_tin_ops,
371 }, 378 },
372 [2] = { 379 [2] = {
373 .name = "pwm-tin", 380 .name = "pwm-tin",
381 .devname = "s3c24xx-pwm.2",
374 .id = 2, 382 .id = 2,
375 .ops = &clk_tin_ops, 383 .ops = &clk_tin_ops,
376 }, 384 },
377 [3] = { 385 [3] = {
378 .name = "pwm-tin", 386 .name = "pwm-tin",
387 .devname = "s3c24xx-pwm.3",
379 .id = 3, 388 .id = 3,
380 .ops = &clk_tin_ops, 389 .ops = &clk_tin_ops,
381 }, 390 },
382 [4] = { 391 [4] = {
383 .name = "pwm-tin", 392 .name = "pwm-tin",
393 .devname = "s3c24xx-pwm.4",
384 .id = 4, 394 .id = 4,
385 .ops = &clk_tin_ops, 395 .ops = &clk_tin_ops,
386 }, 396 },
diff --git a/arch/arm/plat-samsung/time.c b/arch/arm/plat-samsung/time.c
index 2231d80ad817..e3bb806bbafe 100644
--- a/arch/arm/plat-samsung/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -259,6 +259,8 @@ static void __init s3c2410_timer_resources(void)
259 clk_enable(timerclk); 259 clk_enable(timerclk);
260 260
261 if (!use_tclk1_12()) { 261 if (!use_tclk1_12()) {
262 tmpdev.id = 4;
263 tmpdev.dev.init_name = "s3c24xx-pwm.4";
262 tin = clk_get(&tmpdev.dev, "pwm-tin"); 264 tin = clk_get(&tmpdev.dev, "pwm-tin");
263 if (IS_ERR(tin)) 265 if (IS_ERR(tin))
264 panic("failed to get pwm-tin clock for system timer"); 266 panic("failed to get pwm-tin clock for system timer");