diff options
author | H. Peter Anvin <hpa@linux.intel.com> | 2013-04-20 12:16:44 -0400 |
---|---|---|
committer | H. Peter Anvin <hpa@linux.intel.com> | 2013-04-20 12:16:44 -0400 |
commit | f53f292eeaa234615c31a1306babe703fc4263f2 (patch) | |
tree | 707b0933a20f7dc05495e974243a23b5c9f8c918 /arch/arm/plat-orion | |
parent | 15b9c359f288b09003cb70f7ed204affc0c6614d (diff) | |
parent | a9499fa7cd3fd4824a7202d00c766b269fa3bda6 (diff) |
Merge remote-tracking branch 'efi/chainsaw' into x86/efi
Resolved Conflicts:
drivers/firmware/efivars.c
fs/efivarsfs/file.c
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r-- | arch/arm/plat-orion/addr-map.c | 7 | ||||
-rw-r--r-- | arch/arm/plat-orion/mpp.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-orion/time.c | 6 |
3 files changed, 7 insertions, 8 deletions
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c index febe3862873c..807ac8e5cbc0 100644 --- a/arch/arm/plat-orion/addr-map.c +++ b/arch/arm/plat-orion/addr-map.c | |||
@@ -157,9 +157,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, | |||
157 | u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i)); | 157 | u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i)); |
158 | 158 | ||
159 | /* | 159 | /* |
160 | * Chip select enabled? | 160 | * We only take care of entries for which the chip |
161 | * select is enabled, and that don't have high base | ||
162 | * address bits set (devices can only access the first | ||
163 | * 32 bits of the memory). | ||
161 | */ | 164 | */ |
162 | if (size & 1) { | 165 | if ((size & 1) && !(base & 0xF)) { |
163 | struct mbus_dram_window *w; | 166 | struct mbus_dram_window *w; |
164 | 167 | ||
165 | w = &orion_mbus_dram_info.cs[cs++]; | 168 | w = &orion_mbus_dram_info.cs[cs++]; |
diff --git a/arch/arm/plat-orion/mpp.c b/arch/arm/plat-orion/mpp.c index e686fe76a96b..7310bcfb299f 100644 --- a/arch/arm/plat-orion/mpp.c +++ b/arch/arm/plat-orion/mpp.c | |||
@@ -49,7 +49,7 @@ void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask, | |||
49 | "number (%u)\n", num); | 49 | "number (%u)\n", num); |
50 | continue; | 50 | continue; |
51 | } | 51 | } |
52 | if (variant_mask & !(*mpp_list & variant_mask)) { | 52 | if (variant_mask && !(*mpp_list & variant_mask)) { |
53 | printk(KERN_WARNING | 53 | printk(KERN_WARNING |
54 | "orion_mpp_conf: requested MPP%u config " | 54 | "orion_mpp_conf: requested MPP%u config " |
55 | "unavailable on this hardware\n", num); | 55 | "unavailable on this hardware\n", num); |
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c index 0f4fa863dd55..5d5ac0f05422 100644 --- a/arch/arm/plat-orion/time.c +++ b/arch/arm/plat-orion/time.c | |||
@@ -156,7 +156,6 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
156 | static struct clock_event_device orion_clkevt = { | 156 | static struct clock_event_device orion_clkevt = { |
157 | .name = "orion_tick", | 157 | .name = "orion_tick", |
158 | .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, | 158 | .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, |
159 | .shift = 32, | ||
160 | .rating = 300, | 159 | .rating = 300, |
161 | .set_next_event = orion_clkevt_next_event, | 160 | .set_next_event = orion_clkevt_next_event, |
162 | .set_mode = orion_clkevt_mode, | 161 | .set_mode = orion_clkevt_mode, |
@@ -221,9 +220,6 @@ orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask, | |||
221 | * Setup clockevent timer (interrupt-driven). | 220 | * Setup clockevent timer (interrupt-driven). |
222 | */ | 221 | */ |
223 | setup_irq(irq, &orion_timer_irq); | 222 | setup_irq(irq, &orion_timer_irq); |
224 | orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift); | ||
225 | orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt); | ||
226 | orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt); | ||
227 | orion_clkevt.cpumask = cpumask_of(0); | 223 | orion_clkevt.cpumask = cpumask_of(0); |
228 | clockevents_register_device(&orion_clkevt); | 224 | clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe); |
229 | } | 225 | } |