diff options
author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
---|---|---|
committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/arm/mach-sa1100/irq.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/arm/mach-sa1100/irq.c')
-rw-r--r-- | arch/arm/mach-sa1100/irq.c | 119 |
1 files changed, 56 insertions, 63 deletions
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 3093d46a9c6f..dfbf824a69fa 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <linux/ioport.h> | 16 | #include <linux/ioport.h> |
17 | #include <linux/sysdev.h> | 17 | #include <linux/syscore_ops.h> |
18 | 18 | ||
19 | #include <mach/hardware.h> | 19 | #include <mach/hardware.h> |
20 | #include <asm/mach/irq.h> | 20 | #include <asm/mach/irq.h> |
@@ -37,14 +37,14 @@ static int GPIO_IRQ_mask = (1 << 11) - 1; | |||
37 | #define GPIO_11_27_IRQ(i) ((i) - 21) | 37 | #define GPIO_11_27_IRQ(i) ((i) - 21) |
38 | #define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq)) | 38 | #define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq)) |
39 | 39 | ||
40 | static int sa1100_gpio_type(unsigned int irq, unsigned int type) | 40 | static int sa1100_gpio_type(struct irq_data *d, unsigned int type) |
41 | { | 41 | { |
42 | unsigned int mask; | 42 | unsigned int mask; |
43 | 43 | ||
44 | if (irq <= 10) | 44 | if (d->irq <= 10) |
45 | mask = 1 << irq; | 45 | mask = 1 << d->irq; |
46 | else | 46 | else |
47 | mask = GPIO11_27_MASK(irq); | 47 | mask = GPIO11_27_MASK(d->irq); |
48 | 48 | ||
49 | if (type == IRQ_TYPE_PROBE) { | 49 | if (type == IRQ_TYPE_PROBE) { |
50 | if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) | 50 | if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) |
@@ -70,37 +70,37 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type) | |||
70 | /* | 70 | /* |
71 | * GPIO IRQs must be acknowledged. This is for IRQs from 0 to 10. | 71 | * GPIO IRQs must be acknowledged. This is for IRQs from 0 to 10. |
72 | */ | 72 | */ |
73 | static void sa1100_low_gpio_ack(unsigned int irq) | 73 | static void sa1100_low_gpio_ack(struct irq_data *d) |
74 | { | 74 | { |
75 | GEDR = (1 << irq); | 75 | GEDR = (1 << d->irq); |
76 | } | 76 | } |
77 | 77 | ||
78 | static void sa1100_low_gpio_mask(unsigned int irq) | 78 | static void sa1100_low_gpio_mask(struct irq_data *d) |
79 | { | 79 | { |
80 | ICMR &= ~(1 << irq); | 80 | ICMR &= ~(1 << d->irq); |
81 | } | 81 | } |
82 | 82 | ||
83 | static void sa1100_low_gpio_unmask(unsigned int irq) | 83 | static void sa1100_low_gpio_unmask(struct irq_data *d) |
84 | { | 84 | { |
85 | ICMR |= 1 << irq; | 85 | ICMR |= 1 << d->irq; |
86 | } | 86 | } |
87 | 87 | ||
88 | static int sa1100_low_gpio_wake(unsigned int irq, unsigned int on) | 88 | static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on) |
89 | { | 89 | { |
90 | if (on) | 90 | if (on) |
91 | PWER |= 1 << irq; | 91 | PWER |= 1 << d->irq; |
92 | else | 92 | else |
93 | PWER &= ~(1 << irq); | 93 | PWER &= ~(1 << d->irq); |
94 | return 0; | 94 | return 0; |
95 | } | 95 | } |
96 | 96 | ||
97 | static struct irq_chip sa1100_low_gpio_chip = { | 97 | static struct irq_chip sa1100_low_gpio_chip = { |
98 | .name = "GPIO-l", | 98 | .name = "GPIO-l", |
99 | .ack = sa1100_low_gpio_ack, | 99 | .irq_ack = sa1100_low_gpio_ack, |
100 | .mask = sa1100_low_gpio_mask, | 100 | .irq_mask = sa1100_low_gpio_mask, |
101 | .unmask = sa1100_low_gpio_unmask, | 101 | .irq_unmask = sa1100_low_gpio_unmask, |
102 | .set_type = sa1100_gpio_type, | 102 | .irq_set_type = sa1100_gpio_type, |
103 | .set_wake = sa1100_low_gpio_wake, | 103 | .irq_set_wake = sa1100_low_gpio_wake, |
104 | }; | 104 | }; |
105 | 105 | ||
106 | /* | 106 | /* |
@@ -139,16 +139,16 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc) | |||
139 | * In addition, the IRQs are all collected up into one bit in the | 139 | * In addition, the IRQs are all collected up into one bit in the |
140 | * interrupt controller registers. | 140 | * interrupt controller registers. |
141 | */ | 141 | */ |
142 | static void sa1100_high_gpio_ack(unsigned int irq) | 142 | static void sa1100_high_gpio_ack(struct irq_data *d) |
143 | { | 143 | { |
144 | unsigned int mask = GPIO11_27_MASK(irq); | 144 | unsigned int mask = GPIO11_27_MASK(d->irq); |
145 | 145 | ||
146 | GEDR = mask; | 146 | GEDR = mask; |
147 | } | 147 | } |
148 | 148 | ||
149 | static void sa1100_high_gpio_mask(unsigned int irq) | 149 | static void sa1100_high_gpio_mask(struct irq_data *d) |
150 | { | 150 | { |
151 | unsigned int mask = GPIO11_27_MASK(irq); | 151 | unsigned int mask = GPIO11_27_MASK(d->irq); |
152 | 152 | ||
153 | GPIO_IRQ_mask &= ~mask; | 153 | GPIO_IRQ_mask &= ~mask; |
154 | 154 | ||
@@ -156,9 +156,9 @@ static void sa1100_high_gpio_mask(unsigned int irq) | |||
156 | GFER &= ~mask; | 156 | GFER &= ~mask; |
157 | } | 157 | } |
158 | 158 | ||
159 | static void sa1100_high_gpio_unmask(unsigned int irq) | 159 | static void sa1100_high_gpio_unmask(struct irq_data *d) |
160 | { | 160 | { |
161 | unsigned int mask = GPIO11_27_MASK(irq); | 161 | unsigned int mask = GPIO11_27_MASK(d->irq); |
162 | 162 | ||
163 | GPIO_IRQ_mask |= mask; | 163 | GPIO_IRQ_mask |= mask; |
164 | 164 | ||
@@ -166,44 +166,44 @@ static void sa1100_high_gpio_unmask(unsigned int irq) | |||
166 | GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; | 166 | GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; |
167 | } | 167 | } |
168 | 168 | ||
169 | static int sa1100_high_gpio_wake(unsigned int irq, unsigned int on) | 169 | static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on) |
170 | { | 170 | { |
171 | if (on) | 171 | if (on) |
172 | PWER |= GPIO11_27_MASK(irq); | 172 | PWER |= GPIO11_27_MASK(d->irq); |
173 | else | 173 | else |
174 | PWER &= ~GPIO11_27_MASK(irq); | 174 | PWER &= ~GPIO11_27_MASK(d->irq); |
175 | return 0; | 175 | return 0; |
176 | } | 176 | } |
177 | 177 | ||
178 | static struct irq_chip sa1100_high_gpio_chip = { | 178 | static struct irq_chip sa1100_high_gpio_chip = { |
179 | .name = "GPIO-h", | 179 | .name = "GPIO-h", |
180 | .ack = sa1100_high_gpio_ack, | 180 | .irq_ack = sa1100_high_gpio_ack, |
181 | .mask = sa1100_high_gpio_mask, | 181 | .irq_mask = sa1100_high_gpio_mask, |
182 | .unmask = sa1100_high_gpio_unmask, | 182 | .irq_unmask = sa1100_high_gpio_unmask, |
183 | .set_type = sa1100_gpio_type, | 183 | .irq_set_type = sa1100_gpio_type, |
184 | .set_wake = sa1100_high_gpio_wake, | 184 | .irq_set_wake = sa1100_high_gpio_wake, |
185 | }; | 185 | }; |
186 | 186 | ||
187 | /* | 187 | /* |
188 | * We don't need to ACK IRQs on the SA1100 unless they're GPIOs | 188 | * We don't need to ACK IRQs on the SA1100 unless they're GPIOs |
189 | * this is for internal IRQs i.e. from 11 to 31. | 189 | * this is for internal IRQs i.e. from 11 to 31. |
190 | */ | 190 | */ |
191 | static void sa1100_mask_irq(unsigned int irq) | 191 | static void sa1100_mask_irq(struct irq_data *d) |
192 | { | 192 | { |
193 | ICMR &= ~(1 << irq); | 193 | ICMR &= ~(1 << d->irq); |
194 | } | 194 | } |
195 | 195 | ||
196 | static void sa1100_unmask_irq(unsigned int irq) | 196 | static void sa1100_unmask_irq(struct irq_data *d) |
197 | { | 197 | { |
198 | ICMR |= (1 << irq); | 198 | ICMR |= (1 << d->irq); |
199 | } | 199 | } |
200 | 200 | ||
201 | /* | 201 | /* |
202 | * Apart form GPIOs, only the RTC alarm can be a wakeup event. | 202 | * Apart form GPIOs, only the RTC alarm can be a wakeup event. |
203 | */ | 203 | */ |
204 | static int sa1100_set_wake(unsigned int irq, unsigned int on) | 204 | static int sa1100_set_wake(struct irq_data *d, unsigned int on) |
205 | { | 205 | { |
206 | if (irq == IRQ_RTCAlrm) { | 206 | if (d->irq == IRQ_RTCAlrm) { |
207 | if (on) | 207 | if (on) |
208 | PWER |= PWER_RTC; | 208 | PWER |= PWER_RTC; |
209 | else | 209 | else |
@@ -215,10 +215,10 @@ static int sa1100_set_wake(unsigned int irq, unsigned int on) | |||
215 | 215 | ||
216 | static struct irq_chip sa1100_normal_chip = { | 216 | static struct irq_chip sa1100_normal_chip = { |
217 | .name = "SC", | 217 | .name = "SC", |
218 | .ack = sa1100_mask_irq, | 218 | .irq_ack = sa1100_mask_irq, |
219 | .mask = sa1100_mask_irq, | 219 | .irq_mask = sa1100_mask_irq, |
220 | .unmask = sa1100_unmask_irq, | 220 | .irq_unmask = sa1100_unmask_irq, |
221 | .set_wake = sa1100_set_wake, | 221 | .irq_set_wake = sa1100_set_wake, |
222 | }; | 222 | }; |
223 | 223 | ||
224 | static struct resource irq_resource = { | 224 | static struct resource irq_resource = { |
@@ -234,7 +234,7 @@ static struct sa1100irq_state { | |||
234 | unsigned int iccr; | 234 | unsigned int iccr; |
235 | } sa1100irq_state; | 235 | } sa1100irq_state; |
236 | 236 | ||
237 | static int sa1100irq_suspend(struct sys_device *dev, pm_message_t state) | 237 | static int sa1100irq_suspend(void) |
238 | { | 238 | { |
239 | struct sa1100irq_state *st = &sa1100irq_state; | 239 | struct sa1100irq_state *st = &sa1100irq_state; |
240 | 240 | ||
@@ -264,7 +264,7 @@ static int sa1100irq_suspend(struct sys_device *dev, pm_message_t state) | |||
264 | return 0; | 264 | return 0; |
265 | } | 265 | } |
266 | 266 | ||
267 | static int sa1100irq_resume(struct sys_device *dev) | 267 | static void sa1100irq_resume(void) |
268 | { | 268 | { |
269 | struct sa1100irq_state *st = &sa1100irq_state; | 269 | struct sa1100irq_state *st = &sa1100irq_state; |
270 | 270 | ||
@@ -277,24 +277,17 @@ static int sa1100irq_resume(struct sys_device *dev) | |||
277 | 277 | ||
278 | ICMR = st->icmr; | 278 | ICMR = st->icmr; |
279 | } | 279 | } |
280 | return 0; | ||
281 | } | 280 | } |
282 | 281 | ||
283 | static struct sysdev_class sa1100irq_sysclass = { | 282 | static struct syscore_ops sa1100irq_syscore_ops = { |
284 | .name = "sa11x0-irq", | ||
285 | .suspend = sa1100irq_suspend, | 283 | .suspend = sa1100irq_suspend, |
286 | .resume = sa1100irq_resume, | 284 | .resume = sa1100irq_resume, |
287 | }; | 285 | }; |
288 | 286 | ||
289 | static struct sys_device sa1100irq_device = { | ||
290 | .id = 0, | ||
291 | .cls = &sa1100irq_sysclass, | ||
292 | }; | ||
293 | |||
294 | static int __init sa1100irq_init_devicefs(void) | 287 | static int __init sa1100irq_init_devicefs(void) |
295 | { | 288 | { |
296 | sysdev_class_register(&sa1100irq_sysclass); | 289 | register_syscore_ops(&sa1100irq_syscore_ops); |
297 | return sysdev_register(&sa1100irq_device); | 290 | return 0; |
298 | } | 291 | } |
299 | 292 | ||
300 | device_initcall(sa1100irq_init_devicefs); | 293 | device_initcall(sa1100irq_init_devicefs); |
@@ -323,28 +316,28 @@ void __init sa1100_init_irq(void) | |||
323 | ICCR = 1; | 316 | ICCR = 1; |
324 | 317 | ||
325 | for (irq = 0; irq <= 10; irq++) { | 318 | for (irq = 0; irq <= 10; irq++) { |
326 | set_irq_chip(irq, &sa1100_low_gpio_chip); | 319 | irq_set_chip_and_handler(irq, &sa1100_low_gpio_chip, |
327 | set_irq_handler(irq, handle_edge_irq); | 320 | handle_edge_irq); |
328 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 321 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
329 | } | 322 | } |
330 | 323 | ||
331 | for (irq = 12; irq <= 31; irq++) { | 324 | for (irq = 12; irq <= 31; irq++) { |
332 | set_irq_chip(irq, &sa1100_normal_chip); | 325 | irq_set_chip_and_handler(irq, &sa1100_normal_chip, |
333 | set_irq_handler(irq, handle_level_irq); | 326 | handle_level_irq); |
334 | set_irq_flags(irq, IRQF_VALID); | 327 | set_irq_flags(irq, IRQF_VALID); |
335 | } | 328 | } |
336 | 329 | ||
337 | for (irq = 32; irq <= 48; irq++) { | 330 | for (irq = 32; irq <= 48; irq++) { |
338 | set_irq_chip(irq, &sa1100_high_gpio_chip); | 331 | irq_set_chip_and_handler(irq, &sa1100_high_gpio_chip, |
339 | set_irq_handler(irq, handle_edge_irq); | 332 | handle_edge_irq); |
340 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 333 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
341 | } | 334 | } |
342 | 335 | ||
343 | /* | 336 | /* |
344 | * Install handler for GPIO 11-27 edge detect interrupts | 337 | * Install handler for GPIO 11-27 edge detect interrupts |
345 | */ | 338 | */ |
346 | set_irq_chip(IRQ_GPIO11_27, &sa1100_normal_chip); | 339 | irq_set_chip(IRQ_GPIO11_27, &sa1100_normal_chip); |
347 | set_irq_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler); | 340 | irq_set_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler); |
348 | 341 | ||
349 | sa1100_init_gpio(); | 342 | sa1100_init_gpio(); |
350 | } | 343 | } |