diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 19:39:23 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 19:39:23 -0500 |
commit | ab10f1dd914ad87e0370bd8b82f77dcd32b6d941 (patch) | |
tree | 3879eaf6d7ede69d2757a5db2bf0de5e6bd3c367 /arch/arm/mach-s5pv210 | |
parent | f56d463423b825ff5bf4b63e0dc443557934165c (diff) | |
parent | 957c461e82f7a8ddcd7fb25c01c43917f64fde33 (diff) |
Merge branch 'dev/cleanup-clocks' into for-next
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r-- | arch/arm/mach-s5pv210/clock.c | 19 |
1 files changed, 4 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index dab6ef3b6ca9..2d599499cefe 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c | |||
@@ -309,7 +309,7 @@ static struct clk_ops clk_fout_apll_ops = { | |||
309 | .get_rate = s5pv210_clk_fout_apll_get_rate, | 309 | .get_rate = s5pv210_clk_fout_apll_get_rate, |
310 | }; | 310 | }; |
311 | 311 | ||
312 | static struct clk init_clocks_disable[] = { | 312 | static struct clk init_clocks_off[] = { |
313 | { | 313 | { |
314 | .name = "pdma", | 314 | .name = "pdma", |
315 | .id = 0, | 315 | .id = 0, |
@@ -1226,13 +1226,9 @@ static struct clk *clks[] __initdata = { | |||
1226 | 1226 | ||
1227 | void __init s5pv210_register_clocks(void) | 1227 | void __init s5pv210_register_clocks(void) |
1228 | { | 1228 | { |
1229 | struct clk *clkp; | ||
1230 | int ret; | ||
1231 | int ptr; | 1229 | int ptr; |
1232 | 1230 | ||
1233 | ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 1231 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
1234 | if (ret > 0) | ||
1235 | printk(KERN_ERR "Failed to register %u clocks\n", ret); | ||
1236 | 1232 | ||
1237 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 1233 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
1238 | s3c_register_clksrc(sysclks[ptr], 1); | 1234 | s3c_register_clksrc(sysclks[ptr], 1); |
@@ -1240,15 +1236,8 @@ void __init s5pv210_register_clocks(void) | |||
1240 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1236 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1241 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1237 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1242 | 1238 | ||
1243 | clkp = init_clocks_disable; | 1239 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1244 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 1240 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1245 | ret = s3c24xx_register_clock(clkp); | ||
1246 | if (ret < 0) { | ||
1247 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
1248 | clkp->name, ret); | ||
1249 | } | ||
1250 | (clkp->enable)(clkp, 0); | ||
1251 | } | ||
1252 | 1241 | ||
1253 | s3c_pwmclk_init(); | 1242 | s3c_pwmclk_init(); |
1254 | } | 1243 | } |