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authorPadmavathi Venna <padma.v@samsung.com>2011-12-22 20:14:31 -0500
committerKukjin Kim <kgene.kim@samsung.com>2011-12-22 20:49:53 -0500
commit875a59374cd10200ac24f03877ccd8f73af590cc (patch)
treea7a933bd6a567fd2daa51439bcb17597aa337814 /arch/arm/mach-s5pv210
parenta153e31abb01484d0088ac28425dc98204848ad4 (diff)
ARM: SAMSUNG: Consolidation of SPI platform devices to plat-samsung
SPI platform device definitions consolidated from respective machine folder to plat-samsung Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r--arch/arm/mach-s5pv210/Makefile1
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c169
2 files changed, 0 insertions, 170 deletions
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 53c346a4cbb1..7eb8677d3ac0 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o
27# device support 27# device support
28 28
29obj-y += dev-audio.o 29obj-y += dev-audio.o
30obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
31 30
32obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 31obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
33obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o 32obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
deleted file mode 100644
index 39bef19dbd68..000000000000
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ /dev/null
@@ -1,169 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
14
15#include <mach/dma.h>
16#include <mach/map.h>
17#include <mach/irqs.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23/* SPI Controller platform_devices */
24
25/* Since we emulate multi-cs capability, we do not touch the CS.
26 * The emulated CS is toggled by board specific mechanism, as it can
27 * be either some immediate GPIO or some signal out of some other
28 * chip in between ... or some yet another way.
29 * We simply do not assume anything about CS.
30 */
31static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
32{
33 unsigned int base;
34
35 switch (pdev->id) {
36 case 0:
37 base = S5PV210_GPB(0);
38 break;
39
40 case 1:
41 base = S5PV210_GPB(4);
42 break;
43
44 default:
45 dev_err(&pdev->dev, "Invalid SPI Controller number!");
46 return -EINVAL;
47 }
48
49 s3c_gpio_cfgall_range(base, 3,
50 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
51
52 return 0;
53}
54
55static struct resource s5pv210_spi0_resource[] = {
56 [0] = {
57 .start = S5PV210_PA_SPI0,
58 .end = S5PV210_PA_SPI0 + 0x100 - 1,
59 .flags = IORESOURCE_MEM,
60 },
61 [1] = {
62 .start = DMACH_SPI0_TX,
63 .end = DMACH_SPI0_TX,
64 .flags = IORESOURCE_DMA,
65 },
66 [2] = {
67 .start = DMACH_SPI0_RX,
68 .end = DMACH_SPI0_RX,
69 .flags = IORESOURCE_DMA,
70 },
71 [3] = {
72 .start = IRQ_SPI0,
73 .end = IRQ_SPI0,
74 .flags = IORESOURCE_IRQ,
75 },
76};
77
78static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
79 .cfg_gpio = s5pv210_spi_cfg_gpio,
80 .fifo_lvl_mask = 0x1ff,
81 .rx_lvl_offset = 15,
82 .high_speed = 1,
83 .tx_st_done = 25,
84};
85
86static u64 spi_dmamask = DMA_BIT_MASK(32);
87
88struct platform_device s5pv210_device_spi0 = {
89 .name = "s3c64xx-spi",
90 .id = 0,
91 .num_resources = ARRAY_SIZE(s5pv210_spi0_resource),
92 .resource = s5pv210_spi0_resource,
93 .dev = {
94 .dma_mask = &spi_dmamask,
95 .coherent_dma_mask = DMA_BIT_MASK(32),
96 .platform_data = &s5pv210_spi0_pdata,
97 },
98};
99
100static struct resource s5pv210_spi1_resource[] = {
101 [0] = {
102 .start = S5PV210_PA_SPI1,
103 .end = S5PV210_PA_SPI1 + 0x100 - 1,
104 .flags = IORESOURCE_MEM,
105 },
106 [1] = {
107 .start = DMACH_SPI1_TX,
108 .end = DMACH_SPI1_TX,
109 .flags = IORESOURCE_DMA,
110 },
111 [2] = {
112 .start = DMACH_SPI1_RX,
113 .end = DMACH_SPI1_RX,
114 .flags = IORESOURCE_DMA,
115 },
116 [3] = {
117 .start = IRQ_SPI1,
118 .end = IRQ_SPI1,
119 .flags = IORESOURCE_IRQ,
120 },
121};
122
123static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
124 .cfg_gpio = s5pv210_spi_cfg_gpio,
125 .fifo_lvl_mask = 0x7f,
126 .rx_lvl_offset = 15,
127 .high_speed = 1,
128 .tx_st_done = 25,
129};
130
131struct platform_device s5pv210_device_spi1 = {
132 .name = "s3c64xx-spi",
133 .id = 1,
134 .num_resources = ARRAY_SIZE(s5pv210_spi1_resource),
135 .resource = s5pv210_spi1_resource,
136 .dev = {
137 .dma_mask = &spi_dmamask,
138 .coherent_dma_mask = DMA_BIT_MASK(32),
139 .platform_data = &s5pv210_spi1_pdata,
140 },
141};
142
143void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
144{
145 struct s3c64xx_spi_info *pd;
146
147 /* Reject invalid configuration */
148 if (!num_cs || src_clk_nr < 0
149 || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) {
150 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
151 return;
152 }
153
154 switch (cntrlr) {
155 case 0:
156 pd = &s5pv210_spi0_pdata;
157 break;
158 case 1:
159 pd = &s5pv210_spi1_pdata;
160 break;
161 default:
162 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
163 __func__, cntrlr);
164 return;
165 }
166
167 pd->num_cs = num_cs;
168 pd->src_clk_nr = src_clk_nr;
169}