diff options
author | Paul Walmsley <paul@pwsan.com> | 2011-07-09 21:14:07 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-07-09 21:14:07 -0400 |
commit | bc6149587b309e3231e5ac7138b84197813e17ec (patch) | |
tree | 0b2b29bce338be46b985ce6d3aaa2bd2671fbaa9 /arch/arm/mach-omap2/omap_hwmod_2430_data.c | |
parent | 0d619a89998d308c48d06b033eccb7374c456f12 (diff) |
omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays
Previously, struct omap_hwmod_dma_info arrays were unterminated; and
users of these arrays used the ARRAY_SIZE() macro to determine the
length of the array. However, ARRAY_SIZE() only works when the array
is in the same scope as the macro user.
So far this hasn't been a problem. However, to reduce duplicated
data, a subsequent patch will move common data to a separate, shared
file. When this is done, ARRAY_SIZE() will no longer be usable.
This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info
arrays and uses a sentinel value (irq == -1) as the array terminator
instead.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2430_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 62ecc685f1a2..af758b3e723c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -903,6 +903,7 @@ static struct omap_hwmod_class uart_class = { | |||
903 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | 903 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { |
904 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | 904 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, |
905 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | 905 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, |
906 | { .dma_req = -1 } | ||
906 | }; | 907 | }; |
907 | 908 | ||
908 | static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | 909 | static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { |
@@ -913,7 +914,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | |||
913 | .name = "uart1", | 914 | .name = "uart1", |
914 | .mpu_irqs = omap2_uart1_mpu_irqs, | 915 | .mpu_irqs = omap2_uart1_mpu_irqs, |
915 | .sdma_reqs = uart1_sdma_reqs, | 916 | .sdma_reqs = uart1_sdma_reqs, |
916 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
917 | .main_clk = "uart1_fck", | 917 | .main_clk = "uart1_fck", |
918 | .prcm = { | 918 | .prcm = { |
919 | .omap2 = { | 919 | .omap2 = { |
@@ -935,6 +935,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | |||
935 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | 935 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { |
936 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | 936 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, |
937 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | 937 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, |
938 | { .dma_req = -1 } | ||
938 | }; | 939 | }; |
939 | 940 | ||
940 | static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { | 941 | static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { |
@@ -945,7 +946,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | |||
945 | .name = "uart2", | 946 | .name = "uart2", |
946 | .mpu_irqs = omap2_uart2_mpu_irqs, | 947 | .mpu_irqs = omap2_uart2_mpu_irqs, |
947 | .sdma_reqs = uart2_sdma_reqs, | 948 | .sdma_reqs = uart2_sdma_reqs, |
948 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
949 | .main_clk = "uart2_fck", | 949 | .main_clk = "uart2_fck", |
950 | .prcm = { | 950 | .prcm = { |
951 | .omap2 = { | 951 | .omap2 = { |
@@ -967,6 +967,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | |||
967 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | 967 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { |
968 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | 968 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, |
969 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | 969 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, |
970 | { .dma_req = -1 } | ||
970 | }; | 971 | }; |
971 | 972 | ||
972 | static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { | 973 | static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { |
@@ -977,7 +978,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = { | |||
977 | .name = "uart3", | 978 | .name = "uart3", |
978 | .mpu_irqs = omap2_uart3_mpu_irqs, | 979 | .mpu_irqs = omap2_uart3_mpu_irqs, |
979 | .sdma_reqs = uart3_sdma_reqs, | 980 | .sdma_reqs = uart3_sdma_reqs, |
980 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
981 | .main_clk = "uart3_fck", | 981 | .main_clk = "uart3_fck", |
982 | .prcm = { | 982 | .prcm = { |
983 | .omap2 = { | 983 | .omap2 = { |
@@ -1014,6 +1014,7 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { | |||
1014 | 1014 | ||
1015 | static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { | 1015 | static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { |
1016 | { .name = "dispc", .dma_req = 5 }, | 1016 | { .name = "dispc", .dma_req = 5 }, |
1017 | { .dma_req = -1 } | ||
1017 | }; | 1018 | }; |
1018 | 1019 | ||
1019 | /* dss */ | 1020 | /* dss */ |
@@ -1046,7 +1047,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { | |||
1046 | .class = &omap2430_dss_hwmod_class, | 1047 | .class = &omap2430_dss_hwmod_class, |
1047 | .main_clk = "dss1_fck", /* instead of dss_fck */ | 1048 | .main_clk = "dss1_fck", /* instead of dss_fck */ |
1048 | .sdma_reqs = omap2430_dss_sdma_chs, | 1049 | .sdma_reqs = omap2430_dss_sdma_chs, |
1049 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), | ||
1050 | .prcm = { | 1050 | .prcm = { |
1051 | .omap2 = { | 1051 | .omap2 = { |
1052 | .prcm_reg_id = 1, | 1052 | .prcm_reg_id = 1, |
@@ -1237,6 +1237,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { | |||
1237 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | 1237 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { |
1238 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | 1238 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, |
1239 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | 1239 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, |
1240 | { .dma_req = -1 } | ||
1240 | }; | 1241 | }; |
1241 | 1242 | ||
1242 | static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | 1243 | static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { |
@@ -1247,7 +1248,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | |||
1247 | .name = "i2c1", | 1248 | .name = "i2c1", |
1248 | .mpu_irqs = omap2_i2c1_mpu_irqs, | 1249 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
1249 | .sdma_reqs = i2c1_sdma_reqs, | 1250 | .sdma_reqs = i2c1_sdma_reqs, |
1250 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
1251 | .main_clk = "i2chs1_fck", | 1251 | .main_clk = "i2chs1_fck", |
1252 | .prcm = { | 1252 | .prcm = { |
1253 | .omap2 = { | 1253 | .omap2 = { |
@@ -1278,6 +1278,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | |||
1278 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | 1278 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { |
1279 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | 1279 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, |
1280 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | 1280 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, |
1281 | { .dma_req = -1 } | ||
1281 | }; | 1282 | }; |
1282 | 1283 | ||
1283 | static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | 1284 | static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { |
@@ -1288,7 +1289,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = { | |||
1288 | .name = "i2c2", | 1289 | .name = "i2c2", |
1289 | .mpu_irqs = omap2_i2c2_mpu_irqs, | 1290 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
1290 | .sdma_reqs = i2c2_sdma_reqs, | 1291 | .sdma_reqs = i2c2_sdma_reqs, |
1291 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
1292 | .main_clk = "i2chs2_fck", | 1292 | .main_clk = "i2chs2_fck", |
1293 | .prcm = { | 1293 | .prcm = { |
1294 | .omap2 = { | 1294 | .omap2 = { |
@@ -1716,6 +1716,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { | |||
1716 | { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | 1716 | { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ |
1717 | { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | 1717 | { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ |
1718 | { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | 1718 | { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ |
1719 | { .dma_req = -1 } | ||
1719 | }; | 1720 | }; |
1720 | 1721 | ||
1721 | static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { | 1722 | static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { |
@@ -1730,7 +1731,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { | |||
1730 | .name = "mcspi1_hwmod", | 1731 | .name = "mcspi1_hwmod", |
1731 | .mpu_irqs = omap2_mcspi1_mpu_irqs, | 1732 | .mpu_irqs = omap2_mcspi1_mpu_irqs, |
1732 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, | 1733 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, |
1733 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), | ||
1734 | .main_clk = "mcspi1_fck", | 1734 | .main_clk = "mcspi1_fck", |
1735 | .prcm = { | 1735 | .prcm = { |
1736 | .omap2 = { | 1736 | .omap2 = { |
@@ -1754,6 +1754,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { | |||
1754 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | 1754 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ |
1755 | { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | 1755 | { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ |
1756 | { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | 1756 | { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ |
1757 | { .dma_req = -1 } | ||
1757 | }; | 1758 | }; |
1758 | 1759 | ||
1759 | static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { | 1760 | static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { |
@@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { | |||
1768 | .name = "mcspi2_hwmod", | 1769 | .name = "mcspi2_hwmod", |
1769 | .mpu_irqs = omap2_mcspi2_mpu_irqs, | 1770 | .mpu_irqs = omap2_mcspi2_mpu_irqs, |
1770 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, | 1771 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, |
1771 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), | ||
1772 | .main_clk = "mcspi2_fck", | 1772 | .main_clk = "mcspi2_fck", |
1773 | .prcm = { | 1773 | .prcm = { |
1774 | .omap2 = { | 1774 | .omap2 = { |
@@ -1797,6 +1797,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { | |||
1797 | { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ | 1797 | { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ |
1798 | { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ | 1798 | { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ |
1799 | { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ | 1799 | { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ |
1800 | { .dma_req = -1 } | ||
1800 | }; | 1801 | }; |
1801 | 1802 | ||
1802 | static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { | 1803 | static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { |
@@ -1811,7 +1812,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { | |||
1811 | .name = "mcspi3_hwmod", | 1812 | .name = "mcspi3_hwmod", |
1812 | .mpu_irqs = omap2430_mcspi3_mpu_irqs, | 1813 | .mpu_irqs = omap2430_mcspi3_mpu_irqs, |
1813 | .sdma_reqs = omap2430_mcspi3_sdma_reqs, | 1814 | .sdma_reqs = omap2430_mcspi3_sdma_reqs, |
1814 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), | ||
1815 | .main_clk = "mcspi3_fck", | 1815 | .main_clk = "mcspi3_fck", |
1816 | .prcm = { | 1816 | .prcm = { |
1817 | .omap2 = { | 1817 | .omap2 = { |
@@ -1915,6 +1915,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { | |||
1915 | static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { | 1915 | static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { |
1916 | { .name = "rx", .dma_req = 32 }, | 1916 | { .name = "rx", .dma_req = 32 }, |
1917 | { .name = "tx", .dma_req = 31 }, | 1917 | { .name = "tx", .dma_req = 31 }, |
1918 | { .dma_req = -1 } | ||
1918 | }; | 1919 | }; |
1919 | 1920 | ||
1920 | /* l4_core -> mcbsp1 */ | 1921 | /* l4_core -> mcbsp1 */ |
@@ -1936,7 +1937,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { | |||
1936 | .class = &omap2430_mcbsp_hwmod_class, | 1937 | .class = &omap2430_mcbsp_hwmod_class, |
1937 | .mpu_irqs = omap2430_mcbsp1_irqs, | 1938 | .mpu_irqs = omap2430_mcbsp1_irqs, |
1938 | .sdma_reqs = omap2430_mcbsp1_sdma_chs, | 1939 | .sdma_reqs = omap2430_mcbsp1_sdma_chs, |
1939 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), | ||
1940 | .main_clk = "mcbsp1_fck", | 1940 | .main_clk = "mcbsp1_fck", |
1941 | .prcm = { | 1941 | .prcm = { |
1942 | .omap2 = { | 1942 | .omap2 = { |
@@ -1963,6 +1963,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { | |||
1963 | static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { | 1963 | static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { |
1964 | { .name = "rx", .dma_req = 34 }, | 1964 | { .name = "rx", .dma_req = 34 }, |
1965 | { .name = "tx", .dma_req = 33 }, | 1965 | { .name = "tx", .dma_req = 33 }, |
1966 | { .dma_req = -1 } | ||
1966 | }; | 1967 | }; |
1967 | 1968 | ||
1968 | /* l4_core -> mcbsp2 */ | 1969 | /* l4_core -> mcbsp2 */ |
@@ -1984,7 +1985,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { | |||
1984 | .class = &omap2430_mcbsp_hwmod_class, | 1985 | .class = &omap2430_mcbsp_hwmod_class, |
1985 | .mpu_irqs = omap2430_mcbsp2_irqs, | 1986 | .mpu_irqs = omap2430_mcbsp2_irqs, |
1986 | .sdma_reqs = omap2430_mcbsp2_sdma_chs, | 1987 | .sdma_reqs = omap2430_mcbsp2_sdma_chs, |
1987 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), | ||
1988 | .main_clk = "mcbsp2_fck", | 1988 | .main_clk = "mcbsp2_fck", |
1989 | .prcm = { | 1989 | .prcm = { |
1990 | .omap2 = { | 1990 | .omap2 = { |
@@ -2011,6 +2011,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { | |||
2011 | static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { | 2011 | static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { |
2012 | { .name = "rx", .dma_req = 18 }, | 2012 | { .name = "rx", .dma_req = 18 }, |
2013 | { .name = "tx", .dma_req = 17 }, | 2013 | { .name = "tx", .dma_req = 17 }, |
2014 | { .dma_req = -1 } | ||
2014 | }; | 2015 | }; |
2015 | 2016 | ||
2016 | static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { | 2017 | static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { |
@@ -2042,7 +2043,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { | |||
2042 | .class = &omap2430_mcbsp_hwmod_class, | 2043 | .class = &omap2430_mcbsp_hwmod_class, |
2043 | .mpu_irqs = omap2430_mcbsp3_irqs, | 2044 | .mpu_irqs = omap2430_mcbsp3_irqs, |
2044 | .sdma_reqs = omap2430_mcbsp3_sdma_chs, | 2045 | .sdma_reqs = omap2430_mcbsp3_sdma_chs, |
2045 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), | ||
2046 | .main_clk = "mcbsp3_fck", | 2046 | .main_clk = "mcbsp3_fck", |
2047 | .prcm = { | 2047 | .prcm = { |
2048 | .omap2 = { | 2048 | .omap2 = { |
@@ -2069,6 +2069,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { | |||
2069 | static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { | 2069 | static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { |
2070 | { .name = "rx", .dma_req = 20 }, | 2070 | { .name = "rx", .dma_req = 20 }, |
2071 | { .name = "tx", .dma_req = 19 }, | 2071 | { .name = "tx", .dma_req = 19 }, |
2072 | { .dma_req = -1 } | ||
2072 | }; | 2073 | }; |
2073 | 2074 | ||
2074 | static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { | 2075 | static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { |
@@ -2100,7 +2101,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { | |||
2100 | .class = &omap2430_mcbsp_hwmod_class, | 2101 | .class = &omap2430_mcbsp_hwmod_class, |
2101 | .mpu_irqs = omap2430_mcbsp4_irqs, | 2102 | .mpu_irqs = omap2430_mcbsp4_irqs, |
2102 | .sdma_reqs = omap2430_mcbsp4_sdma_chs, | 2103 | .sdma_reqs = omap2430_mcbsp4_sdma_chs, |
2103 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), | ||
2104 | .main_clk = "mcbsp4_fck", | 2104 | .main_clk = "mcbsp4_fck", |
2105 | .prcm = { | 2105 | .prcm = { |
2106 | .omap2 = { | 2106 | .omap2 = { |
@@ -2127,6 +2127,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { | |||
2127 | static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { | 2127 | static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { |
2128 | { .name = "rx", .dma_req = 22 }, | 2128 | { .name = "rx", .dma_req = 22 }, |
2129 | { .name = "tx", .dma_req = 21 }, | 2129 | { .name = "tx", .dma_req = 21 }, |
2130 | { .dma_req = -1 } | ||
2130 | }; | 2131 | }; |
2131 | 2132 | ||
2132 | static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { | 2133 | static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { |
@@ -2158,7 +2159,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { | |||
2158 | .class = &omap2430_mcbsp_hwmod_class, | 2159 | .class = &omap2430_mcbsp_hwmod_class, |
2159 | .mpu_irqs = omap2430_mcbsp5_irqs, | 2160 | .mpu_irqs = omap2430_mcbsp5_irqs, |
2160 | .sdma_reqs = omap2430_mcbsp5_sdma_chs, | 2161 | .sdma_reqs = omap2430_mcbsp5_sdma_chs, |
2161 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), | ||
2162 | .main_clk = "mcbsp5_fck", | 2162 | .main_clk = "mcbsp5_fck", |
2163 | .prcm = { | 2163 | .prcm = { |
2164 | .omap2 = { | 2164 | .omap2 = { |
@@ -2202,6 +2202,7 @@ static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { | |||
2202 | static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { | 2202 | static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { |
2203 | { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ | 2203 | { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ |
2204 | { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ | 2204 | { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ |
2205 | { .dma_req = -1 } | ||
2205 | }; | 2206 | }; |
2206 | 2207 | ||
2207 | static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { | 2208 | static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { |
@@ -2221,7 +2222,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { | |||
2221 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 2222 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
2222 | .mpu_irqs = omap2430_mmc1_mpu_irqs, | 2223 | .mpu_irqs = omap2430_mmc1_mpu_irqs, |
2223 | .sdma_reqs = omap2430_mmc1_sdma_reqs, | 2224 | .sdma_reqs = omap2430_mmc1_sdma_reqs, |
2224 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), | ||
2225 | .opt_clks = omap2430_mmc1_opt_clks, | 2225 | .opt_clks = omap2430_mmc1_opt_clks, |
2226 | .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), | 2226 | .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), |
2227 | .main_clk = "mmchs1_fck", | 2227 | .main_clk = "mmchs1_fck", |
@@ -2251,6 +2251,7 @@ static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { | |||
2251 | static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { | 2251 | static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { |
2252 | { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ | 2252 | { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ |
2253 | { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ | 2253 | { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ |
2254 | { .dma_req = -1 } | ||
2254 | }; | 2255 | }; |
2255 | 2256 | ||
2256 | static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { | 2257 | static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { |
@@ -2266,7 +2267,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { | |||
2266 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 2267 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
2267 | .mpu_irqs = omap2430_mmc2_mpu_irqs, | 2268 | .mpu_irqs = omap2430_mmc2_mpu_irqs, |
2268 | .sdma_reqs = omap2430_mmc2_sdma_reqs, | 2269 | .sdma_reqs = omap2430_mmc2_sdma_reqs, |
2269 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), | ||
2270 | .opt_clks = omap2430_mmc2_opt_clks, | 2270 | .opt_clks = omap2430_mmc2_opt_clks, |
2271 | .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), | 2271 | .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), |
2272 | .main_clk = "mmchs2_fck", | 2272 | .main_clk = "mmchs2_fck", |