diff options
author | Paul Walmsley <paul@pwsan.com> | 2011-07-09 21:14:07 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-07-09 21:14:07 -0400 |
commit | 0d619a89998d308c48d06b033eccb7374c456f12 (patch) | |
tree | a4145d0529652167a083ed084c4ff8555f5b5178 /arch/arm/mach-omap2/omap_hwmod_2430_data.c | |
parent | 212738a4499d278254ed6fdb400e3b4be4cb1de2 (diff) |
omap_hwmod: share identical omap_hwmod_mpu_irqs arrays
To reduce kernel source file data duplication, share struct
omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2430_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 166 |
1 files changed, 25 insertions, 141 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 2c28468a37f8..62ecc685f1a2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -367,10 +367,6 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { | |||
367 | 367 | ||
368 | /* timer1 */ | 368 | /* timer1 */ |
369 | static struct omap_hwmod omap2430_timer1_hwmod; | 369 | static struct omap_hwmod omap2430_timer1_hwmod; |
370 | static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { | ||
371 | { .irq = 37, }, | ||
372 | { .irq = -1 } | ||
373 | }; | ||
374 | 370 | ||
375 | static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { | 371 | static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { |
376 | { | 372 | { |
@@ -398,7 +394,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { | |||
398 | /* timer1 hwmod */ | 394 | /* timer1 hwmod */ |
399 | static struct omap_hwmod omap2430_timer1_hwmod = { | 395 | static struct omap_hwmod omap2430_timer1_hwmod = { |
400 | .name = "timer1", | 396 | .name = "timer1", |
401 | .mpu_irqs = omap2430_timer1_mpu_irqs, | 397 | .mpu_irqs = omap2_timer1_mpu_irqs, |
402 | .main_clk = "gpt1_fck", | 398 | .main_clk = "gpt1_fck", |
403 | .prcm = { | 399 | .prcm = { |
404 | .omap2 = { | 400 | .omap2 = { |
@@ -417,10 +413,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = { | |||
417 | 413 | ||
418 | /* timer2 */ | 414 | /* timer2 */ |
419 | static struct omap_hwmod omap2430_timer2_hwmod; | 415 | static struct omap_hwmod omap2430_timer2_hwmod; |
420 | static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { | ||
421 | { .irq = 38, }, | ||
422 | { .irq = -1 } | ||
423 | }; | ||
424 | 416 | ||
425 | /* l4_core -> timer2 */ | 417 | /* l4_core -> timer2 */ |
426 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { | 418 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { |
@@ -439,7 +431,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { | |||
439 | /* timer2 hwmod */ | 431 | /* timer2 hwmod */ |
440 | static struct omap_hwmod omap2430_timer2_hwmod = { | 432 | static struct omap_hwmod omap2430_timer2_hwmod = { |
441 | .name = "timer2", | 433 | .name = "timer2", |
442 | .mpu_irqs = omap2430_timer2_mpu_irqs, | 434 | .mpu_irqs = omap2_timer2_mpu_irqs, |
443 | .main_clk = "gpt2_fck", | 435 | .main_clk = "gpt2_fck", |
444 | .prcm = { | 436 | .prcm = { |
445 | .omap2 = { | 437 | .omap2 = { |
@@ -458,10 +450,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = { | |||
458 | 450 | ||
459 | /* timer3 */ | 451 | /* timer3 */ |
460 | static struct omap_hwmod omap2430_timer3_hwmod; | 452 | static struct omap_hwmod omap2430_timer3_hwmod; |
461 | static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { | ||
462 | { .irq = 39, }, | ||
463 | { .irq = -1 } | ||
464 | }; | ||
465 | 453 | ||
466 | /* l4_core -> timer3 */ | 454 | /* l4_core -> timer3 */ |
467 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { | 455 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { |
@@ -480,7 +468,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { | |||
480 | /* timer3 hwmod */ | 468 | /* timer3 hwmod */ |
481 | static struct omap_hwmod omap2430_timer3_hwmod = { | 469 | static struct omap_hwmod omap2430_timer3_hwmod = { |
482 | .name = "timer3", | 470 | .name = "timer3", |
483 | .mpu_irqs = omap2430_timer3_mpu_irqs, | 471 | .mpu_irqs = omap2_timer3_mpu_irqs, |
484 | .main_clk = "gpt3_fck", | 472 | .main_clk = "gpt3_fck", |
485 | .prcm = { | 473 | .prcm = { |
486 | .omap2 = { | 474 | .omap2 = { |
@@ -499,10 +487,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = { | |||
499 | 487 | ||
500 | /* timer4 */ | 488 | /* timer4 */ |
501 | static struct omap_hwmod omap2430_timer4_hwmod; | 489 | static struct omap_hwmod omap2430_timer4_hwmod; |
502 | static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { | ||
503 | { .irq = 40, }, | ||
504 | { .irq = -1 } | ||
505 | }; | ||
506 | 490 | ||
507 | /* l4_core -> timer4 */ | 491 | /* l4_core -> timer4 */ |
508 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { | 492 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { |
@@ -521,7 +505,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { | |||
521 | /* timer4 hwmod */ | 505 | /* timer4 hwmod */ |
522 | static struct omap_hwmod omap2430_timer4_hwmod = { | 506 | static struct omap_hwmod omap2430_timer4_hwmod = { |
523 | .name = "timer4", | 507 | .name = "timer4", |
524 | .mpu_irqs = omap2430_timer4_mpu_irqs, | 508 | .mpu_irqs = omap2_timer4_mpu_irqs, |
525 | .main_clk = "gpt4_fck", | 509 | .main_clk = "gpt4_fck", |
526 | .prcm = { | 510 | .prcm = { |
527 | .omap2 = { | 511 | .omap2 = { |
@@ -540,10 +524,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = { | |||
540 | 524 | ||
541 | /* timer5 */ | 525 | /* timer5 */ |
542 | static struct omap_hwmod omap2430_timer5_hwmod; | 526 | static struct omap_hwmod omap2430_timer5_hwmod; |
543 | static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { | ||
544 | { .irq = 41, }, | ||
545 | { .irq = -1 } | ||
546 | }; | ||
547 | 527 | ||
548 | /* l4_core -> timer5 */ | 528 | /* l4_core -> timer5 */ |
549 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { | 529 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { |
@@ -562,7 +542,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { | |||
562 | /* timer5 hwmod */ | 542 | /* timer5 hwmod */ |
563 | static struct omap_hwmod omap2430_timer5_hwmod = { | 543 | static struct omap_hwmod omap2430_timer5_hwmod = { |
564 | .name = "timer5", | 544 | .name = "timer5", |
565 | .mpu_irqs = omap2430_timer5_mpu_irqs, | 545 | .mpu_irqs = omap2_timer5_mpu_irqs, |
566 | .main_clk = "gpt5_fck", | 546 | .main_clk = "gpt5_fck", |
567 | .prcm = { | 547 | .prcm = { |
568 | .omap2 = { | 548 | .omap2 = { |
@@ -581,10 +561,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = { | |||
581 | 561 | ||
582 | /* timer6 */ | 562 | /* timer6 */ |
583 | static struct omap_hwmod omap2430_timer6_hwmod; | 563 | static struct omap_hwmod omap2430_timer6_hwmod; |
584 | static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { | ||
585 | { .irq = 42, }, | ||
586 | { .irq = -1 } | ||
587 | }; | ||
588 | 564 | ||
589 | /* l4_core -> timer6 */ | 565 | /* l4_core -> timer6 */ |
590 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { | 566 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { |
@@ -603,7 +579,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { | |||
603 | /* timer6 hwmod */ | 579 | /* timer6 hwmod */ |
604 | static struct omap_hwmod omap2430_timer6_hwmod = { | 580 | static struct omap_hwmod omap2430_timer6_hwmod = { |
605 | .name = "timer6", | 581 | .name = "timer6", |
606 | .mpu_irqs = omap2430_timer6_mpu_irqs, | 582 | .mpu_irqs = omap2_timer6_mpu_irqs, |
607 | .main_clk = "gpt6_fck", | 583 | .main_clk = "gpt6_fck", |
608 | .prcm = { | 584 | .prcm = { |
609 | .omap2 = { | 585 | .omap2 = { |
@@ -622,10 +598,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = { | |||
622 | 598 | ||
623 | /* timer7 */ | 599 | /* timer7 */ |
624 | static struct omap_hwmod omap2430_timer7_hwmod; | 600 | static struct omap_hwmod omap2430_timer7_hwmod; |
625 | static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { | ||
626 | { .irq = 43, }, | ||
627 | { .irq = -1 } | ||
628 | }; | ||
629 | 601 | ||
630 | /* l4_core -> timer7 */ | 602 | /* l4_core -> timer7 */ |
631 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { | 603 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { |
@@ -644,7 +616,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { | |||
644 | /* timer7 hwmod */ | 616 | /* timer7 hwmod */ |
645 | static struct omap_hwmod omap2430_timer7_hwmod = { | 617 | static struct omap_hwmod omap2430_timer7_hwmod = { |
646 | .name = "timer7", | 618 | .name = "timer7", |
647 | .mpu_irqs = omap2430_timer7_mpu_irqs, | 619 | .mpu_irqs = omap2_timer7_mpu_irqs, |
648 | .main_clk = "gpt7_fck", | 620 | .main_clk = "gpt7_fck", |
649 | .prcm = { | 621 | .prcm = { |
650 | .omap2 = { | 622 | .omap2 = { |
@@ -663,10 +635,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = { | |||
663 | 635 | ||
664 | /* timer8 */ | 636 | /* timer8 */ |
665 | static struct omap_hwmod omap2430_timer8_hwmod; | 637 | static struct omap_hwmod omap2430_timer8_hwmod; |
666 | static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { | ||
667 | { .irq = 44, }, | ||
668 | { .irq = -1 } | ||
669 | }; | ||
670 | 638 | ||
671 | /* l4_core -> timer8 */ | 639 | /* l4_core -> timer8 */ |
672 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { | 640 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { |
@@ -685,7 +653,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { | |||
685 | /* timer8 hwmod */ | 653 | /* timer8 hwmod */ |
686 | static struct omap_hwmod omap2430_timer8_hwmod = { | 654 | static struct omap_hwmod omap2430_timer8_hwmod = { |
687 | .name = "timer8", | 655 | .name = "timer8", |
688 | .mpu_irqs = omap2430_timer8_mpu_irqs, | 656 | .mpu_irqs = omap2_timer8_mpu_irqs, |
689 | .main_clk = "gpt8_fck", | 657 | .main_clk = "gpt8_fck", |
690 | .prcm = { | 658 | .prcm = { |
691 | .omap2 = { | 659 | .omap2 = { |
@@ -704,10 +672,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = { | |||
704 | 672 | ||
705 | /* timer9 */ | 673 | /* timer9 */ |
706 | static struct omap_hwmod omap2430_timer9_hwmod; | 674 | static struct omap_hwmod omap2430_timer9_hwmod; |
707 | static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { | ||
708 | { .irq = 45, }, | ||
709 | { .irq = -1 } | ||
710 | }; | ||
711 | 675 | ||
712 | /* l4_core -> timer9 */ | 676 | /* l4_core -> timer9 */ |
713 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { | 677 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { |
@@ -726,7 +690,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { | |||
726 | /* timer9 hwmod */ | 690 | /* timer9 hwmod */ |
727 | static struct omap_hwmod omap2430_timer9_hwmod = { | 691 | static struct omap_hwmod omap2430_timer9_hwmod = { |
728 | .name = "timer9", | 692 | .name = "timer9", |
729 | .mpu_irqs = omap2430_timer9_mpu_irqs, | 693 | .mpu_irqs = omap2_timer9_mpu_irqs, |
730 | .main_clk = "gpt9_fck", | 694 | .main_clk = "gpt9_fck", |
731 | .prcm = { | 695 | .prcm = { |
732 | .omap2 = { | 696 | .omap2 = { |
@@ -745,10 +709,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = { | |||
745 | 709 | ||
746 | /* timer10 */ | 710 | /* timer10 */ |
747 | static struct omap_hwmod omap2430_timer10_hwmod; | 711 | static struct omap_hwmod omap2430_timer10_hwmod; |
748 | static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { | ||
749 | { .irq = 46, }, | ||
750 | { .irq = -1 } | ||
751 | }; | ||
752 | 712 | ||
753 | /* l4_core -> timer10 */ | 713 | /* l4_core -> timer10 */ |
754 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { | 714 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { |
@@ -767,7 +727,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { | |||
767 | /* timer10 hwmod */ | 727 | /* timer10 hwmod */ |
768 | static struct omap_hwmod omap2430_timer10_hwmod = { | 728 | static struct omap_hwmod omap2430_timer10_hwmod = { |
769 | .name = "timer10", | 729 | .name = "timer10", |
770 | .mpu_irqs = omap2430_timer10_mpu_irqs, | 730 | .mpu_irqs = omap2_timer10_mpu_irqs, |
771 | .main_clk = "gpt10_fck", | 731 | .main_clk = "gpt10_fck", |
772 | .prcm = { | 732 | .prcm = { |
773 | .omap2 = { | 733 | .omap2 = { |
@@ -786,10 +746,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = { | |||
786 | 746 | ||
787 | /* timer11 */ | 747 | /* timer11 */ |
788 | static struct omap_hwmod omap2430_timer11_hwmod; | 748 | static struct omap_hwmod omap2430_timer11_hwmod; |
789 | static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { | ||
790 | { .irq = 47, }, | ||
791 | { .irq = -1 } | ||
792 | }; | ||
793 | 749 | ||
794 | /* l4_core -> timer11 */ | 750 | /* l4_core -> timer11 */ |
795 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { | 751 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { |
@@ -808,7 +764,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { | |||
808 | /* timer11 hwmod */ | 764 | /* timer11 hwmod */ |
809 | static struct omap_hwmod omap2430_timer11_hwmod = { | 765 | static struct omap_hwmod omap2430_timer11_hwmod = { |
810 | .name = "timer11", | 766 | .name = "timer11", |
811 | .mpu_irqs = omap2430_timer11_mpu_irqs, | 767 | .mpu_irqs = omap2_timer11_mpu_irqs, |
812 | .main_clk = "gpt11_fck", | 768 | .main_clk = "gpt11_fck", |
813 | .prcm = { | 769 | .prcm = { |
814 | .omap2 = { | 770 | .omap2 = { |
@@ -827,10 +783,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = { | |||
827 | 783 | ||
828 | /* timer12 */ | 784 | /* timer12 */ |
829 | static struct omap_hwmod omap2430_timer12_hwmod; | 785 | static struct omap_hwmod omap2430_timer12_hwmod; |
830 | static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { | ||
831 | { .irq = 48, }, | ||
832 | { .irq = -1 } | ||
833 | }; | ||
834 | 786 | ||
835 | /* l4_core -> timer12 */ | 787 | /* l4_core -> timer12 */ |
836 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { | 788 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { |
@@ -849,7 +801,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { | |||
849 | /* timer12 hwmod */ | 801 | /* timer12 hwmod */ |
850 | static struct omap_hwmod omap2430_timer12_hwmod = { | 802 | static struct omap_hwmod omap2430_timer12_hwmod = { |
851 | .name = "timer12", | 803 | .name = "timer12", |
852 | .mpu_irqs = omap2430_timer12_mpu_irqs, | 804 | .mpu_irqs = omap2xxx_timer12_mpu_irqs, |
853 | .main_clk = "gpt12_fck", | 805 | .main_clk = "gpt12_fck", |
854 | .prcm = { | 806 | .prcm = { |
855 | .omap2 = { | 807 | .omap2 = { |
@@ -948,11 +900,6 @@ static struct omap_hwmod_class uart_class = { | |||
948 | 900 | ||
949 | /* UART1 */ | 901 | /* UART1 */ |
950 | 902 | ||
951 | static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
952 | { .irq = INT_24XX_UART1_IRQ, }, | ||
953 | { .irq = -1 } | ||
954 | }; | ||
955 | |||
956 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | 903 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { |
957 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | 904 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, |
958 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | 905 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, |
@@ -964,7 +911,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | |||
964 | 911 | ||
965 | static struct omap_hwmod omap2430_uart1_hwmod = { | 912 | static struct omap_hwmod omap2430_uart1_hwmod = { |
966 | .name = "uart1", | 913 | .name = "uart1", |
967 | .mpu_irqs = uart1_mpu_irqs, | 914 | .mpu_irqs = omap2_uart1_mpu_irqs, |
968 | .sdma_reqs = uart1_sdma_reqs, | 915 | .sdma_reqs = uart1_sdma_reqs, |
969 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | 916 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), |
970 | .main_clk = "uart1_fck", | 917 | .main_clk = "uart1_fck", |
@@ -985,11 +932,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | |||
985 | 932 | ||
986 | /* UART2 */ | 933 | /* UART2 */ |
987 | 934 | ||
988 | static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
989 | { .irq = INT_24XX_UART2_IRQ, }, | ||
990 | { .irq = -1 } | ||
991 | }; | ||
992 | |||
993 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | 935 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { |
994 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | 936 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, |
995 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | 937 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, |
@@ -1001,7 +943,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { | |||
1001 | 943 | ||
1002 | static struct omap_hwmod omap2430_uart2_hwmod = { | 944 | static struct omap_hwmod omap2430_uart2_hwmod = { |
1003 | .name = "uart2", | 945 | .name = "uart2", |
1004 | .mpu_irqs = uart2_mpu_irqs, | 946 | .mpu_irqs = omap2_uart2_mpu_irqs, |
1005 | .sdma_reqs = uart2_sdma_reqs, | 947 | .sdma_reqs = uart2_sdma_reqs, |
1006 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | 948 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), |
1007 | .main_clk = "uart2_fck", | 949 | .main_clk = "uart2_fck", |
@@ -1022,11 +964,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | |||
1022 | 964 | ||
1023 | /* UART3 */ | 965 | /* UART3 */ |
1024 | 966 | ||
1025 | static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
1026 | { .irq = INT_24XX_UART3_IRQ, }, | ||
1027 | { .irq = -1 } | ||
1028 | }; | ||
1029 | |||
1030 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | 967 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { |
1031 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | 968 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, |
1032 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | 969 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, |
@@ -1038,7 +975,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { | |||
1038 | 975 | ||
1039 | static struct omap_hwmod omap2430_uart3_hwmod = { | 976 | static struct omap_hwmod omap2430_uart3_hwmod = { |
1040 | .name = "uart3", | 977 | .name = "uart3", |
1041 | .mpu_irqs = uart3_mpu_irqs, | 978 | .mpu_irqs = omap2_uart3_mpu_irqs, |
1042 | .sdma_reqs = uart3_sdma_reqs, | 979 | .sdma_reqs = uart3_sdma_reqs, |
1043 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | 980 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), |
1044 | .main_clk = "uart3_fck", | 981 | .main_clk = "uart3_fck", |
@@ -1150,11 +1087,6 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { | |||
1150 | .sysc = &omap2430_dispc_sysc, | 1087 | .sysc = &omap2430_dispc_sysc, |
1151 | }; | 1088 | }; |
1152 | 1089 | ||
1153 | static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { | ||
1154 | { .irq = 25 }, | ||
1155 | { .irq = -1 } | ||
1156 | }; | ||
1157 | |||
1158 | /* l4_core -> dss_dispc */ | 1090 | /* l4_core -> dss_dispc */ |
1159 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { | 1091 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { |
1160 | .master = &omap2430_l4_core_hwmod, | 1092 | .master = &omap2430_l4_core_hwmod, |
@@ -1172,7 +1104,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { | |||
1172 | static struct omap_hwmod omap2430_dss_dispc_hwmod = { | 1104 | static struct omap_hwmod omap2430_dss_dispc_hwmod = { |
1173 | .name = "dss_dispc", | 1105 | .name = "dss_dispc", |
1174 | .class = &omap2430_dispc_hwmod_class, | 1106 | .class = &omap2430_dispc_hwmod_class, |
1175 | .mpu_irqs = omap2430_dispc_irqs, | 1107 | .mpu_irqs = omap2_dispc_irqs, |
1176 | .main_clk = "dss1_fck", | 1108 | .main_clk = "dss1_fck", |
1177 | .prcm = { | 1109 | .prcm = { |
1178 | .omap2 = { | 1110 | .omap2 = { |
@@ -1302,11 +1234,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { | |||
1302 | 1234 | ||
1303 | /* I2C1 */ | 1235 | /* I2C1 */ |
1304 | 1236 | ||
1305 | static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
1306 | { .irq = INT_24XX_I2C1_IRQ, }, | ||
1307 | { .irq = -1 } | ||
1308 | }; | ||
1309 | |||
1310 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | 1237 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { |
1311 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | 1238 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, |
1312 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | 1239 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, |
@@ -1318,7 +1245,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | |||
1318 | 1245 | ||
1319 | static struct omap_hwmod omap2430_i2c1_hwmod = { | 1246 | static struct omap_hwmod omap2430_i2c1_hwmod = { |
1320 | .name = "i2c1", | 1247 | .name = "i2c1", |
1321 | .mpu_irqs = i2c1_mpu_irqs, | 1248 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
1322 | .sdma_reqs = i2c1_sdma_reqs, | 1249 | .sdma_reqs = i2c1_sdma_reqs, |
1323 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | 1250 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), |
1324 | .main_clk = "i2chs1_fck", | 1251 | .main_clk = "i2chs1_fck", |
@@ -1348,11 +1275,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | |||
1348 | 1275 | ||
1349 | /* I2C2 */ | 1276 | /* I2C2 */ |
1350 | 1277 | ||
1351 | static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
1352 | { .irq = INT_24XX_I2C2_IRQ, }, | ||
1353 | { .irq = -1 } | ||
1354 | }; | ||
1355 | |||
1356 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | 1278 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { |
1357 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | 1279 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, |
1358 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | 1280 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, |
@@ -1364,7 +1286,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | |||
1364 | 1286 | ||
1365 | static struct omap_hwmod omap2430_i2c2_hwmod = { | 1287 | static struct omap_hwmod omap2430_i2c2_hwmod = { |
1366 | .name = "i2c2", | 1288 | .name = "i2c2", |
1367 | .mpu_irqs = i2c2_mpu_irqs, | 1289 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
1368 | .sdma_reqs = i2c2_sdma_reqs, | 1290 | .sdma_reqs = i2c2_sdma_reqs, |
1369 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | 1291 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), |
1370 | .main_clk = "i2chs2_fck", | 1292 | .main_clk = "i2chs2_fck", |
@@ -1502,11 +1424,6 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { | |||
1502 | }; | 1424 | }; |
1503 | 1425 | ||
1504 | /* gpio1 */ | 1426 | /* gpio1 */ |
1505 | static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { | ||
1506 | { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
1507 | { .irq = -1 } | ||
1508 | }; | ||
1509 | |||
1510 | static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | 1427 | static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { |
1511 | &omap2430_l4_wkup__gpio1, | 1428 | &omap2430_l4_wkup__gpio1, |
1512 | }; | 1429 | }; |
@@ -1514,7 +1431,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | |||
1514 | static struct omap_hwmod omap2430_gpio1_hwmod = { | 1431 | static struct omap_hwmod omap2430_gpio1_hwmod = { |
1515 | .name = "gpio1", | 1432 | .name = "gpio1", |
1516 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1433 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1517 | .mpu_irqs = omap243x_gpio1_irqs, | 1434 | .mpu_irqs = omap2_gpio1_irqs, |
1518 | .main_clk = "gpios_fck", | 1435 | .main_clk = "gpios_fck", |
1519 | .prcm = { | 1436 | .prcm = { |
1520 | .omap2 = { | 1437 | .omap2 = { |
@@ -1533,11 +1450,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { | |||
1533 | }; | 1450 | }; |
1534 | 1451 | ||
1535 | /* gpio2 */ | 1452 | /* gpio2 */ |
1536 | static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { | ||
1537 | { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
1538 | { .irq = -1 } | ||
1539 | }; | ||
1540 | |||
1541 | static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | 1453 | static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { |
1542 | &omap2430_l4_wkup__gpio2, | 1454 | &omap2430_l4_wkup__gpio2, |
1543 | }; | 1455 | }; |
@@ -1545,7 +1457,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | |||
1545 | static struct omap_hwmod omap2430_gpio2_hwmod = { | 1457 | static struct omap_hwmod omap2430_gpio2_hwmod = { |
1546 | .name = "gpio2", | 1458 | .name = "gpio2", |
1547 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1459 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1548 | .mpu_irqs = omap243x_gpio2_irqs, | 1460 | .mpu_irqs = omap2_gpio2_irqs, |
1549 | .main_clk = "gpios_fck", | 1461 | .main_clk = "gpios_fck", |
1550 | .prcm = { | 1462 | .prcm = { |
1551 | .omap2 = { | 1463 | .omap2 = { |
@@ -1564,11 +1476,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { | |||
1564 | }; | 1476 | }; |
1565 | 1477 | ||
1566 | /* gpio3 */ | 1478 | /* gpio3 */ |
1567 | static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { | ||
1568 | { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
1569 | { .irq = -1 } | ||
1570 | }; | ||
1571 | |||
1572 | static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | 1479 | static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { |
1573 | &omap2430_l4_wkup__gpio3, | 1480 | &omap2430_l4_wkup__gpio3, |
1574 | }; | 1481 | }; |
@@ -1576,7 +1483,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | |||
1576 | static struct omap_hwmod omap2430_gpio3_hwmod = { | 1483 | static struct omap_hwmod omap2430_gpio3_hwmod = { |
1577 | .name = "gpio3", | 1484 | .name = "gpio3", |
1578 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1485 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1579 | .mpu_irqs = omap243x_gpio3_irqs, | 1486 | .mpu_irqs = omap2_gpio3_irqs, |
1580 | .main_clk = "gpios_fck", | 1487 | .main_clk = "gpios_fck", |
1581 | .prcm = { | 1488 | .prcm = { |
1582 | .omap2 = { | 1489 | .omap2 = { |
@@ -1595,11 +1502,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { | |||
1595 | }; | 1502 | }; |
1596 | 1503 | ||
1597 | /* gpio4 */ | 1504 | /* gpio4 */ |
1598 | static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { | ||
1599 | { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
1600 | { .irq = -1 } | ||
1601 | }; | ||
1602 | |||
1603 | static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | 1505 | static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { |
1604 | &omap2430_l4_wkup__gpio4, | 1506 | &omap2430_l4_wkup__gpio4, |
1605 | }; | 1507 | }; |
@@ -1607,7 +1509,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | |||
1607 | static struct omap_hwmod omap2430_gpio4_hwmod = { | 1509 | static struct omap_hwmod omap2430_gpio4_hwmod = { |
1608 | .name = "gpio4", | 1510 | .name = "gpio4", |
1609 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1511 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1610 | .mpu_irqs = omap243x_gpio4_irqs, | 1512 | .mpu_irqs = omap2_gpio4_irqs, |
1611 | .main_clk = "gpios_fck", | 1513 | .main_clk = "gpios_fck", |
1612 | .prcm = { | 1514 | .prcm = { |
1613 | .omap2 = { | 1515 | .omap2 = { |
@@ -1680,14 +1582,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { | |||
1680 | .lch_count = 32, | 1582 | .lch_count = 32, |
1681 | }; | 1583 | }; |
1682 | 1584 | ||
1683 | static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { | ||
1684 | { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
1685 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
1686 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
1687 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
1688 | { .irq = -1 } | ||
1689 | }; | ||
1690 | |||
1691 | /* dma_system -> L3 */ | 1585 | /* dma_system -> L3 */ |
1692 | static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { | 1586 | static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { |
1693 | .master = &omap2430_dma_system_hwmod, | 1587 | .master = &omap2430_dma_system_hwmod, |
@@ -1718,7 +1612,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { | |||
1718 | static struct omap_hwmod omap2430_dma_system_hwmod = { | 1612 | static struct omap_hwmod omap2430_dma_system_hwmod = { |
1719 | .name = "dma", | 1613 | .name = "dma", |
1720 | .class = &omap2430_dma_hwmod_class, | 1614 | .class = &omap2430_dma_hwmod_class, |
1721 | .mpu_irqs = omap2430_dma_system_irqs, | 1615 | .mpu_irqs = omap2_dma_system_irqs, |
1722 | .main_clk = "core_l3_ck", | 1616 | .main_clk = "core_l3_ck", |
1723 | .slaves = omap2430_dma_system_slaves, | 1617 | .slaves = omap2430_dma_system_slaves, |
1724 | .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), | 1618 | .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), |
@@ -1813,11 +1707,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { | |||
1813 | }; | 1707 | }; |
1814 | 1708 | ||
1815 | /* mcspi1 */ | 1709 | /* mcspi1 */ |
1816 | static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { | ||
1817 | { .irq = 65 }, | ||
1818 | { .irq = -1 } | ||
1819 | }; | ||
1820 | |||
1821 | static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { | 1710 | static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { |
1822 | { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | 1711 | { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ |
1823 | { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | 1712 | { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ |
@@ -1839,7 +1728,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | |||
1839 | 1728 | ||
1840 | static struct omap_hwmod omap2430_mcspi1_hwmod = { | 1729 | static struct omap_hwmod omap2430_mcspi1_hwmod = { |
1841 | .name = "mcspi1_hwmod", | 1730 | .name = "mcspi1_hwmod", |
1842 | .mpu_irqs = omap2430_mcspi1_mpu_irqs, | 1731 | .mpu_irqs = omap2_mcspi1_mpu_irqs, |
1843 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, | 1732 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, |
1844 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), | 1733 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), |
1845 | .main_clk = "mcspi1_fck", | 1734 | .main_clk = "mcspi1_fck", |
@@ -1860,11 +1749,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { | |||
1860 | }; | 1749 | }; |
1861 | 1750 | ||
1862 | /* mcspi2 */ | 1751 | /* mcspi2 */ |
1863 | static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { | ||
1864 | { .irq = 66 }, | ||
1865 | { .irq = -1 } | ||
1866 | }; | ||
1867 | |||
1868 | static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { | 1752 | static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { |
1869 | { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | 1753 | { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ |
1870 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | 1754 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ |
@@ -1882,7 +1766,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | |||
1882 | 1766 | ||
1883 | static struct omap_hwmod omap2430_mcspi2_hwmod = { | 1767 | static struct omap_hwmod omap2430_mcspi2_hwmod = { |
1884 | .name = "mcspi2_hwmod", | 1768 | .name = "mcspi2_hwmod", |
1885 | .mpu_irqs = omap2430_mcspi2_mpu_irqs, | 1769 | .mpu_irqs = omap2_mcspi2_mpu_irqs, |
1886 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, | 1770 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, |
1887 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), | 1771 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), |
1888 | .main_clk = "mcspi2_fck", | 1772 | .main_clk = "mcspi2_fck", |