diff options
author | Paul Walmsley <paul@pwsan.com> | 2011-07-09 21:14:07 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-07-09 21:14:07 -0400 |
commit | 0d619a89998d308c48d06b033eccb7374c456f12 (patch) | |
tree | a4145d0529652167a083ed084c4ff8555f5b5178 | |
parent | 212738a4499d278254ed6fdb400e3b4be4cb1de2 (diff) |
omap_hwmod: share identical omap_hwmod_mpu_irqs arrays
To reduce kernel source file data duplication, share struct
omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r-- | arch/arm/mach-omap2/Makefile | 11 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 166 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 142 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 162 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_common_data.h | 29 |
7 files changed, 275 insertions, 423 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8a75d176ec6c..f34336560437 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -145,13 +145,18 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o | |||
145 | obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o | 145 | obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o |
146 | 146 | ||
147 | # hwmod data | 147 | # hwmod data |
148 | obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ | 148 | obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \ |
149 | omap_hwmod_2xxx_3xxx_ipblock_data.o \ | ||
150 | omap_hwmod_2xxx_interconnect_data.o \ | ||
149 | omap_hwmod_2xxx_3xxx_interconnect_data.o \ | 151 | omap_hwmod_2xxx_3xxx_interconnect_data.o \ |
150 | omap_hwmod_2420_data.o | 152 | omap_hwmod_2420_data.o |
151 | obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ | 153 | obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \ |
154 | omap_hwmod_2xxx_3xxx_ipblock_data.o \ | ||
155 | omap_hwmod_2xxx_interconnect_data.o \ | ||
152 | omap_hwmod_2xxx_3xxx_interconnect_data.o \ | 156 | omap_hwmod_2xxx_3xxx_interconnect_data.o \ |
153 | omap_hwmod_2430_data.o | 157 | omap_hwmod_2430_data.o |
154 | obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ | 158 | obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \ |
159 | omap_hwmod_2xxx_3xxx_interconnect_data.o \ | ||
155 | omap_hwmod_3xxx_data.o | 160 | omap_hwmod_3xxx_data.o |
156 | obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o | 161 | obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o |
157 | 162 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 04730d33ba5c..73157eef2590 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -294,10 +294,6 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { | |||
294 | 294 | ||
295 | /* timer1 */ | 295 | /* timer1 */ |
296 | static struct omap_hwmod omap2420_timer1_hwmod; | 296 | static struct omap_hwmod omap2420_timer1_hwmod; |
297 | static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { | ||
298 | { .irq = 37, }, | ||
299 | { .irq = -1 } | ||
300 | }; | ||
301 | 297 | ||
302 | static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { | 298 | static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { |
303 | { | 299 | { |
@@ -325,7 +321,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { | |||
325 | /* timer1 hwmod */ | 321 | /* timer1 hwmod */ |
326 | static struct omap_hwmod omap2420_timer1_hwmod = { | 322 | static struct omap_hwmod omap2420_timer1_hwmod = { |
327 | .name = "timer1", | 323 | .name = "timer1", |
328 | .mpu_irqs = omap2420_timer1_mpu_irqs, | 324 | .mpu_irqs = omap2_timer1_mpu_irqs, |
329 | .main_clk = "gpt1_fck", | 325 | .main_clk = "gpt1_fck", |
330 | .prcm = { | 326 | .prcm = { |
331 | .omap2 = { | 327 | .omap2 = { |
@@ -344,11 +340,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = { | |||
344 | 340 | ||
345 | /* timer2 */ | 341 | /* timer2 */ |
346 | static struct omap_hwmod omap2420_timer2_hwmod; | 342 | static struct omap_hwmod omap2420_timer2_hwmod; |
347 | static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { | ||
348 | { .irq = 38, }, | ||
349 | { .irq = -1 } | ||
350 | }; | ||
351 | |||
352 | 343 | ||
353 | /* l4_core -> timer2 */ | 344 | /* l4_core -> timer2 */ |
354 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { | 345 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { |
@@ -367,7 +358,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { | |||
367 | /* timer2 hwmod */ | 358 | /* timer2 hwmod */ |
368 | static struct omap_hwmod omap2420_timer2_hwmod = { | 359 | static struct omap_hwmod omap2420_timer2_hwmod = { |
369 | .name = "timer2", | 360 | .name = "timer2", |
370 | .mpu_irqs = omap2420_timer2_mpu_irqs, | 361 | .mpu_irqs = omap2_timer2_mpu_irqs, |
371 | .main_clk = "gpt2_fck", | 362 | .main_clk = "gpt2_fck", |
372 | .prcm = { | 363 | .prcm = { |
373 | .omap2 = { | 364 | .omap2 = { |
@@ -386,10 +377,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = { | |||
386 | 377 | ||
387 | /* timer3 */ | 378 | /* timer3 */ |
388 | static struct omap_hwmod omap2420_timer3_hwmod; | 379 | static struct omap_hwmod omap2420_timer3_hwmod; |
389 | static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { | ||
390 | { .irq = 39, }, | ||
391 | { .irq = -1 } | ||
392 | }; | ||
393 | 380 | ||
394 | /* l4_core -> timer3 */ | 381 | /* l4_core -> timer3 */ |
395 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { | 382 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { |
@@ -408,7 +395,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { | |||
408 | /* timer3 hwmod */ | 395 | /* timer3 hwmod */ |
409 | static struct omap_hwmod omap2420_timer3_hwmod = { | 396 | static struct omap_hwmod omap2420_timer3_hwmod = { |
410 | .name = "timer3", | 397 | .name = "timer3", |
411 | .mpu_irqs = omap2420_timer3_mpu_irqs, | 398 | .mpu_irqs = omap2_timer3_mpu_irqs, |
412 | .main_clk = "gpt3_fck", | 399 | .main_clk = "gpt3_fck", |
413 | .prcm = { | 400 | .prcm = { |
414 | .omap2 = { | 401 | .omap2 = { |
@@ -427,10 +414,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = { | |||
427 | 414 | ||
428 | /* timer4 */ | 415 | /* timer4 */ |
429 | static struct omap_hwmod omap2420_timer4_hwmod; | 416 | static struct omap_hwmod omap2420_timer4_hwmod; |
430 | static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { | ||
431 | { .irq = 40, }, | ||
432 | { .irq = -1 } | ||
433 | }; | ||
434 | 417 | ||
435 | /* l4_core -> timer4 */ | 418 | /* l4_core -> timer4 */ |
436 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { | 419 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { |
@@ -449,7 +432,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { | |||
449 | /* timer4 hwmod */ | 432 | /* timer4 hwmod */ |
450 | static struct omap_hwmod omap2420_timer4_hwmod = { | 433 | static struct omap_hwmod omap2420_timer4_hwmod = { |
451 | .name = "timer4", | 434 | .name = "timer4", |
452 | .mpu_irqs = omap2420_timer4_mpu_irqs, | 435 | .mpu_irqs = omap2_timer4_mpu_irqs, |
453 | .main_clk = "gpt4_fck", | 436 | .main_clk = "gpt4_fck", |
454 | .prcm = { | 437 | .prcm = { |
455 | .omap2 = { | 438 | .omap2 = { |
@@ -468,10 +451,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = { | |||
468 | 451 | ||
469 | /* timer5 */ | 452 | /* timer5 */ |
470 | static struct omap_hwmod omap2420_timer5_hwmod; | 453 | static struct omap_hwmod omap2420_timer5_hwmod; |
471 | static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { | ||
472 | { .irq = 41, }, | ||
473 | { .irq = -1 } | ||
474 | }; | ||
475 | 454 | ||
476 | /* l4_core -> timer5 */ | 455 | /* l4_core -> timer5 */ |
477 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { | 456 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { |
@@ -490,7 +469,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { | |||
490 | /* timer5 hwmod */ | 469 | /* timer5 hwmod */ |
491 | static struct omap_hwmod omap2420_timer5_hwmod = { | 470 | static struct omap_hwmod omap2420_timer5_hwmod = { |
492 | .name = "timer5", | 471 | .name = "timer5", |
493 | .mpu_irqs = omap2420_timer5_mpu_irqs, | 472 | .mpu_irqs = omap2_timer5_mpu_irqs, |
494 | .main_clk = "gpt5_fck", | 473 | .main_clk = "gpt5_fck", |
495 | .prcm = { | 474 | .prcm = { |
496 | .omap2 = { | 475 | .omap2 = { |
@@ -510,10 +489,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = { | |||
510 | 489 | ||
511 | /* timer6 */ | 490 | /* timer6 */ |
512 | static struct omap_hwmod omap2420_timer6_hwmod; | 491 | static struct omap_hwmod omap2420_timer6_hwmod; |
513 | static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { | ||
514 | { .irq = 42, }, | ||
515 | { .irq = -1 } | ||
516 | }; | ||
517 | 492 | ||
518 | /* l4_core -> timer6 */ | 493 | /* l4_core -> timer6 */ |
519 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { | 494 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { |
@@ -532,7 +507,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { | |||
532 | /* timer6 hwmod */ | 507 | /* timer6 hwmod */ |
533 | static struct omap_hwmod omap2420_timer6_hwmod = { | 508 | static struct omap_hwmod omap2420_timer6_hwmod = { |
534 | .name = "timer6", | 509 | .name = "timer6", |
535 | .mpu_irqs = omap2420_timer6_mpu_irqs, | 510 | .mpu_irqs = omap2_timer6_mpu_irqs, |
536 | .main_clk = "gpt6_fck", | 511 | .main_clk = "gpt6_fck", |
537 | .prcm = { | 512 | .prcm = { |
538 | .omap2 = { | 513 | .omap2 = { |
@@ -551,10 +526,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = { | |||
551 | 526 | ||
552 | /* timer7 */ | 527 | /* timer7 */ |
553 | static struct omap_hwmod omap2420_timer7_hwmod; | 528 | static struct omap_hwmod omap2420_timer7_hwmod; |
554 | static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { | ||
555 | { .irq = 43, }, | ||
556 | { .irq = -1 } | ||
557 | }; | ||
558 | 529 | ||
559 | /* l4_core -> timer7 */ | 530 | /* l4_core -> timer7 */ |
560 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { | 531 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { |
@@ -573,7 +544,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { | |||
573 | /* timer7 hwmod */ | 544 | /* timer7 hwmod */ |
574 | static struct omap_hwmod omap2420_timer7_hwmod = { | 545 | static struct omap_hwmod omap2420_timer7_hwmod = { |
575 | .name = "timer7", | 546 | .name = "timer7", |
576 | .mpu_irqs = omap2420_timer7_mpu_irqs, | 547 | .mpu_irqs = omap2_timer7_mpu_irqs, |
577 | .main_clk = "gpt7_fck", | 548 | .main_clk = "gpt7_fck", |
578 | .prcm = { | 549 | .prcm = { |
579 | .omap2 = { | 550 | .omap2 = { |
@@ -592,10 +563,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = { | |||
592 | 563 | ||
593 | /* timer8 */ | 564 | /* timer8 */ |
594 | static struct omap_hwmod omap2420_timer8_hwmod; | 565 | static struct omap_hwmod omap2420_timer8_hwmod; |
595 | static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { | ||
596 | { .irq = 44, }, | ||
597 | { .irq = -1 } | ||
598 | }; | ||
599 | 566 | ||
600 | /* l4_core -> timer8 */ | 567 | /* l4_core -> timer8 */ |
601 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { | 568 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { |
@@ -614,7 +581,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { | |||
614 | /* timer8 hwmod */ | 581 | /* timer8 hwmod */ |
615 | static struct omap_hwmod omap2420_timer8_hwmod = { | 582 | static struct omap_hwmod omap2420_timer8_hwmod = { |
616 | .name = "timer8", | 583 | .name = "timer8", |
617 | .mpu_irqs = omap2420_timer8_mpu_irqs, | 584 | .mpu_irqs = omap2_timer8_mpu_irqs, |
618 | .main_clk = "gpt8_fck", | 585 | .main_clk = "gpt8_fck", |
619 | .prcm = { | 586 | .prcm = { |
620 | .omap2 = { | 587 | .omap2 = { |
@@ -633,10 +600,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = { | |||
633 | 600 | ||
634 | /* timer9 */ | 601 | /* timer9 */ |
635 | static struct omap_hwmod omap2420_timer9_hwmod; | 602 | static struct omap_hwmod omap2420_timer9_hwmod; |
636 | static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { | ||
637 | { .irq = 45, }, | ||
638 | { .irq = -1 } | ||
639 | }; | ||
640 | 603 | ||
641 | /* l4_core -> timer9 */ | 604 | /* l4_core -> timer9 */ |
642 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { | 605 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { |
@@ -655,7 +618,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { | |||
655 | /* timer9 hwmod */ | 618 | /* timer9 hwmod */ |
656 | static struct omap_hwmod omap2420_timer9_hwmod = { | 619 | static struct omap_hwmod omap2420_timer9_hwmod = { |
657 | .name = "timer9", | 620 | .name = "timer9", |
658 | .mpu_irqs = omap2420_timer9_mpu_irqs, | 621 | .mpu_irqs = omap2_timer9_mpu_irqs, |
659 | .main_clk = "gpt9_fck", | 622 | .main_clk = "gpt9_fck", |
660 | .prcm = { | 623 | .prcm = { |
661 | .omap2 = { | 624 | .omap2 = { |
@@ -674,10 +637,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = { | |||
674 | 637 | ||
675 | /* timer10 */ | 638 | /* timer10 */ |
676 | static struct omap_hwmod omap2420_timer10_hwmod; | 639 | static struct omap_hwmod omap2420_timer10_hwmod; |
677 | static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { | ||
678 | { .irq = 46, }, | ||
679 | { .irq = -1 } | ||
680 | }; | ||
681 | 640 | ||
682 | /* l4_core -> timer10 */ | 641 | /* l4_core -> timer10 */ |
683 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { | 642 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { |
@@ -696,7 +655,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { | |||
696 | /* timer10 hwmod */ | 655 | /* timer10 hwmod */ |
697 | static struct omap_hwmod omap2420_timer10_hwmod = { | 656 | static struct omap_hwmod omap2420_timer10_hwmod = { |
698 | .name = "timer10", | 657 | .name = "timer10", |
699 | .mpu_irqs = omap2420_timer10_mpu_irqs, | 658 | .mpu_irqs = omap2_timer10_mpu_irqs, |
700 | .main_clk = "gpt10_fck", | 659 | .main_clk = "gpt10_fck", |
701 | .prcm = { | 660 | .prcm = { |
702 | .omap2 = { | 661 | .omap2 = { |
@@ -715,10 +674,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = { | |||
715 | 674 | ||
716 | /* timer11 */ | 675 | /* timer11 */ |
717 | static struct omap_hwmod omap2420_timer11_hwmod; | 676 | static struct omap_hwmod omap2420_timer11_hwmod; |
718 | static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { | ||
719 | { .irq = 47, }, | ||
720 | { .irq = -1 } | ||
721 | }; | ||
722 | 677 | ||
723 | /* l4_core -> timer11 */ | 678 | /* l4_core -> timer11 */ |
724 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { | 679 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { |
@@ -737,7 +692,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { | |||
737 | /* timer11 hwmod */ | 692 | /* timer11 hwmod */ |
738 | static struct omap_hwmod omap2420_timer11_hwmod = { | 693 | static struct omap_hwmod omap2420_timer11_hwmod = { |
739 | .name = "timer11", | 694 | .name = "timer11", |
740 | .mpu_irqs = omap2420_timer11_mpu_irqs, | 695 | .mpu_irqs = omap2_timer11_mpu_irqs, |
741 | .main_clk = "gpt11_fck", | 696 | .main_clk = "gpt11_fck", |
742 | .prcm = { | 697 | .prcm = { |
743 | .omap2 = { | 698 | .omap2 = { |
@@ -756,10 +711,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = { | |||
756 | 711 | ||
757 | /* timer12 */ | 712 | /* timer12 */ |
758 | static struct omap_hwmod omap2420_timer12_hwmod; | 713 | static struct omap_hwmod omap2420_timer12_hwmod; |
759 | static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { | ||
760 | { .irq = 48, }, | ||
761 | { .irq = -1 } | ||
762 | }; | ||
763 | 714 | ||
764 | /* l4_core -> timer12 */ | 715 | /* l4_core -> timer12 */ |
765 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { | 716 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { |
@@ -778,7 +729,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { | |||
778 | /* timer12 hwmod */ | 729 | /* timer12 hwmod */ |
779 | static struct omap_hwmod omap2420_timer12_hwmod = { | 730 | static struct omap_hwmod omap2420_timer12_hwmod = { |
780 | .name = "timer12", | 731 | .name = "timer12", |
781 | .mpu_irqs = omap2420_timer12_mpu_irqs, | 732 | .mpu_irqs = omap2xxx_timer12_mpu_irqs, |
782 | .main_clk = "gpt12_fck", | 733 | .main_clk = "gpt12_fck", |
783 | .prcm = { | 734 | .prcm = { |
784 | .omap2 = { | 735 | .omap2 = { |
@@ -877,11 +828,6 @@ static struct omap_hwmod_class uart_class = { | |||
877 | 828 | ||
878 | /* UART1 */ | 829 | /* UART1 */ |
879 | 830 | ||
880 | static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
881 | { .irq = INT_24XX_UART1_IRQ, }, | ||
882 | { .irq = -1 } | ||
883 | }; | ||
884 | |||
885 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | 831 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { |
886 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | 832 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, |
887 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | 833 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, |
@@ -893,7 +839,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { | |||
893 | 839 | ||
894 | static struct omap_hwmod omap2420_uart1_hwmod = { | 840 | static struct omap_hwmod omap2420_uart1_hwmod = { |
895 | .name = "uart1", | 841 | .name = "uart1", |
896 | .mpu_irqs = uart1_mpu_irqs, | 842 | .mpu_irqs = omap2_uart1_mpu_irqs, |
897 | .sdma_reqs = uart1_sdma_reqs, | 843 | .sdma_reqs = uart1_sdma_reqs, |
898 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | 844 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), |
899 | .main_clk = "uart1_fck", | 845 | .main_clk = "uart1_fck", |
@@ -914,11 +860,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | |||
914 | 860 | ||
915 | /* UART2 */ | 861 | /* UART2 */ |
916 | 862 | ||
917 | static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
918 | { .irq = INT_24XX_UART2_IRQ, }, | ||
919 | { .irq = -1 } | ||
920 | }; | ||
921 | |||
922 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | 863 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { |
923 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | 864 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, |
924 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | 865 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, |
@@ -930,7 +871,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { | |||
930 | 871 | ||
931 | static struct omap_hwmod omap2420_uart2_hwmod = { | 872 | static struct omap_hwmod omap2420_uart2_hwmod = { |
932 | .name = "uart2", | 873 | .name = "uart2", |
933 | .mpu_irqs = uart2_mpu_irqs, | 874 | .mpu_irqs = omap2_uart2_mpu_irqs, |
934 | .sdma_reqs = uart2_sdma_reqs, | 875 | .sdma_reqs = uart2_sdma_reqs, |
935 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | 876 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), |
936 | .main_clk = "uart2_fck", | 877 | .main_clk = "uart2_fck", |
@@ -951,11 +892,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | |||
951 | 892 | ||
952 | /* UART3 */ | 893 | /* UART3 */ |
953 | 894 | ||
954 | static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
955 | { .irq = INT_24XX_UART3_IRQ, }, | ||
956 | { .irq = -1 } | ||
957 | }; | ||
958 | |||
959 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | 895 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { |
960 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | 896 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, |
961 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | 897 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, |
@@ -967,7 +903,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { | |||
967 | 903 | ||
968 | static struct omap_hwmod omap2420_uart3_hwmod = { | 904 | static struct omap_hwmod omap2420_uart3_hwmod = { |
969 | .name = "uart3", | 905 | .name = "uart3", |
970 | .mpu_irqs = uart3_mpu_irqs, | 906 | .mpu_irqs = omap2_uart3_mpu_irqs, |
971 | .sdma_reqs = uart3_sdma_reqs, | 907 | .sdma_reqs = uart3_sdma_reqs, |
972 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | 908 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), |
973 | .main_clk = "uart3_fck", | 909 | .main_clk = "uart3_fck", |
@@ -1085,11 +1021,6 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { | |||
1085 | .sysc = &omap2420_dispc_sysc, | 1021 | .sysc = &omap2420_dispc_sysc, |
1086 | }; | 1022 | }; |
1087 | 1023 | ||
1088 | static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { | ||
1089 | { .irq = 25 }, | ||
1090 | { .irq = -1 } | ||
1091 | }; | ||
1092 | |||
1093 | /* l4_core -> dss_dispc */ | 1024 | /* l4_core -> dss_dispc */ |
1094 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { | 1025 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { |
1095 | .master = &omap2420_l4_core_hwmod, | 1026 | .master = &omap2420_l4_core_hwmod, |
@@ -1113,7 +1044,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { | |||
1113 | static struct omap_hwmod omap2420_dss_dispc_hwmod = { | 1044 | static struct omap_hwmod omap2420_dss_dispc_hwmod = { |
1114 | .name = "dss_dispc", | 1045 | .name = "dss_dispc", |
1115 | .class = &omap2420_dispc_hwmod_class, | 1046 | .class = &omap2420_dispc_hwmod_class, |
1116 | .mpu_irqs = omap2420_dispc_irqs, | 1047 | .mpu_irqs = omap2_dispc_irqs, |
1117 | .main_clk = "dss1_fck", | 1048 | .main_clk = "dss1_fck", |
1118 | .prcm = { | 1049 | .prcm = { |
1119 | .omap2 = { | 1050 | .omap2 = { |
@@ -1252,11 +1183,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; | |||
1252 | 1183 | ||
1253 | /* I2C1 */ | 1184 | /* I2C1 */ |
1254 | 1185 | ||
1255 | static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
1256 | { .irq = INT_24XX_I2C1_IRQ, }, | ||
1257 | { .irq = -1 } | ||
1258 | }; | ||
1259 | |||
1260 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | 1186 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { |
1261 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | 1187 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, |
1262 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | 1188 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, |
@@ -1268,7 +1194,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { | |||
1268 | 1194 | ||
1269 | static struct omap_hwmod omap2420_i2c1_hwmod = { | 1195 | static struct omap_hwmod omap2420_i2c1_hwmod = { |
1270 | .name = "i2c1", | 1196 | .name = "i2c1", |
1271 | .mpu_irqs = i2c1_mpu_irqs, | 1197 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
1272 | .sdma_reqs = i2c1_sdma_reqs, | 1198 | .sdma_reqs = i2c1_sdma_reqs, |
1273 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | 1199 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), |
1274 | .main_clk = "i2c1_fck", | 1200 | .main_clk = "i2c1_fck", |
@@ -1291,11 +1217,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { | |||
1291 | 1217 | ||
1292 | /* I2C2 */ | 1218 | /* I2C2 */ |
1293 | 1219 | ||
1294 | static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
1295 | { .irq = INT_24XX_I2C2_IRQ, }, | ||
1296 | { .irq = -1 } | ||
1297 | }; | ||
1298 | |||
1299 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | 1220 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { |
1300 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | 1221 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, |
1301 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | 1222 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, |
@@ -1307,7 +1228,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { | |||
1307 | 1228 | ||
1308 | static struct omap_hwmod omap2420_i2c2_hwmod = { | 1229 | static struct omap_hwmod omap2420_i2c2_hwmod = { |
1309 | .name = "i2c2", | 1230 | .name = "i2c2", |
1310 | .mpu_irqs = i2c2_mpu_irqs, | 1231 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
1311 | .sdma_reqs = i2c2_sdma_reqs, | 1232 | .sdma_reqs = i2c2_sdma_reqs, |
1312 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | 1233 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), |
1313 | .main_clk = "i2c2_fck", | 1234 | .main_clk = "i2c2_fck", |
@@ -1428,11 +1349,6 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { | |||
1428 | }; | 1349 | }; |
1429 | 1350 | ||
1430 | /* gpio1 */ | 1351 | /* gpio1 */ |
1431 | static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { | ||
1432 | { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
1433 | { .irq = -1 } | ||
1434 | }; | ||
1435 | |||
1436 | static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { | 1352 | static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { |
1437 | &omap2420_l4_wkup__gpio1, | 1353 | &omap2420_l4_wkup__gpio1, |
1438 | }; | 1354 | }; |
@@ -1440,7 +1356,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { | |||
1440 | static struct omap_hwmod omap2420_gpio1_hwmod = { | 1356 | static struct omap_hwmod omap2420_gpio1_hwmod = { |
1441 | .name = "gpio1", | 1357 | .name = "gpio1", |
1442 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1358 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1443 | .mpu_irqs = omap242x_gpio1_irqs, | 1359 | .mpu_irqs = omap2_gpio1_irqs, |
1444 | .main_clk = "gpios_fck", | 1360 | .main_clk = "gpios_fck", |
1445 | .prcm = { | 1361 | .prcm = { |
1446 | .omap2 = { | 1362 | .omap2 = { |
@@ -1459,11 +1375,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { | |||
1459 | }; | 1375 | }; |
1460 | 1376 | ||
1461 | /* gpio2 */ | 1377 | /* gpio2 */ |
1462 | static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { | ||
1463 | { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
1464 | { .irq = -1 } | ||
1465 | }; | ||
1466 | |||
1467 | static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { | 1378 | static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { |
1468 | &omap2420_l4_wkup__gpio2, | 1379 | &omap2420_l4_wkup__gpio2, |
1469 | }; | 1380 | }; |
@@ -1471,7 +1382,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { | |||
1471 | static struct omap_hwmod omap2420_gpio2_hwmod = { | 1382 | static struct omap_hwmod omap2420_gpio2_hwmod = { |
1472 | .name = "gpio2", | 1383 | .name = "gpio2", |
1473 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1384 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1474 | .mpu_irqs = omap242x_gpio2_irqs, | 1385 | .mpu_irqs = omap2_gpio2_irqs, |
1475 | .main_clk = "gpios_fck", | 1386 | .main_clk = "gpios_fck", |
1476 | .prcm = { | 1387 | .prcm = { |
1477 | .omap2 = { | 1388 | .omap2 = { |
@@ -1490,11 +1401,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { | |||
1490 | }; | 1401 | }; |
1491 | 1402 | ||
1492 | /* gpio3 */ | 1403 | /* gpio3 */ |
1493 | static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { | ||
1494 | { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
1495 | { .irq = -1 } | ||
1496 | }; | ||
1497 | |||
1498 | static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { | 1404 | static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { |
1499 | &omap2420_l4_wkup__gpio3, | 1405 | &omap2420_l4_wkup__gpio3, |
1500 | }; | 1406 | }; |
@@ -1502,7 +1408,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { | |||
1502 | static struct omap_hwmod omap2420_gpio3_hwmod = { | 1408 | static struct omap_hwmod omap2420_gpio3_hwmod = { |
1503 | .name = "gpio3", | 1409 | .name = "gpio3", |
1504 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1410 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1505 | .mpu_irqs = omap242x_gpio3_irqs, | 1411 | .mpu_irqs = omap2_gpio3_irqs, |
1506 | .main_clk = "gpios_fck", | 1412 | .main_clk = "gpios_fck", |
1507 | .prcm = { | 1413 | .prcm = { |
1508 | .omap2 = { | 1414 | .omap2 = { |
@@ -1521,11 +1427,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { | |||
1521 | }; | 1427 | }; |
1522 | 1428 | ||
1523 | /* gpio4 */ | 1429 | /* gpio4 */ |
1524 | static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { | ||
1525 | { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
1526 | { .irq = -1 } | ||
1527 | }; | ||
1528 | |||
1529 | static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { | 1430 | static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { |
1530 | &omap2420_l4_wkup__gpio4, | 1431 | &omap2420_l4_wkup__gpio4, |
1531 | }; | 1432 | }; |
@@ -1533,7 +1434,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { | |||
1533 | static struct omap_hwmod omap2420_gpio4_hwmod = { | 1434 | static struct omap_hwmod omap2420_gpio4_hwmod = { |
1534 | .name = "gpio4", | 1435 | .name = "gpio4", |
1535 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1436 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1536 | .mpu_irqs = omap242x_gpio4_irqs, | 1437 | .mpu_irqs = omap2_gpio4_irqs, |
1537 | .main_clk = "gpios_fck", | 1438 | .main_clk = "gpios_fck", |
1538 | .prcm = { | 1439 | .prcm = { |
1539 | .omap2 = { | 1440 | .omap2 = { |
@@ -1575,14 +1476,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { | |||
1575 | .lch_count = 32, | 1476 | .lch_count = 32, |
1576 | }; | 1477 | }; |
1577 | 1478 | ||
1578 | static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { | ||
1579 | { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
1580 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
1581 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
1582 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
1583 | { .irq = -1 } | ||
1584 | }; | ||
1585 | |||
1586 | /* dma_system -> L3 */ | 1479 | /* dma_system -> L3 */ |
1587 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { | 1480 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { |
1588 | .master = &omap2420_dma_system_hwmod, | 1481 | .master = &omap2420_dma_system_hwmod, |
@@ -1613,7 +1506,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { | |||
1613 | static struct omap_hwmod omap2420_dma_system_hwmod = { | 1506 | static struct omap_hwmod omap2420_dma_system_hwmod = { |
1614 | .name = "dma", | 1507 | .name = "dma", |
1615 | .class = &omap2420_dma_hwmod_class, | 1508 | .class = &omap2420_dma_hwmod_class, |
1616 | .mpu_irqs = omap2420_dma_system_irqs, | 1509 | .mpu_irqs = omap2_dma_system_irqs, |
1617 | .main_clk = "core_l3_ck", | 1510 | .main_clk = "core_l3_ck", |
1618 | .slaves = omap2420_dma_system_slaves, | 1511 | .slaves = omap2420_dma_system_slaves, |
1619 | .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), | 1512 | .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), |
@@ -1709,11 +1602,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { | |||
1709 | }; | 1602 | }; |
1710 | 1603 | ||
1711 | /* mcspi1 */ | 1604 | /* mcspi1 */ |
1712 | static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { | ||
1713 | { .irq = 65 }, | ||
1714 | { .irq = -1 } | ||
1715 | }; | ||
1716 | |||
1717 | static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { | 1605 | static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { |
1718 | { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | 1606 | { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ |
1719 | { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | 1607 | { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ |
@@ -1735,7 +1623,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | |||
1735 | 1623 | ||
1736 | static struct omap_hwmod omap2420_mcspi1_hwmod = { | 1624 | static struct omap_hwmod omap2420_mcspi1_hwmod = { |
1737 | .name = "mcspi1_hwmod", | 1625 | .name = "mcspi1_hwmod", |
1738 | .mpu_irqs = omap2420_mcspi1_mpu_irqs, | 1626 | .mpu_irqs = omap2_mcspi1_mpu_irqs, |
1739 | .sdma_reqs = omap2420_mcspi1_sdma_reqs, | 1627 | .sdma_reqs = omap2420_mcspi1_sdma_reqs, |
1740 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), | 1628 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), |
1741 | .main_clk = "mcspi1_fck", | 1629 | .main_clk = "mcspi1_fck", |
@@ -1756,11 +1644,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { | |||
1756 | }; | 1644 | }; |
1757 | 1645 | ||
1758 | /* mcspi2 */ | 1646 | /* mcspi2 */ |
1759 | static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { | ||
1760 | { .irq = 66 }, | ||
1761 | { .irq = -1 } | ||
1762 | }; | ||
1763 | |||
1764 | static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { | 1647 | static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { |
1765 | { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | 1648 | { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ |
1766 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | 1649 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ |
@@ -1778,7 +1661,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | |||
1778 | 1661 | ||
1779 | static struct omap_hwmod omap2420_mcspi2_hwmod = { | 1662 | static struct omap_hwmod omap2420_mcspi2_hwmod = { |
1780 | .name = "mcspi2_hwmod", | 1663 | .name = "mcspi2_hwmod", |
1781 | .mpu_irqs = omap2420_mcspi2_mpu_irqs, | 1664 | .mpu_irqs = omap2_mcspi2_mpu_irqs, |
1782 | .sdma_reqs = omap2420_mcspi2_sdma_reqs, | 1665 | .sdma_reqs = omap2420_mcspi2_sdma_reqs, |
1783 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), | 1666 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), |
1784 | .main_clk = "mcspi2_fck", | 1667 | .main_clk = "mcspi2_fck", |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 2c28468a37f8..62ecc685f1a2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -367,10 +367,6 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { | |||
367 | 367 | ||
368 | /* timer1 */ | 368 | /* timer1 */ |
369 | static struct omap_hwmod omap2430_timer1_hwmod; | 369 | static struct omap_hwmod omap2430_timer1_hwmod; |
370 | static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { | ||
371 | { .irq = 37, }, | ||
372 | { .irq = -1 } | ||
373 | }; | ||
374 | 370 | ||
375 | static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { | 371 | static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { |
376 | { | 372 | { |
@@ -398,7 +394,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { | |||
398 | /* timer1 hwmod */ | 394 | /* timer1 hwmod */ |
399 | static struct omap_hwmod omap2430_timer1_hwmod = { | 395 | static struct omap_hwmod omap2430_timer1_hwmod = { |
400 | .name = "timer1", | 396 | .name = "timer1", |
401 | .mpu_irqs = omap2430_timer1_mpu_irqs, | 397 | .mpu_irqs = omap2_timer1_mpu_irqs, |
402 | .main_clk = "gpt1_fck", | 398 | .main_clk = "gpt1_fck", |
403 | .prcm = { | 399 | .prcm = { |
404 | .omap2 = { | 400 | .omap2 = { |
@@ -417,10 +413,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = { | |||
417 | 413 | ||
418 | /* timer2 */ | 414 | /* timer2 */ |
419 | static struct omap_hwmod omap2430_timer2_hwmod; | 415 | static struct omap_hwmod omap2430_timer2_hwmod; |
420 | static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { | ||
421 | { .irq = 38, }, | ||
422 | { .irq = -1 } | ||
423 | }; | ||
424 | 416 | ||
425 | /* l4_core -> timer2 */ | 417 | /* l4_core -> timer2 */ |
426 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { | 418 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { |
@@ -439,7 +431,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { | |||
439 | /* timer2 hwmod */ | 431 | /* timer2 hwmod */ |
440 | static struct omap_hwmod omap2430_timer2_hwmod = { | 432 | static struct omap_hwmod omap2430_timer2_hwmod = { |
441 | .name = "timer2", | 433 | .name = "timer2", |
442 | .mpu_irqs = omap2430_timer2_mpu_irqs, | 434 | .mpu_irqs = omap2_timer2_mpu_irqs, |
443 | .main_clk = "gpt2_fck", | 435 | .main_clk = "gpt2_fck", |
444 | .prcm = { | 436 | .prcm = { |
445 | .omap2 = { | 437 | .omap2 = { |
@@ -458,10 +450,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = { | |||
458 | 450 | ||
459 | /* timer3 */ | 451 | /* timer3 */ |
460 | static struct omap_hwmod omap2430_timer3_hwmod; | 452 | static struct omap_hwmod omap2430_timer3_hwmod; |
461 | static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { | ||
462 | { .irq = 39, }, | ||
463 | { .irq = -1 } | ||
464 | }; | ||
465 | 453 | ||
466 | /* l4_core -> timer3 */ | 454 | /* l4_core -> timer3 */ |
467 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { | 455 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { |
@@ -480,7 +468,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { | |||
480 | /* timer3 hwmod */ | 468 | /* timer3 hwmod */ |
481 | static struct omap_hwmod omap2430_timer3_hwmod = { | 469 | static struct omap_hwmod omap2430_timer3_hwmod = { |
482 | .name = "timer3", | 470 | .name = "timer3", |
483 | .mpu_irqs = omap2430_timer3_mpu_irqs, | 471 | .mpu_irqs = omap2_timer3_mpu_irqs, |
484 | .main_clk = "gpt3_fck", | 472 | .main_clk = "gpt3_fck", |
485 | .prcm = { | 473 | .prcm = { |
486 | .omap2 = { | 474 | .omap2 = { |
@@ -499,10 +487,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = { | |||
499 | 487 | ||
500 | /* timer4 */ | 488 | /* timer4 */ |
501 | static struct omap_hwmod omap2430_timer4_hwmod; | 489 | static struct omap_hwmod omap2430_timer4_hwmod; |
502 | static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { | ||
503 | { .irq = 40, }, | ||
504 | { .irq = -1 } | ||
505 | }; | ||
506 | 490 | ||
507 | /* l4_core -> timer4 */ | 491 | /* l4_core -> timer4 */ |
508 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { | 492 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { |
@@ -521,7 +505,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { | |||
521 | /* timer4 hwmod */ | 505 | /* timer4 hwmod */ |
522 | static struct omap_hwmod omap2430_timer4_hwmod = { | 506 | static struct omap_hwmod omap2430_timer4_hwmod = { |
523 | .name = "timer4", | 507 | .name = "timer4", |
524 | .mpu_irqs = omap2430_timer4_mpu_irqs, | 508 | .mpu_irqs = omap2_timer4_mpu_irqs, |
525 | .main_clk = "gpt4_fck", | 509 | .main_clk = "gpt4_fck", |
526 | .prcm = { | 510 | .prcm = { |
527 | .omap2 = { | 511 | .omap2 = { |
@@ -540,10 +524,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = { | |||
540 | 524 | ||
541 | /* timer5 */ | 525 | /* timer5 */ |
542 | static struct omap_hwmod omap2430_timer5_hwmod; | 526 | static struct omap_hwmod omap2430_timer5_hwmod; |
543 | static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { | ||
544 | { .irq = 41, }, | ||
545 | { .irq = -1 } | ||
546 | }; | ||
547 | 527 | ||
548 | /* l4_core -> timer5 */ | 528 | /* l4_core -> timer5 */ |
549 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { | 529 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { |
@@ -562,7 +542,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { | |||
562 | /* timer5 hwmod */ | 542 | /* timer5 hwmod */ |
563 | static struct omap_hwmod omap2430_timer5_hwmod = { | 543 | static struct omap_hwmod omap2430_timer5_hwmod = { |
564 | .name = "timer5", | 544 | .name = "timer5", |
565 | .mpu_irqs = omap2430_timer5_mpu_irqs, | 545 | .mpu_irqs = omap2_timer5_mpu_irqs, |
566 | .main_clk = "gpt5_fck", | 546 | .main_clk = "gpt5_fck", |
567 | .prcm = { | 547 | .prcm = { |
568 | .omap2 = { | 548 | .omap2 = { |
@@ -581,10 +561,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = { | |||
581 | 561 | ||
582 | /* timer6 */ | 562 | /* timer6 */ |
583 | static struct omap_hwmod omap2430_timer6_hwmod; | 563 | static struct omap_hwmod omap2430_timer6_hwmod; |
584 | static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { | ||
585 | { .irq = 42, }, | ||
586 | { .irq = -1 } | ||
587 | }; | ||
588 | 564 | ||
589 | /* l4_core -> timer6 */ | 565 | /* l4_core -> timer6 */ |
590 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { | 566 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { |
@@ -603,7 +579,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { | |||
603 | /* timer6 hwmod */ | 579 | /* timer6 hwmod */ |
604 | static struct omap_hwmod omap2430_timer6_hwmod = { | 580 | static struct omap_hwmod omap2430_timer6_hwmod = { |
605 | .name = "timer6", | 581 | .name = "timer6", |
606 | .mpu_irqs = omap2430_timer6_mpu_irqs, | 582 | .mpu_irqs = omap2_timer6_mpu_irqs, |
607 | .main_clk = "gpt6_fck", | 583 | .main_clk = "gpt6_fck", |
608 | .prcm = { | 584 | .prcm = { |
609 | .omap2 = { | 585 | .omap2 = { |
@@ -622,10 +598,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = { | |||
622 | 598 | ||
623 | /* timer7 */ | 599 | /* timer7 */ |
624 | static struct omap_hwmod omap2430_timer7_hwmod; | 600 | static struct omap_hwmod omap2430_timer7_hwmod; |
625 | static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { | ||
626 | { .irq = 43, }, | ||
627 | { .irq = -1 } | ||
628 | }; | ||
629 | 601 | ||
630 | /* l4_core -> timer7 */ | 602 | /* l4_core -> timer7 */ |
631 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { | 603 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { |
@@ -644,7 +616,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { | |||
644 | /* timer7 hwmod */ | 616 | /* timer7 hwmod */ |
645 | static struct omap_hwmod omap2430_timer7_hwmod = { | 617 | static struct omap_hwmod omap2430_timer7_hwmod = { |
646 | .name = "timer7", | 618 | .name = "timer7", |
647 | .mpu_irqs = omap2430_timer7_mpu_irqs, | 619 | .mpu_irqs = omap2_timer7_mpu_irqs, |
648 | .main_clk = "gpt7_fck", | 620 | .main_clk = "gpt7_fck", |
649 | .prcm = { | 621 | .prcm = { |
650 | .omap2 = { | 622 | .omap2 = { |
@@ -663,10 +635,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = { | |||
663 | 635 | ||
664 | /* timer8 */ | 636 | /* timer8 */ |
665 | static struct omap_hwmod omap2430_timer8_hwmod; | 637 | static struct omap_hwmod omap2430_timer8_hwmod; |
666 | static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { | ||
667 | { .irq = 44, }, | ||
668 | { .irq = -1 } | ||
669 | }; | ||
670 | 638 | ||
671 | /* l4_core -> timer8 */ | 639 | /* l4_core -> timer8 */ |
672 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { | 640 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { |
@@ -685,7 +653,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { | |||
685 | /* timer8 hwmod */ | 653 | /* timer8 hwmod */ |
686 | static struct omap_hwmod omap2430_timer8_hwmod = { | 654 | static struct omap_hwmod omap2430_timer8_hwmod = { |
687 | .name = "timer8", | 655 | .name = "timer8", |
688 | .mpu_irqs = omap2430_timer8_mpu_irqs, | 656 | .mpu_irqs = omap2_timer8_mpu_irqs, |
689 | .main_clk = "gpt8_fck", | 657 | .main_clk = "gpt8_fck", |
690 | .prcm = { | 658 | .prcm = { |
691 | .omap2 = { | 659 | .omap2 = { |
@@ -704,10 +672,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = { | |||
704 | 672 | ||
705 | /* timer9 */ | 673 | /* timer9 */ |
706 | static struct omap_hwmod omap2430_timer9_hwmod; | 674 | static struct omap_hwmod omap2430_timer9_hwmod; |
707 | static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { | ||
708 | { .irq = 45, }, | ||
709 | { .irq = -1 } | ||
710 | }; | ||
711 | 675 | ||
712 | /* l4_core -> timer9 */ | 676 | /* l4_core -> timer9 */ |
713 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { | 677 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { |
@@ -726,7 +690,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { | |||
726 | /* timer9 hwmod */ | 690 | /* timer9 hwmod */ |
727 | static struct omap_hwmod omap2430_timer9_hwmod = { | 691 | static struct omap_hwmod omap2430_timer9_hwmod = { |
728 | .name = "timer9", | 692 | .name = "timer9", |
729 | .mpu_irqs = omap2430_timer9_mpu_irqs, | 693 | .mpu_irqs = omap2_timer9_mpu_irqs, |
730 | .main_clk = "gpt9_fck", | 694 | .main_clk = "gpt9_fck", |
731 | .prcm = { | 695 | .prcm = { |
732 | .omap2 = { | 696 | .omap2 = { |
@@ -745,10 +709,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = { | |||
745 | 709 | ||
746 | /* timer10 */ | 710 | /* timer10 */ |
747 | static struct omap_hwmod omap2430_timer10_hwmod; | 711 | static struct omap_hwmod omap2430_timer10_hwmod; |
748 | static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { | ||
749 | { .irq = 46, }, | ||
750 | { .irq = -1 } | ||
751 | }; | ||
752 | 712 | ||
753 | /* l4_core -> timer10 */ | 713 | /* l4_core -> timer10 */ |
754 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { | 714 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { |
@@ -767,7 +727,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { | |||
767 | /* timer10 hwmod */ | 727 | /* timer10 hwmod */ |
768 | static struct omap_hwmod omap2430_timer10_hwmod = { | 728 | static struct omap_hwmod omap2430_timer10_hwmod = { |
769 | .name = "timer10", | 729 | .name = "timer10", |
770 | .mpu_irqs = omap2430_timer10_mpu_irqs, | 730 | .mpu_irqs = omap2_timer10_mpu_irqs, |
771 | .main_clk = "gpt10_fck", | 731 | .main_clk = "gpt10_fck", |
772 | .prcm = { | 732 | .prcm = { |
773 | .omap2 = { | 733 | .omap2 = { |
@@ -786,10 +746,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = { | |||
786 | 746 | ||
787 | /* timer11 */ | 747 | /* timer11 */ |
788 | static struct omap_hwmod omap2430_timer11_hwmod; | 748 | static struct omap_hwmod omap2430_timer11_hwmod; |
789 | static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { | ||
790 | { .irq = 47, }, | ||
791 | { .irq = -1 } | ||
792 | }; | ||
793 | 749 | ||
794 | /* l4_core -> timer11 */ | 750 | /* l4_core -> timer11 */ |
795 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { | 751 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { |
@@ -808,7 +764,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { | |||
808 | /* timer11 hwmod */ | 764 | /* timer11 hwmod */ |
809 | static struct omap_hwmod omap2430_timer11_hwmod = { | 765 | static struct omap_hwmod omap2430_timer11_hwmod = { |
810 | .name = "timer11", | 766 | .name = "timer11", |
811 | .mpu_irqs = omap2430_timer11_mpu_irqs, | 767 | .mpu_irqs = omap2_timer11_mpu_irqs, |
812 | .main_clk = "gpt11_fck", | 768 | .main_clk = "gpt11_fck", |
813 | .prcm = { | 769 | .prcm = { |
814 | .omap2 = { | 770 | .omap2 = { |
@@ -827,10 +783,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = { | |||
827 | 783 | ||
828 | /* timer12 */ | 784 | /* timer12 */ |
829 | static struct omap_hwmod omap2430_timer12_hwmod; | 785 | static struct omap_hwmod omap2430_timer12_hwmod; |
830 | static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { | ||
831 | { .irq = 48, }, | ||
832 | { .irq = -1 } | ||
833 | }; | ||
834 | 786 | ||
835 | /* l4_core -> timer12 */ | 787 | /* l4_core -> timer12 */ |
836 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { | 788 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { |
@@ -849,7 +801,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { | |||
849 | /* timer12 hwmod */ | 801 | /* timer12 hwmod */ |
850 | static struct omap_hwmod omap2430_timer12_hwmod = { | 802 | static struct omap_hwmod omap2430_timer12_hwmod = { |
851 | .name = "timer12", | 803 | .name = "timer12", |
852 | .mpu_irqs = omap2430_timer12_mpu_irqs, | 804 | .mpu_irqs = omap2xxx_timer12_mpu_irqs, |
853 | .main_clk = "gpt12_fck", | 805 | .main_clk = "gpt12_fck", |
854 | .prcm = { | 806 | .prcm = { |
855 | .omap2 = { | 807 | .omap2 = { |
@@ -948,11 +900,6 @@ static struct omap_hwmod_class uart_class = { | |||
948 | 900 | ||
949 | /* UART1 */ | 901 | /* UART1 */ |
950 | 902 | ||
951 | static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
952 | { .irq = INT_24XX_UART1_IRQ, }, | ||
953 | { .irq = -1 } | ||
954 | }; | ||
955 | |||
956 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | 903 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { |
957 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | 904 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, |
958 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | 905 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, |
@@ -964,7 +911,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | |||
964 | 911 | ||
965 | static struct omap_hwmod omap2430_uart1_hwmod = { | 912 | static struct omap_hwmod omap2430_uart1_hwmod = { |
966 | .name = "uart1", | 913 | .name = "uart1", |
967 | .mpu_irqs = uart1_mpu_irqs, | 914 | .mpu_irqs = omap2_uart1_mpu_irqs, |
968 | .sdma_reqs = uart1_sdma_reqs, | 915 | .sdma_reqs = uart1_sdma_reqs, |
969 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | 916 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), |
970 | .main_clk = "uart1_fck", | 917 | .main_clk = "uart1_fck", |
@@ -985,11 +932,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | |||
985 | 932 | ||
986 | /* UART2 */ | 933 | /* UART2 */ |
987 | 934 | ||
988 | static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
989 | { .irq = INT_24XX_UART2_IRQ, }, | ||
990 | { .irq = -1 } | ||
991 | }; | ||
992 | |||
993 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | 935 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { |
994 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | 936 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, |
995 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | 937 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, |
@@ -1001,7 +943,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { | |||
1001 | 943 | ||
1002 | static struct omap_hwmod omap2430_uart2_hwmod = { | 944 | static struct omap_hwmod omap2430_uart2_hwmod = { |
1003 | .name = "uart2", | 945 | .name = "uart2", |
1004 | .mpu_irqs = uart2_mpu_irqs, | 946 | .mpu_irqs = omap2_uart2_mpu_irqs, |
1005 | .sdma_reqs = uart2_sdma_reqs, | 947 | .sdma_reqs = uart2_sdma_reqs, |
1006 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | 948 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), |
1007 | .main_clk = "uart2_fck", | 949 | .main_clk = "uart2_fck", |
@@ -1022,11 +964,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | |||
1022 | 964 | ||
1023 | /* UART3 */ | 965 | /* UART3 */ |
1024 | 966 | ||
1025 | static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
1026 | { .irq = INT_24XX_UART3_IRQ, }, | ||
1027 | { .irq = -1 } | ||
1028 | }; | ||
1029 | |||
1030 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | 967 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { |
1031 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | 968 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, |
1032 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | 969 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, |
@@ -1038,7 +975,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { | |||
1038 | 975 | ||
1039 | static struct omap_hwmod omap2430_uart3_hwmod = { | 976 | static struct omap_hwmod omap2430_uart3_hwmod = { |
1040 | .name = "uart3", | 977 | .name = "uart3", |
1041 | .mpu_irqs = uart3_mpu_irqs, | 978 | .mpu_irqs = omap2_uart3_mpu_irqs, |
1042 | .sdma_reqs = uart3_sdma_reqs, | 979 | .sdma_reqs = uart3_sdma_reqs, |
1043 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | 980 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), |
1044 | .main_clk = "uart3_fck", | 981 | .main_clk = "uart3_fck", |
@@ -1150,11 +1087,6 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { | |||
1150 | .sysc = &omap2430_dispc_sysc, | 1087 | .sysc = &omap2430_dispc_sysc, |
1151 | }; | 1088 | }; |
1152 | 1089 | ||
1153 | static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { | ||
1154 | { .irq = 25 }, | ||
1155 | { .irq = -1 } | ||
1156 | }; | ||
1157 | |||
1158 | /* l4_core -> dss_dispc */ | 1090 | /* l4_core -> dss_dispc */ |
1159 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { | 1091 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { |
1160 | .master = &omap2430_l4_core_hwmod, | 1092 | .master = &omap2430_l4_core_hwmod, |
@@ -1172,7 +1104,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { | |||
1172 | static struct omap_hwmod omap2430_dss_dispc_hwmod = { | 1104 | static struct omap_hwmod omap2430_dss_dispc_hwmod = { |
1173 | .name = "dss_dispc", | 1105 | .name = "dss_dispc", |
1174 | .class = &omap2430_dispc_hwmod_class, | 1106 | .class = &omap2430_dispc_hwmod_class, |
1175 | .mpu_irqs = omap2430_dispc_irqs, | 1107 | .mpu_irqs = omap2_dispc_irqs, |
1176 | .main_clk = "dss1_fck", | 1108 | .main_clk = "dss1_fck", |
1177 | .prcm = { | 1109 | .prcm = { |
1178 | .omap2 = { | 1110 | .omap2 = { |
@@ -1302,11 +1234,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { | |||
1302 | 1234 | ||
1303 | /* I2C1 */ | 1235 | /* I2C1 */ |
1304 | 1236 | ||
1305 | static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
1306 | { .irq = INT_24XX_I2C1_IRQ, }, | ||
1307 | { .irq = -1 } | ||
1308 | }; | ||
1309 | |||
1310 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | 1237 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { |
1311 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | 1238 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, |
1312 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | 1239 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, |
@@ -1318,7 +1245,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | |||
1318 | 1245 | ||
1319 | static struct omap_hwmod omap2430_i2c1_hwmod = { | 1246 | static struct omap_hwmod omap2430_i2c1_hwmod = { |
1320 | .name = "i2c1", | 1247 | .name = "i2c1", |
1321 | .mpu_irqs = i2c1_mpu_irqs, | 1248 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
1322 | .sdma_reqs = i2c1_sdma_reqs, | 1249 | .sdma_reqs = i2c1_sdma_reqs, |
1323 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | 1250 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), |
1324 | .main_clk = "i2chs1_fck", | 1251 | .main_clk = "i2chs1_fck", |
@@ -1348,11 +1275,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | |||
1348 | 1275 | ||
1349 | /* I2C2 */ | 1276 | /* I2C2 */ |
1350 | 1277 | ||
1351 | static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
1352 | { .irq = INT_24XX_I2C2_IRQ, }, | ||
1353 | { .irq = -1 } | ||
1354 | }; | ||
1355 | |||
1356 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | 1278 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { |
1357 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | 1279 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, |
1358 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | 1280 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, |
@@ -1364,7 +1286,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | |||
1364 | 1286 | ||
1365 | static struct omap_hwmod omap2430_i2c2_hwmod = { | 1287 | static struct omap_hwmod omap2430_i2c2_hwmod = { |
1366 | .name = "i2c2", | 1288 | .name = "i2c2", |
1367 | .mpu_irqs = i2c2_mpu_irqs, | 1289 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
1368 | .sdma_reqs = i2c2_sdma_reqs, | 1290 | .sdma_reqs = i2c2_sdma_reqs, |
1369 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | 1291 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), |
1370 | .main_clk = "i2chs2_fck", | 1292 | .main_clk = "i2chs2_fck", |
@@ -1502,11 +1424,6 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { | |||
1502 | }; | 1424 | }; |
1503 | 1425 | ||
1504 | /* gpio1 */ | 1426 | /* gpio1 */ |
1505 | static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { | ||
1506 | { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
1507 | { .irq = -1 } | ||
1508 | }; | ||
1509 | |||
1510 | static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | 1427 | static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { |
1511 | &omap2430_l4_wkup__gpio1, | 1428 | &omap2430_l4_wkup__gpio1, |
1512 | }; | 1429 | }; |
@@ -1514,7 +1431,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | |||
1514 | static struct omap_hwmod omap2430_gpio1_hwmod = { | 1431 | static struct omap_hwmod omap2430_gpio1_hwmod = { |
1515 | .name = "gpio1", | 1432 | .name = "gpio1", |
1516 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1433 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1517 | .mpu_irqs = omap243x_gpio1_irqs, | 1434 | .mpu_irqs = omap2_gpio1_irqs, |
1518 | .main_clk = "gpios_fck", | 1435 | .main_clk = "gpios_fck", |
1519 | .prcm = { | 1436 | .prcm = { |
1520 | .omap2 = { | 1437 | .omap2 = { |
@@ -1533,11 +1450,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { | |||
1533 | }; | 1450 | }; |
1534 | 1451 | ||
1535 | /* gpio2 */ | 1452 | /* gpio2 */ |
1536 | static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { | ||
1537 | { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
1538 | { .irq = -1 } | ||
1539 | }; | ||
1540 | |||
1541 | static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | 1453 | static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { |
1542 | &omap2430_l4_wkup__gpio2, | 1454 | &omap2430_l4_wkup__gpio2, |
1543 | }; | 1455 | }; |
@@ -1545,7 +1457,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | |||
1545 | static struct omap_hwmod omap2430_gpio2_hwmod = { | 1457 | static struct omap_hwmod omap2430_gpio2_hwmod = { |
1546 | .name = "gpio2", | 1458 | .name = "gpio2", |
1547 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1459 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1548 | .mpu_irqs = omap243x_gpio2_irqs, | 1460 | .mpu_irqs = omap2_gpio2_irqs, |
1549 | .main_clk = "gpios_fck", | 1461 | .main_clk = "gpios_fck", |
1550 | .prcm = { | 1462 | .prcm = { |
1551 | .omap2 = { | 1463 | .omap2 = { |
@@ -1564,11 +1476,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { | |||
1564 | }; | 1476 | }; |
1565 | 1477 | ||
1566 | /* gpio3 */ | 1478 | /* gpio3 */ |
1567 | static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { | ||
1568 | { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
1569 | { .irq = -1 } | ||
1570 | }; | ||
1571 | |||
1572 | static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | 1479 | static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { |
1573 | &omap2430_l4_wkup__gpio3, | 1480 | &omap2430_l4_wkup__gpio3, |
1574 | }; | 1481 | }; |
@@ -1576,7 +1483,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | |||
1576 | static struct omap_hwmod omap2430_gpio3_hwmod = { | 1483 | static struct omap_hwmod omap2430_gpio3_hwmod = { |
1577 | .name = "gpio3", | 1484 | .name = "gpio3", |
1578 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1485 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1579 | .mpu_irqs = omap243x_gpio3_irqs, | 1486 | .mpu_irqs = omap2_gpio3_irqs, |
1580 | .main_clk = "gpios_fck", | 1487 | .main_clk = "gpios_fck", |
1581 | .prcm = { | 1488 | .prcm = { |
1582 | .omap2 = { | 1489 | .omap2 = { |
@@ -1595,11 +1502,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { | |||
1595 | }; | 1502 | }; |
1596 | 1503 | ||
1597 | /* gpio4 */ | 1504 | /* gpio4 */ |
1598 | static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { | ||
1599 | { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
1600 | { .irq = -1 } | ||
1601 | }; | ||
1602 | |||
1603 | static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | 1505 | static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { |
1604 | &omap2430_l4_wkup__gpio4, | 1506 | &omap2430_l4_wkup__gpio4, |
1605 | }; | 1507 | }; |
@@ -1607,7 +1509,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | |||
1607 | static struct omap_hwmod omap2430_gpio4_hwmod = { | 1509 | static struct omap_hwmod omap2430_gpio4_hwmod = { |
1608 | .name = "gpio4", | 1510 | .name = "gpio4", |
1609 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1511 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1610 | .mpu_irqs = omap243x_gpio4_irqs, | 1512 | .mpu_irqs = omap2_gpio4_irqs, |
1611 | .main_clk = "gpios_fck", | 1513 | .main_clk = "gpios_fck", |
1612 | .prcm = { | 1514 | .prcm = { |
1613 | .omap2 = { | 1515 | .omap2 = { |
@@ -1680,14 +1582,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { | |||
1680 | .lch_count = 32, | 1582 | .lch_count = 32, |
1681 | }; | 1583 | }; |
1682 | 1584 | ||
1683 | static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { | ||
1684 | { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
1685 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
1686 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
1687 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
1688 | { .irq = -1 } | ||
1689 | }; | ||
1690 | |||
1691 | /* dma_system -> L3 */ | 1585 | /* dma_system -> L3 */ |
1692 | static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { | 1586 | static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { |
1693 | .master = &omap2430_dma_system_hwmod, | 1587 | .master = &omap2430_dma_system_hwmod, |
@@ -1718,7 +1612,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { | |||
1718 | static struct omap_hwmod omap2430_dma_system_hwmod = { | 1612 | static struct omap_hwmod omap2430_dma_system_hwmod = { |
1719 | .name = "dma", | 1613 | .name = "dma", |
1720 | .class = &omap2430_dma_hwmod_class, | 1614 | .class = &omap2430_dma_hwmod_class, |
1721 | .mpu_irqs = omap2430_dma_system_irqs, | 1615 | .mpu_irqs = omap2_dma_system_irqs, |
1722 | .main_clk = "core_l3_ck", | 1616 | .main_clk = "core_l3_ck", |
1723 | .slaves = omap2430_dma_system_slaves, | 1617 | .slaves = omap2430_dma_system_slaves, |
1724 | .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), | 1618 | .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), |
@@ -1813,11 +1707,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { | |||
1813 | }; | 1707 | }; |
1814 | 1708 | ||
1815 | /* mcspi1 */ | 1709 | /* mcspi1 */ |
1816 | static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { | ||
1817 | { .irq = 65 }, | ||
1818 | { .irq = -1 } | ||
1819 | }; | ||
1820 | |||
1821 | static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { | 1710 | static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { |
1822 | { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | 1711 | { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ |
1823 | { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | 1712 | { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ |
@@ -1839,7 +1728,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | |||
1839 | 1728 | ||
1840 | static struct omap_hwmod omap2430_mcspi1_hwmod = { | 1729 | static struct omap_hwmod omap2430_mcspi1_hwmod = { |
1841 | .name = "mcspi1_hwmod", | 1730 | .name = "mcspi1_hwmod", |
1842 | .mpu_irqs = omap2430_mcspi1_mpu_irqs, | 1731 | .mpu_irqs = omap2_mcspi1_mpu_irqs, |
1843 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, | 1732 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, |
1844 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), | 1733 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), |
1845 | .main_clk = "mcspi1_fck", | 1734 | .main_clk = "mcspi1_fck", |
@@ -1860,11 +1749,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { | |||
1860 | }; | 1749 | }; |
1861 | 1750 | ||
1862 | /* mcspi2 */ | 1751 | /* mcspi2 */ |
1863 | static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { | ||
1864 | { .irq = 66 }, | ||
1865 | { .irq = -1 } | ||
1866 | }; | ||
1867 | |||
1868 | static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { | 1752 | static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { |
1869 | { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | 1753 | { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ |
1870 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | 1754 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ |
@@ -1882,7 +1766,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | |||
1882 | 1766 | ||
1883 | static struct omap_hwmod omap2430_mcspi2_hwmod = { | 1767 | static struct omap_hwmod omap2430_mcspi2_hwmod = { |
1884 | .name = "mcspi2_hwmod", | 1768 | .name = "mcspi2_hwmod", |
1885 | .mpu_irqs = omap2430_mcspi2_mpu_irqs, | 1769 | .mpu_irqs = omap2_mcspi2_mpu_irqs, |
1886 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, | 1770 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, |
1887 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), | 1771 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), |
1888 | .main_clk = "mcspi2_fck", | 1772 | .main_clk = "mcspi2_fck", |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c new file mode 100644 index 000000000000..245294b97f6e --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | |||
@@ -0,0 +1,142 @@ | |||
1 | /* | ||
2 | * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3 | ||
3 | * | ||
4 | * Copyright (C) 2011 Nokia Corporation | ||
5 | * Paul Walmsley | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #include <plat/omap_hwmod.h> | ||
12 | #include <plat/serial.h> | ||
13 | |||
14 | #include <mach/irqs.h> | ||
15 | |||
16 | #include "omap_hwmod_common_data.h" | ||
17 | |||
18 | struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { | ||
19 | { .irq = 37, }, | ||
20 | { .irq = -1 } | ||
21 | }; | ||
22 | |||
23 | struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = { | ||
24 | { .irq = 38, }, | ||
25 | { .irq = -1 } | ||
26 | }; | ||
27 | |||
28 | struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = { | ||
29 | { .irq = 39, }, | ||
30 | { .irq = -1 } | ||
31 | }; | ||
32 | |||
33 | struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = { | ||
34 | { .irq = 40, }, | ||
35 | { .irq = -1 } | ||
36 | }; | ||
37 | |||
38 | struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = { | ||
39 | { .irq = 41, }, | ||
40 | { .irq = -1 } | ||
41 | }; | ||
42 | |||
43 | struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = { | ||
44 | { .irq = 42, }, | ||
45 | { .irq = -1 } | ||
46 | }; | ||
47 | |||
48 | struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = { | ||
49 | { .irq = 43, }, | ||
50 | { .irq = -1 } | ||
51 | }; | ||
52 | |||
53 | struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = { | ||
54 | { .irq = 44, }, | ||
55 | { .irq = -1 } | ||
56 | }; | ||
57 | |||
58 | struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = { | ||
59 | { .irq = 45, }, | ||
60 | { .irq = -1 } | ||
61 | }; | ||
62 | |||
63 | struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = { | ||
64 | { .irq = 46, }, | ||
65 | { .irq = -1 } | ||
66 | }; | ||
67 | |||
68 | struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = { | ||
69 | { .irq = 47, }, | ||
70 | { .irq = -1 } | ||
71 | }; | ||
72 | |||
73 | struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = { | ||
74 | { .irq = INT_24XX_UART1_IRQ, }, | ||
75 | { .irq = -1 } | ||
76 | }; | ||
77 | |||
78 | struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = { | ||
79 | { .irq = INT_24XX_UART2_IRQ, }, | ||
80 | { .irq = -1 } | ||
81 | }; | ||
82 | |||
83 | struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = { | ||
84 | { .irq = INT_24XX_UART3_IRQ, }, | ||
85 | { .irq = -1 } | ||
86 | }; | ||
87 | |||
88 | struct omap_hwmod_irq_info omap2_dispc_irqs[] = { | ||
89 | { .irq = 25 }, | ||
90 | { .irq = -1 } | ||
91 | }; | ||
92 | |||
93 | struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = { | ||
94 | { .irq = INT_24XX_I2C1_IRQ, }, | ||
95 | { .irq = -1 } | ||
96 | }; | ||
97 | |||
98 | struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = { | ||
99 | { .irq = INT_24XX_I2C2_IRQ, }, | ||
100 | { .irq = -1 } | ||
101 | }; | ||
102 | |||
103 | struct omap_hwmod_irq_info omap2_gpio1_irqs[] = { | ||
104 | { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
105 | { .irq = -1 } | ||
106 | }; | ||
107 | |||
108 | struct omap_hwmod_irq_info omap2_gpio2_irqs[] = { | ||
109 | { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
110 | { .irq = -1 } | ||
111 | }; | ||
112 | |||
113 | struct omap_hwmod_irq_info omap2_gpio3_irqs[] = { | ||
114 | { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
115 | { .irq = -1 } | ||
116 | }; | ||
117 | |||
118 | struct omap_hwmod_irq_info omap2_gpio4_irqs[] = { | ||
119 | { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
120 | { .irq = -1 } | ||
121 | }; | ||
122 | |||
123 | struct omap_hwmod_irq_info omap2_dma_system_irqs[] = { | ||
124 | { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
125 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
126 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
127 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
128 | { .irq = -1 } | ||
129 | }; | ||
130 | |||
131 | struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = { | ||
132 | { .irq = 65 }, | ||
133 | { .irq = -1 } | ||
134 | }; | ||
135 | |||
136 | struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { | ||
137 | { .irq = 66 }, | ||
138 | { .irq = -1 } | ||
139 | }; | ||
140 | |||
141 | |||
142 | |||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c new file mode 100644 index 000000000000..5a078a652c33 --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | |||
@@ -0,0 +1,21 @@ | |||
1 | /* | ||
2 | * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx | ||
3 | * | ||
4 | * Copyright (C) 2011 Nokia Corporation | ||
5 | * Paul Walmsley | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #include <plat/omap_hwmod.h> | ||
12 | #include <plat/serial.h> | ||
13 | |||
14 | #include <mach/irqs.h> | ||
15 | |||
16 | #include "omap_hwmod_common_data.h" | ||
17 | |||
18 | struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { | ||
19 | { .irq = 48, }, | ||
20 | { .irq = -1 } | ||
21 | }; | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index cc178b573fe2..6bac4bb14df3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -151,7 +151,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = { | |||
151 | static struct omap_hwmod omap3xxx_l3_main_hwmod = { | 151 | static struct omap_hwmod omap3xxx_l3_main_hwmod = { |
152 | .name = "l3_main", | 152 | .name = "l3_main", |
153 | .class = &l3_hwmod_class, | 153 | .class = &l3_hwmod_class, |
154 | .mpu_irqs = omap3xxx_l3_main_irqs, | 154 | .mpu_irqs = omap3xxx_l3_main_irqs, |
155 | .masters = omap3xxx_l3_main_masters, | 155 | .masters = omap3xxx_l3_main_masters, |
156 | .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), | 156 | .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), |
157 | .slaves = omap3xxx_l3_main_slaves, | 157 | .slaves = omap3xxx_l3_main_slaves, |
@@ -572,10 +572,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { | |||
572 | 572 | ||
573 | /* timer1 */ | 573 | /* timer1 */ |
574 | static struct omap_hwmod omap3xxx_timer1_hwmod; | 574 | static struct omap_hwmod omap3xxx_timer1_hwmod; |
575 | static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { | ||
576 | { .irq = 37, }, | ||
577 | { .irq = -1 } | ||
578 | }; | ||
579 | 575 | ||
580 | static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { | 576 | static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { |
581 | { | 577 | { |
@@ -603,7 +599,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { | |||
603 | /* timer1 hwmod */ | 599 | /* timer1 hwmod */ |
604 | static struct omap_hwmod omap3xxx_timer1_hwmod = { | 600 | static struct omap_hwmod omap3xxx_timer1_hwmod = { |
605 | .name = "timer1", | 601 | .name = "timer1", |
606 | .mpu_irqs = omap3xxx_timer1_mpu_irqs, | 602 | .mpu_irqs = omap2_timer1_mpu_irqs, |
607 | .main_clk = "gpt1_fck", | 603 | .main_clk = "gpt1_fck", |
608 | .prcm = { | 604 | .prcm = { |
609 | .omap2 = { | 605 | .omap2 = { |
@@ -622,10 +618,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { | |||
622 | 618 | ||
623 | /* timer2 */ | 619 | /* timer2 */ |
624 | static struct omap_hwmod omap3xxx_timer2_hwmod; | 620 | static struct omap_hwmod omap3xxx_timer2_hwmod; |
625 | static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { | ||
626 | { .irq = 38, }, | ||
627 | { .irq = -1 } | ||
628 | }; | ||
629 | 621 | ||
630 | static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { | 622 | static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { |
631 | { | 623 | { |
@@ -653,7 +645,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { | |||
653 | /* timer2 hwmod */ | 645 | /* timer2 hwmod */ |
654 | static struct omap_hwmod omap3xxx_timer2_hwmod = { | 646 | static struct omap_hwmod omap3xxx_timer2_hwmod = { |
655 | .name = "timer2", | 647 | .name = "timer2", |
656 | .mpu_irqs = omap3xxx_timer2_mpu_irqs, | 648 | .mpu_irqs = omap2_timer2_mpu_irqs, |
657 | .main_clk = "gpt2_fck", | 649 | .main_clk = "gpt2_fck", |
658 | .prcm = { | 650 | .prcm = { |
659 | .omap2 = { | 651 | .omap2 = { |
@@ -672,10 +664,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { | |||
672 | 664 | ||
673 | /* timer3 */ | 665 | /* timer3 */ |
674 | static struct omap_hwmod omap3xxx_timer3_hwmod; | 666 | static struct omap_hwmod omap3xxx_timer3_hwmod; |
675 | static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { | ||
676 | { .irq = 39, }, | ||
677 | { .irq = -1 } | ||
678 | }; | ||
679 | 667 | ||
680 | static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { | 668 | static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { |
681 | { | 669 | { |
@@ -703,7 +691,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { | |||
703 | /* timer3 hwmod */ | 691 | /* timer3 hwmod */ |
704 | static struct omap_hwmod omap3xxx_timer3_hwmod = { | 692 | static struct omap_hwmod omap3xxx_timer3_hwmod = { |
705 | .name = "timer3", | 693 | .name = "timer3", |
706 | .mpu_irqs = omap3xxx_timer3_mpu_irqs, | 694 | .mpu_irqs = omap2_timer3_mpu_irqs, |
707 | .main_clk = "gpt3_fck", | 695 | .main_clk = "gpt3_fck", |
708 | .prcm = { | 696 | .prcm = { |
709 | .omap2 = { | 697 | .omap2 = { |
@@ -722,10 +710,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { | |||
722 | 710 | ||
723 | /* timer4 */ | 711 | /* timer4 */ |
724 | static struct omap_hwmod omap3xxx_timer4_hwmod; | 712 | static struct omap_hwmod omap3xxx_timer4_hwmod; |
725 | static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { | ||
726 | { .irq = 40, }, | ||
727 | { .irq = -1 } | ||
728 | }; | ||
729 | 713 | ||
730 | static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { | 714 | static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { |
731 | { | 715 | { |
@@ -753,7 +737,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { | |||
753 | /* timer4 hwmod */ | 737 | /* timer4 hwmod */ |
754 | static struct omap_hwmod omap3xxx_timer4_hwmod = { | 738 | static struct omap_hwmod omap3xxx_timer4_hwmod = { |
755 | .name = "timer4", | 739 | .name = "timer4", |
756 | .mpu_irqs = omap3xxx_timer4_mpu_irqs, | 740 | .mpu_irqs = omap2_timer4_mpu_irqs, |
757 | .main_clk = "gpt4_fck", | 741 | .main_clk = "gpt4_fck", |
758 | .prcm = { | 742 | .prcm = { |
759 | .omap2 = { | 743 | .omap2 = { |
@@ -772,10 +756,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { | |||
772 | 756 | ||
773 | /* timer5 */ | 757 | /* timer5 */ |
774 | static struct omap_hwmod omap3xxx_timer5_hwmod; | 758 | static struct omap_hwmod omap3xxx_timer5_hwmod; |
775 | static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { | ||
776 | { .irq = 41, }, | ||
777 | { .irq = -1 } | ||
778 | }; | ||
779 | 759 | ||
780 | static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { | 760 | static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { |
781 | { | 761 | { |
@@ -803,7 +783,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { | |||
803 | /* timer5 hwmod */ | 783 | /* timer5 hwmod */ |
804 | static struct omap_hwmod omap3xxx_timer5_hwmod = { | 784 | static struct omap_hwmod omap3xxx_timer5_hwmod = { |
805 | .name = "timer5", | 785 | .name = "timer5", |
806 | .mpu_irqs = omap3xxx_timer5_mpu_irqs, | 786 | .mpu_irqs = omap2_timer5_mpu_irqs, |
807 | .main_clk = "gpt5_fck", | 787 | .main_clk = "gpt5_fck", |
808 | .prcm = { | 788 | .prcm = { |
809 | .omap2 = { | 789 | .omap2 = { |
@@ -822,10 +802,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { | |||
822 | 802 | ||
823 | /* timer6 */ | 803 | /* timer6 */ |
824 | static struct omap_hwmod omap3xxx_timer6_hwmod; | 804 | static struct omap_hwmod omap3xxx_timer6_hwmod; |
825 | static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { | ||
826 | { .irq = 42, }, | ||
827 | { .irq = -1 } | ||
828 | }; | ||
829 | 805 | ||
830 | static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { | 806 | static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { |
831 | { | 807 | { |
@@ -853,7 +829,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { | |||
853 | /* timer6 hwmod */ | 829 | /* timer6 hwmod */ |
854 | static struct omap_hwmod omap3xxx_timer6_hwmod = { | 830 | static struct omap_hwmod omap3xxx_timer6_hwmod = { |
855 | .name = "timer6", | 831 | .name = "timer6", |
856 | .mpu_irqs = omap3xxx_timer6_mpu_irqs, | 832 | .mpu_irqs = omap2_timer6_mpu_irqs, |
857 | .main_clk = "gpt6_fck", | 833 | .main_clk = "gpt6_fck", |
858 | .prcm = { | 834 | .prcm = { |
859 | .omap2 = { | 835 | .omap2 = { |
@@ -872,10 +848,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { | |||
872 | 848 | ||
873 | /* timer7 */ | 849 | /* timer7 */ |
874 | static struct omap_hwmod omap3xxx_timer7_hwmod; | 850 | static struct omap_hwmod omap3xxx_timer7_hwmod; |
875 | static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { | ||
876 | { .irq = 43, }, | ||
877 | { .irq = -1 } | ||
878 | }; | ||
879 | 851 | ||
880 | static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { | 852 | static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { |
881 | { | 853 | { |
@@ -903,7 +875,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { | |||
903 | /* timer7 hwmod */ | 875 | /* timer7 hwmod */ |
904 | static struct omap_hwmod omap3xxx_timer7_hwmod = { | 876 | static struct omap_hwmod omap3xxx_timer7_hwmod = { |
905 | .name = "timer7", | 877 | .name = "timer7", |
906 | .mpu_irqs = omap3xxx_timer7_mpu_irqs, | 878 | .mpu_irqs = omap2_timer7_mpu_irqs, |
907 | .main_clk = "gpt7_fck", | 879 | .main_clk = "gpt7_fck", |
908 | .prcm = { | 880 | .prcm = { |
909 | .omap2 = { | 881 | .omap2 = { |
@@ -922,10 +894,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { | |||
922 | 894 | ||
923 | /* timer8 */ | 895 | /* timer8 */ |
924 | static struct omap_hwmod omap3xxx_timer8_hwmod; | 896 | static struct omap_hwmod omap3xxx_timer8_hwmod; |
925 | static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { | ||
926 | { .irq = 44, }, | ||
927 | { .irq = -1 } | ||
928 | }; | ||
929 | 897 | ||
930 | static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { | 898 | static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { |
931 | { | 899 | { |
@@ -953,7 +921,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { | |||
953 | /* timer8 hwmod */ | 921 | /* timer8 hwmod */ |
954 | static struct omap_hwmod omap3xxx_timer8_hwmod = { | 922 | static struct omap_hwmod omap3xxx_timer8_hwmod = { |
955 | .name = "timer8", | 923 | .name = "timer8", |
956 | .mpu_irqs = omap3xxx_timer8_mpu_irqs, | 924 | .mpu_irqs = omap2_timer8_mpu_irqs, |
957 | .main_clk = "gpt8_fck", | 925 | .main_clk = "gpt8_fck", |
958 | .prcm = { | 926 | .prcm = { |
959 | .omap2 = { | 927 | .omap2 = { |
@@ -972,10 +940,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { | |||
972 | 940 | ||
973 | /* timer9 */ | 941 | /* timer9 */ |
974 | static struct omap_hwmod omap3xxx_timer9_hwmod; | 942 | static struct omap_hwmod omap3xxx_timer9_hwmod; |
975 | static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { | ||
976 | { .irq = 45, }, | ||
977 | { .irq = -1 } | ||
978 | }; | ||
979 | 943 | ||
980 | static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { | 944 | static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { |
981 | { | 945 | { |
@@ -1003,7 +967,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { | |||
1003 | /* timer9 hwmod */ | 967 | /* timer9 hwmod */ |
1004 | static struct omap_hwmod omap3xxx_timer9_hwmod = { | 968 | static struct omap_hwmod omap3xxx_timer9_hwmod = { |
1005 | .name = "timer9", | 969 | .name = "timer9", |
1006 | .mpu_irqs = omap3xxx_timer9_mpu_irqs, | 970 | .mpu_irqs = omap2_timer9_mpu_irqs, |
1007 | .main_clk = "gpt9_fck", | 971 | .main_clk = "gpt9_fck", |
1008 | .prcm = { | 972 | .prcm = { |
1009 | .omap2 = { | 973 | .omap2 = { |
@@ -1022,10 +986,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { | |||
1022 | 986 | ||
1023 | /* timer10 */ | 987 | /* timer10 */ |
1024 | static struct omap_hwmod omap3xxx_timer10_hwmod; | 988 | static struct omap_hwmod omap3xxx_timer10_hwmod; |
1025 | static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { | ||
1026 | { .irq = 46, }, | ||
1027 | { .irq = -1 } | ||
1028 | }; | ||
1029 | 989 | ||
1030 | /* l4_core -> timer10 */ | 990 | /* l4_core -> timer10 */ |
1031 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { | 991 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { |
@@ -1044,7 +1004,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { | |||
1044 | /* timer10 hwmod */ | 1004 | /* timer10 hwmod */ |
1045 | static struct omap_hwmod omap3xxx_timer10_hwmod = { | 1005 | static struct omap_hwmod omap3xxx_timer10_hwmod = { |
1046 | .name = "timer10", | 1006 | .name = "timer10", |
1047 | .mpu_irqs = omap3xxx_timer10_mpu_irqs, | 1007 | .mpu_irqs = omap2_timer10_mpu_irqs, |
1048 | .main_clk = "gpt10_fck", | 1008 | .main_clk = "gpt10_fck", |
1049 | .prcm = { | 1009 | .prcm = { |
1050 | .omap2 = { | 1010 | .omap2 = { |
@@ -1063,10 +1023,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { | |||
1063 | 1023 | ||
1064 | /* timer11 */ | 1024 | /* timer11 */ |
1065 | static struct omap_hwmod omap3xxx_timer11_hwmod; | 1025 | static struct omap_hwmod omap3xxx_timer11_hwmod; |
1066 | static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { | ||
1067 | { .irq = 47, }, | ||
1068 | { .irq = -1 } | ||
1069 | }; | ||
1070 | 1026 | ||
1071 | /* l4_core -> timer11 */ | 1027 | /* l4_core -> timer11 */ |
1072 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { | 1028 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { |
@@ -1085,7 +1041,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { | |||
1085 | /* timer11 hwmod */ | 1041 | /* timer11 hwmod */ |
1086 | static struct omap_hwmod omap3xxx_timer11_hwmod = { | 1042 | static struct omap_hwmod omap3xxx_timer11_hwmod = { |
1087 | .name = "timer11", | 1043 | .name = "timer11", |
1088 | .mpu_irqs = omap3xxx_timer11_mpu_irqs, | 1044 | .mpu_irqs = omap2_timer11_mpu_irqs, |
1089 | .main_clk = "gpt11_fck", | 1045 | .main_clk = "gpt11_fck", |
1090 | .prcm = { | 1046 | .prcm = { |
1091 | .omap2 = { | 1047 | .omap2 = { |
@@ -1254,11 +1210,6 @@ static struct omap_hwmod_class uart_class = { | |||
1254 | 1210 | ||
1255 | /* UART1 */ | 1211 | /* UART1 */ |
1256 | 1212 | ||
1257 | static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
1258 | { .irq = INT_24XX_UART1_IRQ, }, | ||
1259 | { .irq = -1 } | ||
1260 | }; | ||
1261 | |||
1262 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | 1213 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { |
1263 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | 1214 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, |
1264 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | 1215 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, |
@@ -1270,7 +1221,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { | |||
1270 | 1221 | ||
1271 | static struct omap_hwmod omap3xxx_uart1_hwmod = { | 1222 | static struct omap_hwmod omap3xxx_uart1_hwmod = { |
1272 | .name = "uart1", | 1223 | .name = "uart1", |
1273 | .mpu_irqs = uart1_mpu_irqs, | 1224 | .mpu_irqs = omap2_uart1_mpu_irqs, |
1274 | .sdma_reqs = uart1_sdma_reqs, | 1225 | .sdma_reqs = uart1_sdma_reqs, |
1275 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | 1226 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), |
1276 | .main_clk = "uart1_fck", | 1227 | .main_clk = "uart1_fck", |
@@ -1291,11 +1242,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { | |||
1291 | 1242 | ||
1292 | /* UART2 */ | 1243 | /* UART2 */ |
1293 | 1244 | ||
1294 | static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
1295 | { .irq = INT_24XX_UART2_IRQ, }, | ||
1296 | { .irq = -1 } | ||
1297 | }; | ||
1298 | |||
1299 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | 1245 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { |
1300 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | 1246 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, |
1301 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | 1247 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, |
@@ -1307,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { | |||
1307 | 1253 | ||
1308 | static struct omap_hwmod omap3xxx_uart2_hwmod = { | 1254 | static struct omap_hwmod omap3xxx_uart2_hwmod = { |
1309 | .name = "uart2", | 1255 | .name = "uart2", |
1310 | .mpu_irqs = uart2_mpu_irqs, | 1256 | .mpu_irqs = omap2_uart2_mpu_irqs, |
1311 | .sdma_reqs = uart2_sdma_reqs, | 1257 | .sdma_reqs = uart2_sdma_reqs, |
1312 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | 1258 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), |
1313 | .main_clk = "uart2_fck", | 1259 | .main_clk = "uart2_fck", |
@@ -1328,11 +1274,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { | |||
1328 | 1274 | ||
1329 | /* UART3 */ | 1275 | /* UART3 */ |
1330 | 1276 | ||
1331 | static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
1332 | { .irq = INT_24XX_UART3_IRQ, }, | ||
1333 | { .irq = -1 } | ||
1334 | }; | ||
1335 | |||
1336 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | 1277 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { |
1337 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | 1278 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, |
1338 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | 1279 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, |
@@ -1344,7 +1285,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { | |||
1344 | 1285 | ||
1345 | static struct omap_hwmod omap3xxx_uart3_hwmod = { | 1286 | static struct omap_hwmod omap3xxx_uart3_hwmod = { |
1346 | .name = "uart3", | 1287 | .name = "uart3", |
1347 | .mpu_irqs = uart3_mpu_irqs, | 1288 | .mpu_irqs = omap2_uart3_mpu_irqs, |
1348 | .sdma_reqs = uart3_sdma_reqs, | 1289 | .sdma_reqs = uart3_sdma_reqs, |
1349 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | 1290 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), |
1350 | .main_clk = "uart3_fck", | 1291 | .main_clk = "uart3_fck", |
@@ -1555,11 +1496,6 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { | |||
1555 | .sysc = &omap3xxx_dispc_sysc, | 1496 | .sysc = &omap3xxx_dispc_sysc, |
1556 | }; | 1497 | }; |
1557 | 1498 | ||
1558 | static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { | ||
1559 | { .irq = 25 }, | ||
1560 | { .irq = -1 } | ||
1561 | }; | ||
1562 | |||
1563 | /* l4_core -> dss_dispc */ | 1499 | /* l4_core -> dss_dispc */ |
1564 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { | 1500 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { |
1565 | .master = &omap3xxx_l4_core_hwmod, | 1501 | .master = &omap3xxx_l4_core_hwmod, |
@@ -1584,7 +1520,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { | |||
1584 | static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { | 1520 | static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { |
1585 | .name = "dss_dispc", | 1521 | .name = "dss_dispc", |
1586 | .class = &omap3xxx_dispc_hwmod_class, | 1522 | .class = &omap3xxx_dispc_hwmod_class, |
1587 | .mpu_irqs = omap3xxx_dispc_irqs, | 1523 | .mpu_irqs = omap2_dispc_irqs, |
1588 | .main_clk = "dss1_alwon_fck", | 1524 | .main_clk = "dss1_alwon_fck", |
1589 | .prcm = { | 1525 | .prcm = { |
1590 | .omap2 = { | 1526 | .omap2 = { |
@@ -1781,11 +1717,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { | |||
1781 | .fifo_depth = 8, /* bytes */ | 1717 | .fifo_depth = 8, /* bytes */ |
1782 | }; | 1718 | }; |
1783 | 1719 | ||
1784 | static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
1785 | { .irq = INT_24XX_I2C1_IRQ, }, | ||
1786 | { .irq = -1 } | ||
1787 | }; | ||
1788 | |||
1789 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | 1720 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { |
1790 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | 1721 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, |
1791 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | 1722 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, |
@@ -1797,7 +1728,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { | |||
1797 | 1728 | ||
1798 | static struct omap_hwmod omap3xxx_i2c1_hwmod = { | 1729 | static struct omap_hwmod omap3xxx_i2c1_hwmod = { |
1799 | .name = "i2c1", | 1730 | .name = "i2c1", |
1800 | .mpu_irqs = i2c1_mpu_irqs, | 1731 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
1801 | .sdma_reqs = i2c1_sdma_reqs, | 1732 | .sdma_reqs = i2c1_sdma_reqs, |
1802 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | 1733 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), |
1803 | .main_clk = "i2c1_fck", | 1734 | .main_clk = "i2c1_fck", |
@@ -1823,11 +1754,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { | |||
1823 | .fifo_depth = 8, /* bytes */ | 1754 | .fifo_depth = 8, /* bytes */ |
1824 | }; | 1755 | }; |
1825 | 1756 | ||
1826 | static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
1827 | { .irq = INT_24XX_I2C2_IRQ, }, | ||
1828 | { .irq = -1 } | ||
1829 | }; | ||
1830 | |||
1831 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | 1757 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { |
1832 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | 1758 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, |
1833 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | 1759 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, |
@@ -1839,7 +1765,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { | |||
1839 | 1765 | ||
1840 | static struct omap_hwmod omap3xxx_i2c2_hwmod = { | 1766 | static struct omap_hwmod omap3xxx_i2c2_hwmod = { |
1841 | .name = "i2c2", | 1767 | .name = "i2c2", |
1842 | .mpu_irqs = i2c2_mpu_irqs, | 1768 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
1843 | .sdma_reqs = i2c2_sdma_reqs, | 1769 | .sdma_reqs = i2c2_sdma_reqs, |
1844 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | 1770 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), |
1845 | .main_clk = "i2c2_fck", | 1771 | .main_clk = "i2c2_fck", |
@@ -2032,11 +1958,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { | |||
2032 | }; | 1958 | }; |
2033 | 1959 | ||
2034 | /* gpio1 */ | 1960 | /* gpio1 */ |
2035 | static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { | ||
2036 | { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ | ||
2037 | { .irq = -1 } | ||
2038 | }; | ||
2039 | |||
2040 | static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { | 1961 | static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { |
2041 | { .role = "dbclk", .clk = "gpio1_dbck", }, | 1962 | { .role = "dbclk", .clk = "gpio1_dbck", }, |
2042 | }; | 1963 | }; |
@@ -2048,7 +1969,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = { | |||
2048 | static struct omap_hwmod omap3xxx_gpio1_hwmod = { | 1969 | static struct omap_hwmod omap3xxx_gpio1_hwmod = { |
2049 | .name = "gpio1", | 1970 | .name = "gpio1", |
2050 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 1971 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
2051 | .mpu_irqs = omap3xxx_gpio1_irqs, | 1972 | .mpu_irqs = omap2_gpio1_irqs, |
2052 | .main_clk = "gpio1_ick", | 1973 | .main_clk = "gpio1_ick", |
2053 | .opt_clks = gpio1_opt_clks, | 1974 | .opt_clks = gpio1_opt_clks, |
2054 | .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), | 1975 | .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), |
@@ -2069,11 +1990,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { | |||
2069 | }; | 1990 | }; |
2070 | 1991 | ||
2071 | /* gpio2 */ | 1992 | /* gpio2 */ |
2072 | static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { | ||
2073 | { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ | ||
2074 | { .irq = -1 } | ||
2075 | }; | ||
2076 | |||
2077 | static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { | 1993 | static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { |
2078 | { .role = "dbclk", .clk = "gpio2_dbck", }, | 1994 | { .role = "dbclk", .clk = "gpio2_dbck", }, |
2079 | }; | 1995 | }; |
@@ -2085,7 +2001,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = { | |||
2085 | static struct omap_hwmod omap3xxx_gpio2_hwmod = { | 2001 | static struct omap_hwmod omap3xxx_gpio2_hwmod = { |
2086 | .name = "gpio2", | 2002 | .name = "gpio2", |
2087 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 2003 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
2088 | .mpu_irqs = omap3xxx_gpio2_irqs, | 2004 | .mpu_irqs = omap2_gpio2_irqs, |
2089 | .main_clk = "gpio2_ick", | 2005 | .main_clk = "gpio2_ick", |
2090 | .opt_clks = gpio2_opt_clks, | 2006 | .opt_clks = gpio2_opt_clks, |
2091 | .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), | 2007 | .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), |
@@ -2106,11 +2022,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { | |||
2106 | }; | 2022 | }; |
2107 | 2023 | ||
2108 | /* gpio3 */ | 2024 | /* gpio3 */ |
2109 | static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { | ||
2110 | { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ | ||
2111 | { .irq = -1 } | ||
2112 | }; | ||
2113 | |||
2114 | static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { | 2025 | static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { |
2115 | { .role = "dbclk", .clk = "gpio3_dbck", }, | 2026 | { .role = "dbclk", .clk = "gpio3_dbck", }, |
2116 | }; | 2027 | }; |
@@ -2122,7 +2033,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = { | |||
2122 | static struct omap_hwmod omap3xxx_gpio3_hwmod = { | 2033 | static struct omap_hwmod omap3xxx_gpio3_hwmod = { |
2123 | .name = "gpio3", | 2034 | .name = "gpio3", |
2124 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 2035 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
2125 | .mpu_irqs = omap3xxx_gpio3_irqs, | 2036 | .mpu_irqs = omap2_gpio3_irqs, |
2126 | .main_clk = "gpio3_ick", | 2037 | .main_clk = "gpio3_ick", |
2127 | .opt_clks = gpio3_opt_clks, | 2038 | .opt_clks = gpio3_opt_clks, |
2128 | .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), | 2039 | .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), |
@@ -2143,11 +2054,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { | |||
2143 | }; | 2054 | }; |
2144 | 2055 | ||
2145 | /* gpio4 */ | 2056 | /* gpio4 */ |
2146 | static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { | ||
2147 | { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ | ||
2148 | { .irq = -1 } | ||
2149 | }; | ||
2150 | |||
2151 | static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { | 2057 | static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { |
2152 | { .role = "dbclk", .clk = "gpio4_dbck", }, | 2058 | { .role = "dbclk", .clk = "gpio4_dbck", }, |
2153 | }; | 2059 | }; |
@@ -2159,7 +2065,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = { | |||
2159 | static struct omap_hwmod omap3xxx_gpio4_hwmod = { | 2065 | static struct omap_hwmod omap3xxx_gpio4_hwmod = { |
2160 | .name = "gpio4", | 2066 | .name = "gpio4", |
2161 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | 2067 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
2162 | .mpu_irqs = omap3xxx_gpio4_irqs, | 2068 | .mpu_irqs = omap2_gpio4_irqs, |
2163 | .main_clk = "gpio4_ick", | 2069 | .main_clk = "gpio4_ick", |
2164 | .opt_clks = gpio4_opt_clks, | 2070 | .opt_clks = gpio4_opt_clks, |
2165 | .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), | 2071 | .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), |
@@ -2287,14 +2193,6 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = { | |||
2287 | }; | 2193 | }; |
2288 | 2194 | ||
2289 | /* dma_system */ | 2195 | /* dma_system */ |
2290 | static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { | ||
2291 | { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
2292 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
2293 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
2294 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
2295 | { .irq = -1 } | ||
2296 | }; | ||
2297 | |||
2298 | static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { | 2196 | static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { |
2299 | { | 2197 | { |
2300 | .pa_start = 0x48056000, | 2198 | .pa_start = 0x48056000, |
@@ -2326,7 +2224,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = { | |||
2326 | static struct omap_hwmod omap3xxx_dma_system_hwmod = { | 2224 | static struct omap_hwmod omap3xxx_dma_system_hwmod = { |
2327 | .name = "dma", | 2225 | .name = "dma", |
2328 | .class = &omap3xxx_dma_hwmod_class, | 2226 | .class = &omap3xxx_dma_hwmod_class, |
2329 | .mpu_irqs = omap3xxx_dma_system_irqs, | 2227 | .mpu_irqs = omap2_dma_system_irqs, |
2330 | .main_clk = "core_l3_ick", | 2228 | .main_clk = "core_l3_ick", |
2331 | .prcm = { | 2229 | .prcm = { |
2332 | .omap2 = { | 2230 | .omap2 = { |
@@ -3044,11 +2942,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { | |||
3044 | }; | 2942 | }; |
3045 | 2943 | ||
3046 | /* mcspi1 */ | 2944 | /* mcspi1 */ |
3047 | static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { | ||
3048 | { .name = "irq", .irq = 65 }, | ||
3049 | { .irq = -1 } | ||
3050 | }; | ||
3051 | |||
3052 | static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { | 2945 | static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { |
3053 | { .name = "tx0", .dma_req = 35 }, | 2946 | { .name = "tx0", .dma_req = 35 }, |
3054 | { .name = "rx0", .dma_req = 36 }, | 2947 | { .name = "rx0", .dma_req = 36 }, |
@@ -3070,7 +2963,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | |||
3070 | 2963 | ||
3071 | static struct omap_hwmod omap34xx_mcspi1 = { | 2964 | static struct omap_hwmod omap34xx_mcspi1 = { |
3072 | .name = "mcspi1", | 2965 | .name = "mcspi1", |
3073 | .mpu_irqs = omap34xx_mcspi1_mpu_irqs, | 2966 | .mpu_irqs = omap2_mcspi1_mpu_irqs, |
3074 | .sdma_reqs = omap34xx_mcspi1_sdma_reqs, | 2967 | .sdma_reqs = omap34xx_mcspi1_sdma_reqs, |
3075 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), | 2968 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), |
3076 | .main_clk = "mcspi1_fck", | 2969 | .main_clk = "mcspi1_fck", |
@@ -3091,11 +2984,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { | |||
3091 | }; | 2984 | }; |
3092 | 2985 | ||
3093 | /* mcspi2 */ | 2986 | /* mcspi2 */ |
3094 | static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { | ||
3095 | { .name = "irq", .irq = 66 }, | ||
3096 | { .irq = -1 } | ||
3097 | }; | ||
3098 | |||
3099 | static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { | 2987 | static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { |
3100 | { .name = "tx0", .dma_req = 43 }, | 2988 | { .name = "tx0", .dma_req = 43 }, |
3101 | { .name = "rx0", .dma_req = 44 }, | 2989 | { .name = "rx0", .dma_req = 44 }, |
@@ -3113,7 +3001,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | |||
3113 | 3001 | ||
3114 | static struct omap_hwmod omap34xx_mcspi2 = { | 3002 | static struct omap_hwmod omap34xx_mcspi2 = { |
3115 | .name = "mcspi2", | 3003 | .name = "mcspi2", |
3116 | .mpu_irqs = omap34xx_mcspi2_mpu_irqs, | 3004 | .mpu_irqs = omap2_mcspi2_mpu_irqs, |
3117 | .sdma_reqs = omap34xx_mcspi2_sdma_reqs, | 3005 | .sdma_reqs = omap34xx_mcspi2_sdma_reqs, |
3118 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), | 3006 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), |
3119 | .main_clk = "mcspi2_fck", | 3007 | .main_clk = "mcspi2_fck", |
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 76a2f11e5f4e..1ac878c46af3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h | |||
@@ -49,6 +49,35 @@ extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; | |||
49 | extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; | 49 | extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; |
50 | extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; | 50 | extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; |
51 | 51 | ||
52 | /* Common IP block data across OMAP2xxx */ | ||
53 | extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; | ||
54 | |||
55 | /* Common IP block data across OMAP2/3 */ | ||
56 | extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; | ||
57 | extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[]; | ||
58 | extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[]; | ||
59 | extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[]; | ||
60 | extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[]; | ||
61 | extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[]; | ||
62 | extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[]; | ||
63 | extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[]; | ||
64 | extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[]; | ||
65 | extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[]; | ||
66 | extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[]; | ||
67 | extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[]; | ||
68 | extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[]; | ||
69 | extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[]; | ||
70 | extern struct omap_hwmod_irq_info omap2_dispc_irqs[]; | ||
71 | extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[]; | ||
72 | extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[]; | ||
73 | extern struct omap_hwmod_irq_info omap2_gpio1_irqs[]; | ||
74 | extern struct omap_hwmod_irq_info omap2_gpio2_irqs[]; | ||
75 | extern struct omap_hwmod_irq_info omap2_gpio3_irqs[]; | ||
76 | extern struct omap_hwmod_irq_info omap2_gpio4_irqs[]; | ||
77 | extern struct omap_hwmod_irq_info omap2_dma_system_irqs[]; | ||
78 | extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[]; | ||
79 | extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[]; | ||
80 | |||
52 | /* OMAP hwmod classes - forward declarations */ | 81 | /* OMAP hwmod classes - forward declarations */ |
53 | extern struct omap_hwmod_class l3_hwmod_class; | 82 | extern struct omap_hwmod_class l3_hwmod_class; |
54 | extern struct omap_hwmod_class l4_hwmod_class; | 83 | extern struct omap_hwmod_class l4_hwmod_class; |