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authorPaul Walmsley <paul@pwsan.com>2011-07-09 21:14:08 -0400
committerPaul Walmsley <paul@pwsan.com>2011-07-09 21:14:08 -0400
commit273b9465bc68d4f4bcdedc34411b231e26b48416 (patch)
tree48715a8535f1676b4dda99c6dac17b255dd7fa89 /arch/arm/mach-omap2/omap_hwmod_2420_data.c
parentd826ebfa49aeb8a8f4d216165e5e00826741ad9c (diff)
omap_hwmod: share identical omap_hwmod_class, omap_hwmod_class_sysconfig arrays
To reduce kernel source file data duplication, share struct omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2420_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c267
1 files changed, 30 insertions, 237 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 6acc01f58902..f3901abf2c28 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -274,24 +274,6 @@ static struct omap_hwmod omap2420_iva_hwmod = {
274 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 274 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
275}; 275};
276 276
277/* Timer Common */
278static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = {
279 .rev_offs = 0x0000,
280 .sysc_offs = 0x0010,
281 .syss_offs = 0x0014,
282 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
283 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
284 SYSC_HAS_AUTOIDLE),
285 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
286 .sysc_fields = &omap_hwmod_sysc_type1,
287};
288
289static struct omap_hwmod_class omap2420_timer_hwmod_class = {
290 .name = "timer",
291 .sysc = &omap2420_timer_sysc,
292 .rev = OMAP_TIMER_IP_VERSION_1,
293};
294
295/* timer1 */ 277/* timer1 */
296static struct omap_hwmod omap2420_timer1_hwmod; 278static struct omap_hwmod omap2420_timer1_hwmod;
297 279
@@ -334,7 +316,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
334 }, 316 },
335 .slaves = omap2420_timer1_slaves, 317 .slaves = omap2420_timer1_slaves,
336 .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), 318 .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves),
337 .class = &omap2420_timer_hwmod_class, 319 .class = &omap2xxx_timer_hwmod_class,
338 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 320 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
339}; 321};
340 322
@@ -371,7 +353,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
371 }, 353 },
372 .slaves = omap2420_timer2_slaves, 354 .slaves = omap2420_timer2_slaves,
373 .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), 355 .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves),
374 .class = &omap2420_timer_hwmod_class, 356 .class = &omap2xxx_timer_hwmod_class,
375 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 357 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
376}; 358};
377 359
@@ -408,7 +390,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
408 }, 390 },
409 .slaves = omap2420_timer3_slaves, 391 .slaves = omap2420_timer3_slaves,
410 .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), 392 .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves),
411 .class = &omap2420_timer_hwmod_class, 393 .class = &omap2xxx_timer_hwmod_class,
412 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 394 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
413}; 395};
414 396
@@ -445,7 +427,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
445 }, 427 },
446 .slaves = omap2420_timer4_slaves, 428 .slaves = omap2420_timer4_slaves,
447 .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), 429 .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves),
448 .class = &omap2420_timer_hwmod_class, 430 .class = &omap2xxx_timer_hwmod_class,
449 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 431 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
450}; 432};
451 433
@@ -482,7 +464,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
482 }, 464 },
483 .slaves = omap2420_timer5_slaves, 465 .slaves = omap2420_timer5_slaves,
484 .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), 466 .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves),
485 .class = &omap2420_timer_hwmod_class, 467 .class = &omap2xxx_timer_hwmod_class,
486 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 468 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
487}; 469};
488 470
@@ -520,7 +502,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
520 }, 502 },
521 .slaves = omap2420_timer6_slaves, 503 .slaves = omap2420_timer6_slaves,
522 .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), 504 .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves),
523 .class = &omap2420_timer_hwmod_class, 505 .class = &omap2xxx_timer_hwmod_class,
524 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 506 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
525}; 507};
526 508
@@ -557,7 +539,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
557 }, 539 },
558 .slaves = omap2420_timer7_slaves, 540 .slaves = omap2420_timer7_slaves,
559 .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), 541 .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves),
560 .class = &omap2420_timer_hwmod_class, 542 .class = &omap2xxx_timer_hwmod_class,
561 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 543 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
562}; 544};
563 545
@@ -594,7 +576,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
594 }, 576 },
595 .slaves = omap2420_timer8_slaves, 577 .slaves = omap2420_timer8_slaves,
596 .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), 578 .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves),
597 .class = &omap2420_timer_hwmod_class, 579 .class = &omap2xxx_timer_hwmod_class,
598 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 580 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
599}; 581};
600 582
@@ -631,7 +613,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
631 }, 613 },
632 .slaves = omap2420_timer9_slaves, 614 .slaves = omap2420_timer9_slaves,
633 .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), 615 .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves),
634 .class = &omap2420_timer_hwmod_class, 616 .class = &omap2xxx_timer_hwmod_class,
635 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 617 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
636}; 618};
637 619
@@ -668,7 +650,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
668 }, 650 },
669 .slaves = omap2420_timer10_slaves, 651 .slaves = omap2420_timer10_slaves,
670 .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), 652 .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves),
671 .class = &omap2420_timer_hwmod_class, 653 .class = &omap2xxx_timer_hwmod_class,
672 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 654 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
673}; 655};
674 656
@@ -705,7 +687,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
705 }, 687 },
706 .slaves = omap2420_timer11_slaves, 688 .slaves = omap2420_timer11_slaves,
707 .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), 689 .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves),
708 .class = &omap2420_timer_hwmod_class, 690 .class = &omap2xxx_timer_hwmod_class,
709 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 691 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
710}; 692};
711 693
@@ -742,7 +724,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = {
742 }, 724 },
743 .slaves = omap2420_timer12_slaves, 725 .slaves = omap2420_timer12_slaves,
744 .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), 726 .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves),
745 .class = &omap2420_timer_hwmod_class, 727 .class = &omap2xxx_timer_hwmod_class,
746 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 728 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
747}; 729};
748 730
@@ -764,27 +746,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
764 .user = OCP_USER_MPU | OCP_USER_SDMA, 746 .user = OCP_USER_MPU | OCP_USER_SDMA,
765}; 747};
766 748
767/*
768 * 'wd_timer' class
769 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
770 * overflow condition
771 */
772
773static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = {
774 .rev_offs = 0x0000,
775 .sysc_offs = 0x0010,
776 .syss_offs = 0x0014,
777 .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
778 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
779 .sysc_fields = &omap_hwmod_sysc_type1,
780};
781
782static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = {
783 .name = "wd_timer",
784 .sysc = &omap2420_wd_timer_sysc,
785 .pre_shutdown = &omap2_wd_timer_disable
786};
787
788/* wd_timer2 */ 749/* wd_timer2 */
789static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { 750static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {
790 &omap2420_l4_wkup__wd_timer2, 751 &omap2420_l4_wkup__wd_timer2,
@@ -792,7 +753,7 @@ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {
792 753
793static struct omap_hwmod omap2420_wd_timer2_hwmod = { 754static struct omap_hwmod omap2420_wd_timer2_hwmod = {
794 .name = "wd_timer2", 755 .name = "wd_timer2",
795 .class = &omap2420_wd_timer_hwmod_class, 756 .class = &omap2xxx_wd_timer_hwmod_class,
796 .main_clk = "mpu_wdt_fck", 757 .main_clk = "mpu_wdt_fck",
797 .prcm = { 758 .prcm = {
798 .omap2 = { 759 .omap2 = {
@@ -808,24 +769,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = {
808 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 769 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
809}; 770};
810 771
811/* UART */
812
813static struct omap_hwmod_class_sysconfig uart_sysc = {
814 .rev_offs = 0x50,
815 .sysc_offs = 0x54,
816 .syss_offs = 0x58,
817 .sysc_flags = (SYSC_HAS_SIDLEMODE |
818 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
819 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
820 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
821 .sysc_fields = &omap_hwmod_sysc_type1,
822};
823
824static struct omap_hwmod_class uart_class = {
825 .name = "uart",
826 .sysc = &uart_sysc,
827};
828
829/* UART1 */ 772/* UART1 */
830 773
831static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { 774static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
@@ -848,7 +791,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
848 }, 791 },
849 .slaves = omap2420_uart1_slaves, 792 .slaves = omap2420_uart1_slaves,
850 .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), 793 .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves),
851 .class = &uart_class, 794 .class = &omap2_uart_class,
852 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 795 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
853}; 796};
854 797
@@ -874,7 +817,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
874 }, 817 },
875 .slaves = omap2420_uart2_slaves, 818 .slaves = omap2420_uart2_slaves,
876 .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), 819 .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves),
877 .class = &uart_class, 820 .class = &omap2_uart_class,
878 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 821 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
879}; 822};
880 823
@@ -900,28 +843,10 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
900 }, 843 },
901 .slaves = omap2420_uart3_slaves, 844 .slaves = omap2420_uart3_slaves,
902 .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), 845 .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves),
903 .class = &uart_class, 846 .class = &omap2_uart_class,
904 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 847 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
905}; 848};
906 849
907/*
908 * 'dss' class
909 * display sub-system
910 */
911
912static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = {
913 .rev_offs = 0x0000,
914 .sysc_offs = 0x0010,
915 .syss_offs = 0x0014,
916 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
917 .sysc_fields = &omap_hwmod_sysc_type1,
918};
919
920static struct omap_hwmod_class omap2420_dss_hwmod_class = {
921 .name = "dss",
922 .sysc = &omap2420_dss_sysc,
923};
924
925/* dss */ 850/* dss */
926/* dss master ports */ 851/* dss master ports */
927static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { 852static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
@@ -955,7 +880,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
955 880
956static struct omap_hwmod omap2420_dss_core_hwmod = { 881static struct omap_hwmod omap2420_dss_core_hwmod = {
957 .name = "dss_core", 882 .name = "dss_core",
958 .class = &omap2420_dss_hwmod_class, 883 .class = &omap2_dss_hwmod_class,
959 .main_clk = "dss1_fck", /* instead of dss_fck */ 884 .main_clk = "dss1_fck", /* instead of dss_fck */
960 .sdma_reqs = omap2xxx_dss_sdma_chs, 885 .sdma_reqs = omap2xxx_dss_sdma_chs,
961 .prcm = { 886 .prcm = {
@@ -977,27 +902,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
977 .flags = HWMOD_NO_IDLEST, 902 .flags = HWMOD_NO_IDLEST,
978}; 903};
979 904
980/*
981 * 'dispc' class
982 * display controller
983 */
984
985static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = {
986 .rev_offs = 0x0000,
987 .sysc_offs = 0x0010,
988 .syss_offs = 0x0014,
989 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
990 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
991 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
992 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
993 .sysc_fields = &omap_hwmod_sysc_type1,
994};
995
996static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
997 .name = "dispc",
998 .sysc = &omap2420_dispc_sysc,
999};
1000
1001/* l4_core -> dss_dispc */ 905/* l4_core -> dss_dispc */
1002static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { 906static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
1003 .master = &omap2420_l4_core_hwmod, 907 .master = &omap2420_l4_core_hwmod,
@@ -1020,7 +924,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {
1020 924
1021static struct omap_hwmod omap2420_dss_dispc_hwmod = { 925static struct omap_hwmod omap2420_dss_dispc_hwmod = {
1022 .name = "dss_dispc", 926 .name = "dss_dispc",
1023 .class = &omap2420_dispc_hwmod_class, 927 .class = &omap2_dispc_hwmod_class,
1024 .mpu_irqs = omap2_dispc_irqs, 928 .mpu_irqs = omap2_dispc_irqs,
1025 .main_clk = "dss1_fck", 929 .main_clk = "dss1_fck",
1026 .prcm = { 930 .prcm = {
@@ -1038,26 +942,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
1038 .flags = HWMOD_NO_IDLEST, 942 .flags = HWMOD_NO_IDLEST,
1039}; 943};
1040 944
1041/*
1042 * 'rfbi' class
1043 * remote frame buffer interface
1044 */
1045
1046static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = {
1047 .rev_offs = 0x0000,
1048 .sysc_offs = 0x0010,
1049 .syss_offs = 0x0014,
1050 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1051 SYSC_HAS_AUTOIDLE),
1052 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1053 .sysc_fields = &omap_hwmod_sysc_type1,
1054};
1055
1056static struct omap_hwmod_class omap2420_rfbi_hwmod_class = {
1057 .name = "rfbi",
1058 .sysc = &omap2420_rfbi_sysc,
1059};
1060
1061/* l4_core -> dss_rfbi */ 945/* l4_core -> dss_rfbi */
1062static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { 946static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
1063 .master = &omap2420_l4_core_hwmod, 947 .master = &omap2420_l4_core_hwmod,
@@ -1080,7 +964,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
1080 964
1081static struct omap_hwmod omap2420_dss_rfbi_hwmod = { 965static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
1082 .name = "dss_rfbi", 966 .name = "dss_rfbi",
1083 .class = &omap2420_rfbi_hwmod_class, 967 .class = &omap2_rfbi_hwmod_class,
1084 .main_clk = "dss1_fck", 968 .main_clk = "dss1_fck",
1085 .prcm = { 969 .prcm = {
1086 .omap2 = { 970 .omap2 = {
@@ -1095,15 +979,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
1095 .flags = HWMOD_NO_IDLEST, 979 .flags = HWMOD_NO_IDLEST,
1096}; 980};
1097 981
1098/*
1099 * 'venc' class
1100 * video encoder
1101 */
1102
1103static struct omap_hwmod_class omap2420_venc_hwmod_class = {
1104 .name = "venc",
1105};
1106
1107/* l4_core -> dss_venc */ 982/* l4_core -> dss_venc */
1108static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { 983static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
1109 .master = &omap2420_l4_core_hwmod, 984 .master = &omap2420_l4_core_hwmod,
@@ -1127,7 +1002,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
1127 1002
1128static struct omap_hwmod omap2420_dss_venc_hwmod = { 1003static struct omap_hwmod omap2420_dss_venc_hwmod = {
1129 .name = "dss_venc", 1004 .name = "dss_venc",
1130 .class = &omap2420_venc_hwmod_class, 1005 .class = &omap2_venc_hwmod_class,
1131 .main_clk = "dss1_fck", 1006 .main_clk = "dss1_fck",
1132 .prcm = { 1007 .prcm = {
1133 .omap2 = { 1008 .omap2 = {
@@ -1292,27 +1167,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
1292 .dbck_flag = false, 1167 .dbck_flag = false,
1293}; 1168};
1294 1169
1295static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = {
1296 .rev_offs = 0x0000,
1297 .sysc_offs = 0x0010,
1298 .syss_offs = 0x0014,
1299 .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
1300 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1301 SYSS_HAS_RESET_STATUS),
1302 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1303 .sysc_fields = &omap_hwmod_sysc_type1,
1304};
1305
1306/*
1307 * 'gpio' class
1308 * general purpose io module
1309 */
1310static struct omap_hwmod_class omap242x_gpio_hwmod_class = {
1311 .name = "gpio",
1312 .sysc = &omap242x_gpio_sysc,
1313 .rev = 0,
1314};
1315
1316/* gpio1 */ 1170/* gpio1 */
1317static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { 1171static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
1318 &omap2420_l4_wkup__gpio1, 1172 &omap2420_l4_wkup__gpio1,
@@ -1334,7 +1188,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
1334 }, 1188 },
1335 .slaves = omap2420_gpio1_slaves, 1189 .slaves = omap2420_gpio1_slaves,
1336 .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), 1190 .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves),
1337 .class = &omap242x_gpio_hwmod_class, 1191 .class = &omap2xxx_gpio_hwmod_class,
1338 .dev_attr = &gpio_dev_attr, 1192 .dev_attr = &gpio_dev_attr,
1339 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 1193 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1340}; 1194};
@@ -1360,7 +1214,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
1360 }, 1214 },
1361 .slaves = omap2420_gpio2_slaves, 1215 .slaves = omap2420_gpio2_slaves,
1362 .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), 1216 .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves),
1363 .class = &omap242x_gpio_hwmod_class, 1217 .class = &omap2xxx_gpio_hwmod_class,
1364 .dev_attr = &gpio_dev_attr, 1218 .dev_attr = &gpio_dev_attr,
1365 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 1219 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1366}; 1220};
@@ -1386,7 +1240,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
1386 }, 1240 },
1387 .slaves = omap2420_gpio3_slaves, 1241 .slaves = omap2420_gpio3_slaves,
1388 .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), 1242 .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves),
1389 .class = &omap242x_gpio_hwmod_class, 1243 .class = &omap2xxx_gpio_hwmod_class,
1390 .dev_attr = &gpio_dev_attr, 1244 .dev_attr = &gpio_dev_attr,
1391 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 1245 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1392}; 1246};
@@ -1412,28 +1266,11 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
1412 }, 1266 },
1413 .slaves = omap2420_gpio4_slaves, 1267 .slaves = omap2420_gpio4_slaves,
1414 .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), 1268 .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves),
1415 .class = &omap242x_gpio_hwmod_class, 1269 .class = &omap2xxx_gpio_hwmod_class,
1416 .dev_attr = &gpio_dev_attr, 1270 .dev_attr = &gpio_dev_attr,
1417 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 1271 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1418}; 1272};
1419 1273
1420/* system dma */
1421static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
1422 .rev_offs = 0x0000,
1423 .sysc_offs = 0x002c,
1424 .syss_offs = 0x0028,
1425 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
1426 SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
1427 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1428 .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1429 .sysc_fields = &omap_hwmod_sysc_type1,
1430};
1431
1432static struct omap_hwmod_class omap2420_dma_hwmod_class = {
1433 .name = "dma",
1434 .sysc = &omap2420_dma_sysc,
1435};
1436
1437/* dma attributes */ 1274/* dma attributes */
1438static struct omap_dma_dev_attr dma_dev_attr = { 1275static struct omap_dma_dev_attr dma_dev_attr = {
1439 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 1276 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
@@ -1470,7 +1307,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
1470 1307
1471static struct omap_hwmod omap2420_dma_system_hwmod = { 1308static struct omap_hwmod omap2420_dma_system_hwmod = {
1472 .name = "dma", 1309 .name = "dma",
1473 .class = &omap2420_dma_hwmod_class, 1310 .class = &omap2xxx_dma_hwmod_class,
1474 .mpu_irqs = omap2_dma_system_irqs, 1311 .mpu_irqs = omap2_dma_system_irqs,
1475 .main_clk = "core_l3_ck", 1312 .main_clk = "core_l3_ck",
1476 .slaves = omap2420_dma_system_slaves, 1313 .slaves = omap2420_dma_system_slaves,
@@ -1482,27 +1319,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
1482 .flags = HWMOD_NO_IDLEST, 1319 .flags = HWMOD_NO_IDLEST,
1483}; 1320};
1484 1321
1485/*
1486 * 'mailbox' class
1487 * mailbox module allowing communication between the on-chip processors
1488 * using a queued mailbox-interrupt mechanism.
1489 */
1490
1491static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = {
1492 .rev_offs = 0x000,
1493 .sysc_offs = 0x010,
1494 .syss_offs = 0x014,
1495 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1496 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1497 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1498 .sysc_fields = &omap_hwmod_sysc_type1,
1499};
1500
1501static struct omap_hwmod_class omap2420_mailbox_hwmod_class = {
1502 .name = "mailbox",
1503 .sysc = &omap2420_mailbox_sysc,
1504};
1505
1506/* mailbox */ 1322/* mailbox */
1507static struct omap_hwmod omap2420_mailbox_hwmod; 1323static struct omap_hwmod omap2420_mailbox_hwmod;
1508static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { 1324static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
@@ -1526,7 +1342,7 @@ static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = {
1526 1342
1527static struct omap_hwmod omap2420_mailbox_hwmod = { 1343static struct omap_hwmod omap2420_mailbox_hwmod = {
1528 .name = "mailbox", 1344 .name = "mailbox",
1529 .class = &omap2420_mailbox_hwmod_class, 1345 .class = &omap2xxx_mailbox_hwmod_class,
1530 .mpu_irqs = omap2420_mailbox_irqs, 1346 .mpu_irqs = omap2420_mailbox_irqs,
1531 .main_clk = "mailboxes_ick", 1347 .main_clk = "mailboxes_ick",
1532 .prcm = { 1348 .prcm = {
@@ -1543,29 +1359,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
1543 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 1359 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1544}; 1360};
1545 1361
1546/*
1547 * 'mcspi' class
1548 * multichannel serial port interface (mcspi) / master/slave synchronous serial
1549 * bus
1550 */
1551
1552static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = {
1553 .rev_offs = 0x0000,
1554 .sysc_offs = 0x0010,
1555 .syss_offs = 0x0014,
1556 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1557 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1558 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1559 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1560 .sysc_fields = &omap_hwmod_sysc_type1,
1561};
1562
1563static struct omap_hwmod_class omap2420_mcspi_class = {
1564 .name = "mcspi",
1565 .sysc = &omap2420_mcspi_sysc,
1566 .rev = OMAP2_MCSPI_REV,
1567};
1568
1569/* mcspi1 */ 1362/* mcspi1 */
1570static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { 1363static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = {
1571 &omap2420_l4_core__mcspi1, 1364 &omap2420_l4_core__mcspi1,
@@ -1591,8 +1384,8 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
1591 }, 1384 },
1592 .slaves = omap2420_mcspi1_slaves, 1385 .slaves = omap2420_mcspi1_slaves,
1593 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), 1386 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves),
1594 .class = &omap2420_mcspi_class, 1387 .class = &omap2xxx_mcspi_class,
1595 .dev_attr = &omap_mcspi1_dev_attr, 1388 .dev_attr = &omap_mcspi1_dev_attr,
1596 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 1389 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1597}; 1390};
1598 1391
@@ -1621,8 +1414,8 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = {
1621 }, 1414 },
1622 .slaves = omap2420_mcspi2_slaves, 1415 .slaves = omap2420_mcspi2_slaves,
1623 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), 1416 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves),
1624 .class = &omap2420_mcspi_class, 1417 .class = &omap2xxx_mcspi_class,
1625 .dev_attr = &omap_mcspi2_dev_attr, 1418 .dev_attr = &omap_mcspi2_dev_attr,
1626 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 1419 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1627}; 1420};
1628 1421