diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-16 14:25:32 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-16 14:25:32 -0400 |
commit | 8ef50901d3c619127858b7d7f614fcab45e09d6b (patch) | |
tree | e75a0d48029d4a5857033e4edf1cd572a5a3fc62 /arch/arm/mach-omap1 | |
parent | 435263702ef0fc9ffdc6301a71c03b1d9ac0f1e0 (diff) | |
parent | 2502991560dc8244dbe10e48473d85722c1e2ec1 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (51 commits)
[ARM] 5308/1: Fix Viper ISA IRQ handling
[ARM] 5307/1: pxa: fix CM-X2XX PCMCIA build error
[ARM] 5306/1: pxa: fix build error on CM-X270
[ARM] 5302/1: ARM: OMAP: Revert omap3 WDT changes to avoid merge conflict
[ARM] 5305/1: ARM: OMAP: Fix compile of McBSP by removing unnecessary check
[ARM] 5301/1: ARM: OMAP: Add missing irq defines
ARM: OMAP3: Add default kernel config for OMAP LDP
ARM: OMAP3: Add basic board support for OMAP LDP
ARM: OMAP3: Defconfig for the Gumstix Overo board (rev 3)
ARM: OMAP3: Add support for the Gumstix Overo board (rev 3)
ARM: OMAP3: Add Beagle defconfig
ARM: OMAP3: Add minimal Beagle board support
ARM: OMAP3: Add minimal omap3430 support
ARM: OMAP2: Fix sparse, checkpatch warnings in OMAP2/3 IRQ code
ARM: OMAP: Fixes to omap_mcbsp_request function
ARM: OMAP: Add support for OMAP2430 in McBSP
ARM: OMAP: Add support for McBSP devices 3 - 5 on 34xx
ARM: OMAP: Allocate McBSP devices dynamically
Fix sections for omap-mcbsp platform driver
[ARM] S3C24XX: Additional include moves
...
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r-- | arch/arm/mach-omap1/clock.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap1/devices.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap1/mcbsp.c | 45 | ||||
-rw-r--r-- | arch/arm/mach-omap1/serial.c | 12 |
5 files changed, 27 insertions, 48 deletions
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 478c2c9a22cb..5fba20731710 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -201,7 +201,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) | |||
201 | return -EINVAL; | 201 | return -EINVAL; |
202 | 202 | ||
203 | parent = clk->parent; | 203 | parent = clk->parent; |
204 | if (unlikely(parent == 0)) | 204 | if (unlikely(parent == NULL)) |
205 | return -EIO; | 205 | return -EIO; |
206 | 206 | ||
207 | realrate = parent->rate; | 207 | realrate = parent->rate; |
@@ -499,7 +499,7 @@ static int omap1_clk_enable_generic(struct clk *clk) | |||
499 | if (clk->flags & ALWAYS_ENABLED) | 499 | if (clk->flags & ALWAYS_ENABLED) |
500 | return 0; | 500 | return 0; |
501 | 501 | ||
502 | if (unlikely(clk->enable_reg == 0)) { | 502 | if (unlikely(clk->enable_reg == NULL)) { |
503 | printk(KERN_ERR "clock.c: Enable for %s without enable code\n", | 503 | printk(KERN_ERR "clock.c: Enable for %s without enable code\n", |
504 | clk->name); | 504 | clk->name); |
505 | return -EINVAL; | 505 | return -EINVAL; |
@@ -535,7 +535,7 @@ static void omap1_clk_disable_generic(struct clk *clk) | |||
535 | __u16 regval16; | 535 | __u16 regval16; |
536 | __u32 regval32; | 536 | __u32 regval32; |
537 | 537 | ||
538 | if (clk->enable_reg == 0) | 538 | if (clk->enable_reg == NULL) |
539 | return; | 539 | return; |
540 | 540 | ||
541 | if (clk->flags & ENABLE_REG_32BIT) { | 541 | if (clk->flags & ENABLE_REG_32BIT) { |
@@ -577,7 +577,7 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) | |||
577 | return clk->parent->rate / (1 << dsor_exp); | 577 | return clk->parent->rate / (1 << dsor_exp); |
578 | } | 578 | } |
579 | 579 | ||
580 | if(clk->round_rate != 0) | 580 | if (clk->round_rate != NULL) |
581 | return clk->round_rate(clk, rate); | 581 | return clk->round_rate(clk, rate); |
582 | 582 | ||
583 | return clk->rate; | 583 | return clk->rate; |
@@ -625,7 +625,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk) | |||
625 | 625 | ||
626 | /* Clocks in the DSP domain need api_ck. Just assume bootloader | 626 | /* Clocks in the DSP domain need api_ck. Just assume bootloader |
627 | * has not enabled any DSP clocks */ | 627 | * has not enabled any DSP clocks */ |
628 | if ((u32)clk->enable_reg == DSP_IDLECT2) { | 628 | if (clk->enable_reg == DSP_IDLECT2) { |
629 | printk(KERN_INFO "Skipping reset check for DSP domain " | 629 | printk(KERN_INFO "Skipping reset check for DSP domain " |
630 | "clock \"%s\"\n", clk->name); | 630 | "clock \"%s\"\n", clk->name); |
631 | return; | 631 | return; |
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 6eadf72828d8..5635b511ab6f 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h | |||
@@ -324,7 +324,7 @@ static struct clk dspper_ck = { | |||
324 | .parent = &ck_dpll1, | 324 | .parent = &ck_dpll1, |
325 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 325 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
326 | RATE_CKCTL | VIRTUAL_IO_ADDRESS, | 326 | RATE_CKCTL | VIRTUAL_IO_ADDRESS, |
327 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 327 | .enable_reg = DSP_IDLECT2, |
328 | .enable_bit = EN_PERCK, | 328 | .enable_bit = EN_PERCK, |
329 | .rate_offset = CKCTL_PERDIV_OFFSET, | 329 | .rate_offset = CKCTL_PERDIV_OFFSET, |
330 | .recalc = &omap1_ckctl_recalc_dsp_domain, | 330 | .recalc = &omap1_ckctl_recalc_dsp_domain, |
@@ -338,7 +338,7 @@ static struct clk dspxor_ck = { | |||
338 | .parent = &ck_ref, | 338 | .parent = &ck_ref, |
339 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 339 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
340 | VIRTUAL_IO_ADDRESS, | 340 | VIRTUAL_IO_ADDRESS, |
341 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 341 | .enable_reg = DSP_IDLECT2, |
342 | .enable_bit = EN_XORPCK, | 342 | .enable_bit = EN_XORPCK, |
343 | .recalc = &followparent_recalc, | 343 | .recalc = &followparent_recalc, |
344 | .enable = &omap1_clk_enable_dsp_domain, | 344 | .enable = &omap1_clk_enable_dsp_domain, |
@@ -350,7 +350,7 @@ static struct clk dsptim_ck = { | |||
350 | .parent = &ck_ref, | 350 | .parent = &ck_ref, |
351 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 351 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
352 | VIRTUAL_IO_ADDRESS, | 352 | VIRTUAL_IO_ADDRESS, |
353 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 353 | .enable_reg = DSP_IDLECT2, |
354 | .enable_bit = EN_DSPTIMCK, | 354 | .enable_bit = EN_DSPTIMCK, |
355 | .recalc = &followparent_recalc, | 355 | .recalc = &followparent_recalc, |
356 | .enable = &omap1_clk_enable_dsp_domain, | 356 | .enable = &omap1_clk_enable_dsp_domain, |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 99982d3380c9..e382b438c64e 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
@@ -101,7 +101,7 @@ static inline void omap_init_mbox(void) { } | |||
101 | 101 | ||
102 | #if defined(CONFIG_OMAP_STI) | 102 | #if defined(CONFIG_OMAP_STI) |
103 | 103 | ||
104 | #define OMAP1_STI_BASE IO_ADDRESS(0xfffea000) | 104 | #define OMAP1_STI_BASE 0xfffea000 |
105 | #define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) | 105 | #define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) |
106 | 106 | ||
107 | static struct resource sti_resources[] = { | 107 | static struct resource sti_resources[] = { |
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 2baeaeb0c900..7de7c6915584 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
@@ -103,30 +103,6 @@ static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) | |||
103 | { } | 103 | { } |
104 | #endif | 104 | #endif |
105 | 105 | ||
106 | static int omap1_mcbsp_check(unsigned int id) | ||
107 | { | ||
108 | /* REVISIT: Check correctly for number of registered McBSPs */ | ||
109 | if (cpu_is_omap730()) { | ||
110 | if (id > OMAP_MAX_MCBSP_COUNT - 2) { | ||
111 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", | ||
112 | id + 1); | ||
113 | return -ENODEV; | ||
114 | } | ||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | if (cpu_is_omap15xx() || cpu_is_omap16xx()) { | ||
119 | if (id > OMAP_MAX_MCBSP_COUNT - 1) { | ||
120 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", | ||
121 | id + 1); | ||
122 | return -ENODEV; | ||
123 | } | ||
124 | return 0; | ||
125 | } | ||
126 | |||
127 | return -ENODEV; | ||
128 | } | ||
129 | |||
130 | static void omap1_mcbsp_request(unsigned int id) | 106 | static void omap1_mcbsp_request(unsigned int id) |
131 | { | 107 | { |
132 | /* | 108 | /* |
@@ -151,7 +127,6 @@ static void omap1_mcbsp_free(unsigned int id) | |||
151 | } | 127 | } |
152 | 128 | ||
153 | static struct omap_mcbsp_ops omap1_mcbsp_ops = { | 129 | static struct omap_mcbsp_ops omap1_mcbsp_ops = { |
154 | .check = omap1_mcbsp_check, | ||
155 | .request = omap1_mcbsp_request, | 130 | .request = omap1_mcbsp_request, |
156 | .free = omap1_mcbsp_free, | 131 | .free = omap1_mcbsp_free, |
157 | }; | 132 | }; |
@@ -160,7 +135,6 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { | |||
160 | static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { | 135 | static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { |
161 | { | 136 | { |
162 | .phys_base = OMAP730_MCBSP1_BASE, | 137 | .phys_base = OMAP730_MCBSP1_BASE, |
163 | .virt_base = io_p2v(OMAP730_MCBSP1_BASE), | ||
164 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, | 138 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, |
165 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, | 139 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, |
166 | .rx_irq = INT_730_McBSP1RX, | 140 | .rx_irq = INT_730_McBSP1RX, |
@@ -169,7 +143,6 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { | |||
169 | }, | 143 | }, |
170 | { | 144 | { |
171 | .phys_base = OMAP730_MCBSP2_BASE, | 145 | .phys_base = OMAP730_MCBSP2_BASE, |
172 | .virt_base = io_p2v(OMAP730_MCBSP2_BASE), | ||
173 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, | 146 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, |
174 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, | 147 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, |
175 | .rx_irq = INT_730_McBSP2RX, | 148 | .rx_irq = INT_730_McBSP2RX, |
@@ -187,7 +160,6 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { | |||
187 | static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | 160 | static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { |
188 | { | 161 | { |
189 | .phys_base = OMAP1510_MCBSP1_BASE, | 162 | .phys_base = OMAP1510_MCBSP1_BASE, |
190 | .virt_base = OMAP1510_MCBSP1_BASE, | ||
191 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, | 163 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, |
192 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, | 164 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, |
193 | .rx_irq = INT_McBSP1RX, | 165 | .rx_irq = INT_McBSP1RX, |
@@ -197,7 +169,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | |||
197 | }, | 169 | }, |
198 | { | 170 | { |
199 | .phys_base = OMAP1510_MCBSP2_BASE, | 171 | .phys_base = OMAP1510_MCBSP2_BASE, |
200 | .virt_base = io_p2v(OMAP1510_MCBSP2_BASE), | ||
201 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, | 172 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, |
202 | .dma_tx_sync = OMAP_DMA_MCBSP2_TX, | 173 | .dma_tx_sync = OMAP_DMA_MCBSP2_TX, |
203 | .rx_irq = INT_1510_SPI_RX, | 174 | .rx_irq = INT_1510_SPI_RX, |
@@ -206,7 +177,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | |||
206 | }, | 177 | }, |
207 | { | 178 | { |
208 | .phys_base = OMAP1510_MCBSP3_BASE, | 179 | .phys_base = OMAP1510_MCBSP3_BASE, |
209 | .virt_base = OMAP1510_MCBSP3_BASE, | ||
210 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, | 180 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, |
211 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, | 181 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, |
212 | .rx_irq = INT_McBSP3RX, | 182 | .rx_irq = INT_McBSP3RX, |
@@ -225,7 +195,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { | |||
225 | static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | 195 | static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { |
226 | { | 196 | { |
227 | .phys_base = OMAP1610_MCBSP1_BASE, | 197 | .phys_base = OMAP1610_MCBSP1_BASE, |
228 | .virt_base = OMAP1610_MCBSP1_BASE, | ||
229 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, | 198 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, |
230 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, | 199 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, |
231 | .rx_irq = INT_McBSP1RX, | 200 | .rx_irq = INT_McBSP1RX, |
@@ -235,7 +204,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | |||
235 | }, | 204 | }, |
236 | { | 205 | { |
237 | .phys_base = OMAP1610_MCBSP2_BASE, | 206 | .phys_base = OMAP1610_MCBSP2_BASE, |
238 | .virt_base = io_p2v(OMAP1610_MCBSP2_BASE), | ||
239 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, | 207 | .dma_rx_sync = OMAP_DMA_MCBSP2_RX, |
240 | .dma_tx_sync = OMAP_DMA_MCBSP2_TX, | 208 | .dma_tx_sync = OMAP_DMA_MCBSP2_TX, |
241 | .rx_irq = INT_1610_McBSP2_RX, | 209 | .rx_irq = INT_1610_McBSP2_RX, |
@@ -244,7 +212,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | |||
244 | }, | 212 | }, |
245 | { | 213 | { |
246 | .phys_base = OMAP1610_MCBSP3_BASE, | 214 | .phys_base = OMAP1610_MCBSP3_BASE, |
247 | .virt_base = OMAP1610_MCBSP3_BASE, | ||
248 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, | 215 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, |
249 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, | 216 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, |
250 | .rx_irq = INT_McBSP3RX, | 217 | .rx_irq = INT_McBSP3RX, |
@@ -271,6 +238,18 @@ int __init omap1_mcbsp_init(void) | |||
271 | } | 238 | } |
272 | 239 | ||
273 | if (cpu_is_omap730()) | 240 | if (cpu_is_omap730()) |
241 | omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; | ||
242 | if (cpu_is_omap15xx()) | ||
243 | omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; | ||
244 | if (cpu_is_omap16xx()) | ||
245 | omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ; | ||
246 | |||
247 | mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), | ||
248 | GFP_KERNEL); | ||
249 | if (!mcbsp_ptr) | ||
250 | return -ENOMEM; | ||
251 | |||
252 | if (cpu_is_omap730()) | ||
274 | omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, | 253 | omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, |
275 | OMAP730_MCBSP_PDATA_SZ); | 254 | OMAP730_MCBSP_PDATA_SZ); |
276 | 255 | ||
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index aefc967fc003..528691d5cb51 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
@@ -67,8 +67,8 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) | |||
67 | 67 | ||
68 | static struct plat_serial8250_port serial_platform_data[] = { | 68 | static struct plat_serial8250_port serial_platform_data[] = { |
69 | { | 69 | { |
70 | .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE), | 70 | .membase = IO_ADDRESS(OMAP_UART1_BASE), |
71 | .mapbase = (unsigned long)OMAP_UART1_BASE, | 71 | .mapbase = OMAP_UART1_BASE, |
72 | .irq = INT_UART1, | 72 | .irq = INT_UART1, |
73 | .flags = UPF_BOOT_AUTOCONF, | 73 | .flags = UPF_BOOT_AUTOCONF, |
74 | .iotype = UPIO_MEM, | 74 | .iotype = UPIO_MEM, |
@@ -76,8 +76,8 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
76 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 76 | .uartclk = OMAP16XX_BASE_BAUD * 16, |
77 | }, | 77 | }, |
78 | { | 78 | { |
79 | .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE), | 79 | .membase = IO_ADDRESS(OMAP_UART2_BASE), |
80 | .mapbase = (unsigned long)OMAP_UART2_BASE, | 80 | .mapbase = OMAP_UART2_BASE, |
81 | .irq = INT_UART2, | 81 | .irq = INT_UART2, |
82 | .flags = UPF_BOOT_AUTOCONF, | 82 | .flags = UPF_BOOT_AUTOCONF, |
83 | .iotype = UPIO_MEM, | 83 | .iotype = UPIO_MEM, |
@@ -85,8 +85,8 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
85 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 85 | .uartclk = OMAP16XX_BASE_BAUD * 16, |
86 | }, | 86 | }, |
87 | { | 87 | { |
88 | .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE), | 88 | .membase = IO_ADDRESS(OMAP_UART3_BASE), |
89 | .mapbase = (unsigned long)OMAP_UART3_BASE, | 89 | .mapbase = OMAP_UART3_BASE, |
90 | .irq = INT_UART3, | 90 | .irq = INT_UART3, |
91 | .flags = UPF_BOOT_AUTOCONF, | 91 | .flags = UPF_BOOT_AUTOCONF, |
92 | .iotype = UPIO_MEM, | 92 | .iotype = UPIO_MEM, |