Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master

59 files changed, 3012 insertions, 1492 deletions

diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 55ecc01ea206..27f489747bbd 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -11,6 +11,7 @@ config ARCH_OMAP850
         depends on ARCH_OMAP1
         bool "OMAP850 Based System"
         select CPU_ARM926T
+        select ARCH_OMAP_OTG
 
 config ARCH_OMAP15XX
         depends on ARCH_OMAP1
@@ -56,6 +57,12 @@ config MACH_OMAP_HTCWIZARD
         help
           HTC Wizard smartphone support (AKA QTEK 9100, ...)
 
+config MACH_HERALD
+        bool "HTC Herald"
+        depends on ARCH_OMAP850
+        help
+          HTC Herald smartphone support (AKA T-Mobile Wing, ...)
+
 config MACH_OMAP_OSK
         bool "TI OSK Support"
         depends on ARCH_OMAP1 && ARCH_OMAP16XX
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 6867cd3ad0b4..b6a537c875b8 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,8 @@
 #
 
 # Common support
-obj-y := io.o id.o sram.o clock.o irq.o mux.o serial.o devices.o
+obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o
+obj-y += clock.o clock_data.o opp_data.o
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
@@ -17,6 +18,9 @@ obj-$(CONFIG_PM) += pm.o sleep.o
 obj-$(CONFIG_OMAP_MBOX_FWK)     += mailbox_mach.o
 mailbox_mach-objs               := mailbox.o
 
+i2c-omap-$(CONFIG_I2C_OMAP)             := i2c.o
+obj-y                                   += $(i2c-omap-m) $(i2c-omap-y)
+
 led-y := leds.o
 
 # Specific board support
@@ -34,6 +38,7 @@ obj-$(CONFIG_MACH_OMAP_PALMTT)		+= board-palmtt.o
 obj-$(CONFIG_MACH_NOKIA770)             += board-nokia770.o
 obj-$(CONFIG_MACH_AMS_DELTA)            += board-ams-delta.o
 obj-$(CONFIG_MACH_SX1)                  += board-sx1.o board-sx1-mmc.o
+obj-$(CONFIG_MACH_HERALD)               += board-htcherald.o
 
 ifeq ($(CONFIG_ARCH_OMAP15XX),y)
 # Innovator-1510 FPGA
@@ -47,3 +52,7 @@ led-$(CONFIG_MACH_OMAP_INNOVATOR)	+= leds-innovator.o
 led-$(CONFIG_MACH_OMAP_PERSEUS2)        += leds-h2p2-debug.o
 led-$(CONFIG_MACH_OMAP_OSK)             += leds-osk.o
 obj-$(CONFIG_LEDS)                      += $(led-y)
+
+ifneq ($(CONFIG_FB_OMAP),)
+obj-y += lcd_dma.o
+endif
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 8ad5cc3e83e3..7fc11c34b696 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -25,13 +25,13 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <mach/board-ams-delta.h>
+#include <plat/board-ams-delta.h>
 #include <mach/gpio.h>
-#include <mach/keypad.h>
-#include <mach/mux.h>
-#include <mach/usb.h>
-#include <mach/board.h>
-#include <mach/common.h>
+#include <plat/keypad.h>
+#include <plat/mux.h>
+#include <plat/usb.h>
+#include <plat/board.h>
+#include <plat/common.h>
 
 static u8 ams_delta_latch1_reg;
 static u16 ams_delta_latch2_reg;
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index a7ead1b93226..096f2ed102cb 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -18,22 +18,23 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/input.h>
+#include <linux/smc91x.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include <mach/tc.h>
+#include <plat/tc.h>
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/fpga.h>
-#include <mach/nand.h>
-#include <mach/keypad.h>
-#include <mach/common.h>
-#include <mach/board.h>
+#include <plat/mux.h>
+#include <plat/flash.h>
+#include <plat/fpga.h>
+#include <plat/keypad.h>
+#include <plat/common.h>
+#include <plat/board.h>
 
 /* fsample is pretty close to p2-sample */
 
@@ -100,6 +101,12 @@ static int fsample_keymap[] = {
         0
 };
 
+static struct smc91x_platdata smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         [0] = {
                 .start  = H2P2_DBG_FPGA_ETHR_START,     /* Physical */
@@ -107,7 +114,7 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = INT_730_MPU_EXT_NIRQ,
+                .start  = INT_7XX_MPU_EXT_NIRQ,
                 .end    = 0,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
@@ -144,9 +151,9 @@ static struct mtd_partition nor_partitions[] = {
         },
 };
 
-static struct flash_platform_data nor_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data nor_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = nor_partitions,
         .nr_parts       = ARRAY_SIZE(nor_partitions),
 };
@@ -158,7 +165,7 @@ static struct resource nor_resource = {
 };
 
 static struct platform_device nor_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &nor_data,
@@ -167,8 +174,40 @@ static struct platform_device nor_device = {
         .resource       = &nor_resource,
 };
 
-static struct omap_nand_platform_data nand_data = {
-        .options        = NAND_SAMSUNG_LP_OPTIONS,
+static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+        struct nand_chip *this = mtd->priv;
+        unsigned long mask;
+
+        if (cmd == NAND_CMD_NONE)
+                return;
+
+        mask = (ctrl & NAND_CLE) ? 0x02 : 0;
+        if (ctrl & NAND_ALE)
+                mask |= 0x04;
+        writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
+}
+
+#define FSAMPLE_NAND_RB_GPIO_PIN        62
+
+static int nand_dev_ready(struct mtd_info *mtd)
+{
+        return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
+}
+
+static const char *part_probes[] = { "cmdlinepart", NULL };
+
+static struct platform_nand_data nand_data = {
+        .chip   = {
+                .nr_chips               = 1,
+                .chip_offset            = 0,
+                .options                = NAND_SAMSUNG_LP_OPTIONS,
+                .part_probe_types       = part_probes,
+        },
+        .ctrl   = {
+                .cmd_ctrl       = nand_cmd_ctl,
+                .dev_ready      = nand_dev_ready,
+        },
 };
 
 static struct resource nand_resource = {
@@ -178,7 +217,7 @@ static struct resource nand_resource = {
 };
 
 static struct platform_device nand_device = {
-        .name           = "omapnand",
+        .name           = "gen_nand",
         .id             = 0,
         .dev            = {
                 .platform_data  = &nand_data,
@@ -190,14 +229,17 @@ static struct platform_device nand_device = {
 static struct platform_device smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
         .num_resources  = ARRAY_SIZE(smc91x_resources),
         .resource       = smc91x_resources,
 };
 
 static struct resource kp_resources[] = {
         [0] = {
-                .start  = INT_730_MPUIO_KEYPAD,
-                .end    = INT_730_MPUIO_KEYPAD,
+                .start  = INT_7XX_MPUIO_KEYPAD,
+                .end    = INT_7XX_MPUIO_KEYPAD,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -233,13 +275,6 @@ static struct platform_device *devices[] __initdata = {
         &lcd_device,
 };
 
-#define P2_NAND_RB_GPIO_PIN     62
-
-static int nand_dev_ready(struct omap_nand_platform_data *data)
-{
-        return gpio_get_value(P2_NAND_RB_GPIO_PIN);
-}
-
 static struct omap_lcd_config fsample_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
@@ -250,9 +285,9 @@ static struct omap_board_config_kernel fsample_config[] = {
 
 static void __init omap_fsample_init(void)
 {
-        if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
+        if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
                 BUG();
-        nand_data.dev_ready = nand_dev_ready;
+        gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
 
         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
@@ -309,7 +344,7 @@ static void __init omap_fsample_map_io(void)
         /*
          * Hold GSM Reset until needed
          */
-        omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
+        omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
 
         /*
          * UARTs -> done automagically by 8250 driver
@@ -320,21 +355,21 @@ static void __init omap_fsample_map_io(void)
          */
 
         /* Flash: CS0 timings setup */
-        omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
-        omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
+        omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
+        omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
 
         /*
          * Ethernet support through the debug board
          * CS1 timings setup
          */
-        omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
-        omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
+        omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
+        omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
 
         /*
          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
          * It is used as the Ethernet controller interrupt
          */
-        omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
+        omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
 }
 
 MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 6c8a41f20e51..e1195a3467b8 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -23,10 +23,10 @@
 #include <asm/mach/map.h>
 
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/usb.h>
-#include <mach/board.h>
-#include <mach/common.h>
+#include <plat/mux.h>
+#include <plat/usb.h>
+#include <plat/board.h>
+#include <plat/common.h>
 
 static void __init omap_generic_init_irq(void)
 {
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index 46098f546824..b30c4990744d 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -16,7 +16,7 @@
 
 #include <linux/i2c/tps65010.h>
 
-#include <mach/mmc.h>
+#include <plat/mmc.h>
 #include <mach/gpio.h>
 
 #include "board-h2.h"
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index aab860307dca..d1100e4f65ac 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -26,25 +26,26 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/input.h>
 #include <linux/i2c/tps65010.h>
+#include <linux/smc91x.h>
 
 #include <mach/hardware.h>
 #include <asm/gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include <mach/mux.h>
-#include <mach/dma.h>
-#include <mach/tc.h>
-#include <mach/nand.h>
-#include <mach/irda.h>
-#include <mach/usb.h>
-#include <mach/keypad.h>
-#include <mach/common.h>
+#include <plat/mux.h>
+#include <plat/dma.h>
+#include <plat/tc.h>
+#include <plat/irda.h>
+#include <plat/usb.h>
+#include <plat/keypad.h>
+#include <plat/common.h>
+#include <plat/flash.h>
 
 #include "board-h2.h"
 
@@ -121,9 +122,9 @@ static struct mtd_partition h2_nor_partitions[] = {
         }
 };
 
-static struct flash_platform_data h2_nor_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data h2_nor_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = h2_nor_partitions,
         .nr_parts       = ARRAY_SIZE(h2_nor_partitions),
 };
@@ -134,7 +135,7 @@ static struct resource h2_nor_resource = {
 };
 
 static struct platform_device h2_nor_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &h2_nor_data,
@@ -179,11 +180,43 @@ static struct mtd_partition h2_nand_partitions[] = {
         },
 };
 
-/* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
-static struct omap_nand_platform_data h2_nand_data = {
-        .options        = NAND_SAMSUNG_LP_OPTIONS,
-        .parts          = h2_nand_partitions,
-        .nr_parts       = ARRAY_SIZE(h2_nand_partitions),
+static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+        struct nand_chip *this = mtd->priv;
+        unsigned long mask;
+
+        if (cmd == NAND_CMD_NONE)
+                return;
+
+        mask = (ctrl & NAND_CLE) ? 0x02 : 0;
+        if (ctrl & NAND_ALE)
+                mask |= 0x04;
+        writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
+}
+
+#define H2_NAND_RB_GPIO_PIN     62
+
+static int h2_nand_dev_ready(struct mtd_info *mtd)
+{
+        return gpio_get_value(H2_NAND_RB_GPIO_PIN);
+}
+
+static const char *h2_part_probes[] = { "cmdlinepart", NULL };
+
+struct platform_nand_data h2_nand_platdata = {
+        .chip   = {
+                .nr_chips               = 1,
+                .chip_offset            = 0,
+                .nr_partitions          = ARRAY_SIZE(h2_nand_partitions),
+                .partitions             = h2_nand_partitions,
+                .options                = NAND_SAMSUNG_LP_OPTIONS,
+                .part_probe_types       = h2_part_probes,
+        },
+        .ctrl   = {
+                .cmd_ctrl       = h2_nand_cmd_ctl,
+                .dev_ready      = h2_nand_dev_ready,
+
+        },
 };
 
 static struct resource h2_nand_resource = {
@@ -191,15 +224,21 @@ static struct resource h2_nand_resource = {
 };
 
 static struct platform_device h2_nand_device = {
-        .name           = "omapnand",
+        .name           = "gen_nand",
         .id             = 0,
         .dev            = {
-                .platform_data  = &h2_nand_data,
+                .platform_data  = &h2_nand_platdata,
         },
         .num_resources  = 1,
         .resource       = &h2_nand_resource,
 };
 
+static struct smc91x_platdata h2_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
 static struct resource h2_smc91x_resources[] = {
         [0] = {
                 .start  = OMAP1610_ETHR_START,          /* Physical */
@@ -216,6 +255,9 @@ static struct resource h2_smc91x_resources[] = {
 static struct platform_device h2_smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
+        .dev    = {
+                .platform_data  = &h2_smc91x_info,
+        },
         .num_resources  = ARRAY_SIZE(h2_smc91x_resources),
         .resource       = h2_smc91x_resources,
 };
@@ -368,8 +410,6 @@ static struct omap_board_config_kernel h2_config[] __initdata = {
         { OMAP_TAG_LCD,         &h2_lcd_config },
 };
 
-#define H2_NAND_RB_GPIO_PIN     62
-
 static void __init h2_init(void)
 {
         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index 5e8877ce35e0..54b0f063e263 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -16,7 +16,7 @@
 
 #include <linux/i2c/tps65010.h>
 
-#include <mach/mmc.h>
+#include <plat/mmc.h>
 #include <mach/gpio.h>
 
 #include "board-h3.h"
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 89586b80b8d5..a53ab8297d25 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -25,9 +25,11 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/input.h>
 #include <linux/spi/spi.h>
 #include <linux/i2c/tps65010.h>
+#include <linux/smc91x.h>
 
 #include <asm/setup.h>
 #include <asm/page.h>
@@ -36,17 +38,16 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
 #include <mach/irqs.h>
-#include <mach/mux.h>
-#include <mach/tc.h>
-#include <mach/nand.h>
-#include <mach/usb.h>
-#include <mach/keypad.h>
-#include <mach/dma.h>
-#include <mach/common.h>
+#include <plat/mux.h>
+#include <plat/tc.h>
+#include <plat/usb.h>
+#include <plat/keypad.h>
+#include <plat/dma.h>
+#include <plat/common.h>
+#include <plat/flash.h>
 
 #include "board-h3.h"
 
@@ -126,9 +127,9 @@ static struct mtd_partition nor_partitions[] = {
         }
 };
 
-static struct flash_platform_data nor_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data nor_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = nor_partitions,
         .nr_parts       = ARRAY_SIZE(nor_partitions),
 };
@@ -139,7 +140,7 @@ static struct resource nor_resource = {
 };
 
 static struct platform_device nor_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &nor_data,
@@ -181,11 +182,43 @@ static struct mtd_partition nand_partitions[] = {
         },
 };
 
-/* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
-static struct omap_nand_platform_data nand_data = {
-        .options        = NAND_SAMSUNG_LP_OPTIONS,
-        .parts          = nand_partitions,
-        .nr_parts       = ARRAY_SIZE(nand_partitions),
+static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+        struct nand_chip *this = mtd->priv;
+        unsigned long mask;
+
+        if (cmd == NAND_CMD_NONE)
+                return;
+
+        mask = (ctrl & NAND_CLE) ? 0x02 : 0;
+        if (ctrl & NAND_ALE)
+                mask |= 0x04;
+        writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
+}
+
+#define H3_NAND_RB_GPIO_PIN     10
+
+static int nand_dev_ready(struct mtd_info *mtd)
+{
+        return gpio_get_value(H3_NAND_RB_GPIO_PIN);
+}
+
+static const char *part_probes[] = { "cmdlinepart", NULL };
+
+struct platform_nand_data nand_platdata = {
+        .chip   = {
+                .nr_chips               = 1,
+                .chip_offset            = 0,
+                .nr_partitions          = ARRAY_SIZE(nand_partitions),
+                .partitions             = nand_partitions,
+                .options                = NAND_SAMSUNG_LP_OPTIONS,
+                .part_probe_types       = part_probes,
+        },
+        .ctrl   = {
+                .cmd_ctrl       = nand_cmd_ctl,
+                .dev_ready      = nand_dev_ready,
+
+        },
 };
 
 static struct resource nand_resource = {
@@ -193,15 +226,21 @@ static struct resource nand_resource = {
 };
 
 static struct platform_device nand_device = {
-        .name           = "omapnand",
+        .name           = "gen_nand",
         .id             = 0,
         .dev            = {
-                .platform_data  = &nand_data,
+                .platform_data  = &nand_platdata,
         },
         .num_resources  = 1,
         .resource       = &nand_resource,
 };
 
+static struct smc91x_platdata smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         [0] = {
                 .start  = OMAP1710_ETHR_START,          /* Physical */
@@ -218,6 +257,9 @@ static struct resource smc91x_resources[] = {
 static struct platform_device smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
         .num_resources  = ARRAY_SIZE(smc91x_resources),
         .resource       = smc91x_resources,
 };
@@ -332,13 +374,6 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = {
         },
 };
 
-#define H3_NAND_RB_GPIO_PIN     10
-
-static int nand_dev_ready(struct omap_nand_platform_data *data)
-{
-        return gpio_get_value(H3_NAND_RB_GPIO_PIN);
-}
-
 static void __init h3_init(void)
 {
         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
@@ -356,7 +391,7 @@ static void __init h3_init(void)
         nand_resource.end += SZ_4K - 1;
         if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
                 BUG();
-        nand_data.dev_ready = nand_dev_ready;
+        gpio_direction_input(H3_NAND_RB_GPIO_PIN);
 
         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
new file mode 100644
index 000000000000..e36639f66150
--- /dev/null
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -0,0 +1,311 @@
+/*
+ * HTC Herald board configuration
+ * Copyright (C) 2009 Cory Maccarrone <darkstar6262@gmail.com>
+ * Copyright (C) 2009 Wing Linux
+ *
+ * Based on the board-htcwizard.c file from the linwizard project:
+ * Copyright (C) 2006 Unai Uribarri
+ * Copyright (C) 2008 linwizard.sourceforge.net
+ *
+ * This  program is  free  software; you  can  redistribute it  and/or
+ * modify  it under the  terms of  the GNU  General Public  License as
+ * published by the Free Software  Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT  ANY  WARRANTY;  without   even  the  implied  warranty  of
+ * MERCHANTABILITY or  FITNESS FOR A PARTICULAR PURPOSE.   See the GNU
+ * General Public License for more details.
+ *
+ * You should have  received a copy of the  GNU General Public License
+ * along  with  this program;  if  not,  write  to the  Free  Software
+ * Foundation,  Inc.,  51 Franklin  Street,  Fifth  Floor, Boston,  MA
+ * 02110-1301, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/bootmem.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <plat/omap7xx.h>
+#include <plat/common.h>
+#include <plat/board.h>
+#include <plat/keypad.h>
+#include <plat/usb.h>
+
+#include <mach/irqs.h>
+
+#include <linux/delay.h>
+
+/* LCD register definition */
+#define       OMAP_LCDC_CONTROL               (0xfffec000 + 0x00)
+#define       OMAP_LCDC_STATUS                (0xfffec000 + 0x10)
+#define       OMAP_DMA_LCD_CCR                (0xfffee300 + 0xc2)
+#define       OMAP_DMA_LCD_CTRL               (0xfffee300 + 0xc4)
+#define       OMAP_LCDC_CTRL_LCD_EN           (1 << 0)
+#define       OMAP_LCDC_STAT_DONE             (1 << 0)
+
+static struct omap_lcd_config htcherald_lcd_config __initdata = {
+        .ctrl_name      = "internal",
+};
+
+static struct omap_board_config_kernel htcherald_config[] __initdata = {
+        { OMAP_TAG_LCD, &htcherald_lcd_config },
+};
+
+/* Keyboard definition */
+
+static int htc_herald_keymap[] = {
+        KEY(0, 0, KEY_RECORD), /* Mail button */
+        KEY(0, 1, KEY_CAMERA), /* Camera */
+        KEY(0, 2, KEY_PHONE), /* Send key */
+        KEY(0, 3, KEY_VOLUMEUP), /* Volume up */
+        KEY(0, 4, KEY_F2),  /* Right bar (landscape) */
+        KEY(0, 5, KEY_MAIL), /* Win key (portrait) */
+        KEY(0, 6, KEY_DIRECTORY), /* Right bar (protrait) */
+        KEY(1, 0, KEY_LEFTCTRL), /* Windows key */
+        KEY(1, 1, KEY_COMMA),
+        KEY(1, 2, KEY_M),
+        KEY(1, 3, KEY_K),
+        KEY(1, 4, KEY_SLASH), /* OK key */
+        KEY(1, 5, KEY_I),
+        KEY(1, 6, KEY_U),
+        KEY(2, 0, KEY_LEFTALT),
+        KEY(2, 1, KEY_TAB),
+        KEY(2, 2, KEY_N),
+        KEY(2, 3, KEY_J),
+        KEY(2, 4, KEY_ENTER),
+        KEY(2, 5, KEY_H),
+        KEY(2, 6, KEY_Y),
+        KEY(3, 0, KEY_SPACE),
+        KEY(3, 1, KEY_L),
+        KEY(3, 2, KEY_B),
+        KEY(3, 3, KEY_V),
+        KEY(3, 4, KEY_BACKSPACE),
+        KEY(3, 5, KEY_G),
+        KEY(3, 6, KEY_T),
+        KEY(4, 0, KEY_CAPSLOCK), /* Shift */
+        KEY(4, 1, KEY_C),
+        KEY(4, 2, KEY_F),
+        KEY(4, 3, KEY_R),
+        KEY(4, 4, KEY_O),
+        KEY(4, 5, KEY_E),
+        KEY(4, 6, KEY_D),
+        KEY(5, 0, KEY_X),
+        KEY(5, 1, KEY_Z),
+        KEY(5, 2, KEY_S),
+        KEY(5, 3, KEY_W),
+        KEY(5, 4, KEY_P),
+        KEY(5, 5, KEY_Q),
+        KEY(5, 6, KEY_A),
+        KEY(6, 0, KEY_CONNECT), /* Voice button */
+        KEY(6, 2, KEY_CANCEL), /* End key */
+        KEY(6, 3, KEY_VOLUMEDOWN), /* Volume down */
+        KEY(6, 4, KEY_F1), /* Left bar (landscape) */
+        KEY(6, 5, KEY_WWW), /* OK button (portrait) */
+        KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */
+        0
+};
+
+struct omap_kp_platform_data htcherald_kp_data = {
+        .rows   = 7,
+        .cols   = 7,
+        .delay = 20,
+        .rep = 1,
+        .keymap = htc_herald_keymap,
+};
+
+static struct resource kp_resources[] = {
+        [0] = {
+                .start  = INT_7XX_MPUIO_KEYPAD,
+                .end    = INT_7XX_MPUIO_KEYPAD,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device kp_device = {
+        .name           = "omap-keypad",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &htcherald_kp_data,
+        },
+        .num_resources  = ARRAY_SIZE(kp_resources),
+        .resource       = kp_resources,
+};
+
+/* USB Device */
+static struct omap_usb_config htcherald_usb_config __initdata = {
+        .otg = 0,
+        .register_host = 0,
+        .register_dev  = 1,
+        .hmc_mode = 4,
+        .pins[0] = 2,
+};
+
+/* LCD Device resources */
+static struct platform_device lcd_device = {
+        .name           = "lcd_htcherald",
+        .id             = -1,
+};
+
+static struct platform_device *devices[] __initdata = {
+        &kp_device,
+        &lcd_device,
+};
+
+/*
+ * Init functions from here on
+ */
+
+static void __init htcherald_lcd_init(void)
+{
+        u32 reg;
+        unsigned int tries = 200;
+
+        /* disable controller if active */
+        reg = omap_readl(OMAP_LCDC_CONTROL);
+        if (reg & OMAP_LCDC_CTRL_LCD_EN) {
+                reg &= ~OMAP_LCDC_CTRL_LCD_EN;
+                omap_writel(reg, OMAP_LCDC_CONTROL);
+
+                /* wait for end of frame */
+                while (!(omap_readl(OMAP_LCDC_STATUS) & OMAP_LCDC_STAT_DONE)) {
+                        tries--;
+                        if (!tries)
+                                break;
+                }
+                if (!tries)
+                        printk(KERN_WARNING "Timeout waiting for end of frame "
+                               "-- LCD may not be available\n");
+
+                /* turn off DMA */
+                reg = omap_readw(OMAP_DMA_LCD_CCR);
+                reg &= ~(1 << 7);
+                omap_writew(reg, OMAP_DMA_LCD_CCR);
+
+                reg = omap_readw(OMAP_DMA_LCD_CTRL);
+                reg &= ~(1 << 8);
+                omap_writew(reg, OMAP_DMA_LCD_CTRL);
+        }
+}
+
+static void __init htcherald_map_io(void)
+{
+        omap1_map_common_io();
+
+        /*
+         * The LCD panel must be disabled and DMA turned off here, as doing
+         * it later causes the LCD never to reinitialize.
+         */
+        htcherald_lcd_init();
+
+        printk(KERN_INFO "htcherald_map_io done.\n");
+}
+
+static void __init htcherald_disable_watchdog(void)
+{
+        /* Disable watchdog if running */
+        if (omap_readl(OMAP_WDT_TIMER_MODE) & 0x8000) {
+                /*
+                 * disable a potentially running watchdog timer before
+                 * it kills us.
+                 */
+                printk(KERN_WARNING "OMAP850 Watchdog seems to be activated, disabling it for now.\n");
+                omap_writel(0xF5, OMAP_WDT_TIMER_MODE);
+                omap_writel(0xA0, OMAP_WDT_TIMER_MODE);
+        }
+}
+
+#define HTCHERALD_GPIO_USB_EN1 33
+#define HTCHERALD_GPIO_USB_EN2 73
+#define HTCHERALD_GPIO_USB_DM  35
+#define HTCHERALD_GPIO_USB_DP  36
+
+static void __init htcherald_usb_enable(void)
+{
+        unsigned int tries = 20;
+        unsigned int value = 0;
+
+        /* Request the GPIOs we need to control here */
+        if (gpio_request(HTCHERALD_GPIO_USB_EN1, "herald_usb") < 0)
+                goto err1;
+
+        if (gpio_request(HTCHERALD_GPIO_USB_EN2, "herald_usb") < 0)
+                goto err2;
+
+        if (gpio_request(HTCHERALD_GPIO_USB_DM, "herald_usb") < 0)
+                goto err3;
+
+        if (gpio_request(HTCHERALD_GPIO_USB_DP, "herald_usb") < 0)
+                goto err4;
+
+        /* force USB_EN GPIO to 0 */
+        do {
+                /* output low */
+                gpio_direction_output(HTCHERALD_GPIO_USB_EN1, 0);
+        } while ((value = gpio_get_value(HTCHERALD_GPIO_USB_EN1)) == 1 &&
+                        --tries);
+
+        if (value == 1)
+                printk(KERN_WARNING "Unable to reset USB, trying to continue\n");
+
+        gpio_direction_output(HTCHERALD_GPIO_USB_EN2, 0); /* output low */
+        gpio_direction_input(HTCHERALD_GPIO_USB_DM); /* input */
+        gpio_direction_input(HTCHERALD_GPIO_USB_DP); /* input */
+
+        goto done;
+
+err4:
+        gpio_free(HTCHERALD_GPIO_USB_DM);
+err3:
+        gpio_free(HTCHERALD_GPIO_USB_EN2);
+err2:
+        gpio_free(HTCHERALD_GPIO_USB_EN1);
+err1:
+        printk(KERN_ERR "Unabled to request GPIO for USB\n");
+done:
+        printk(KERN_INFO "USB setup complete.\n");
+}
+
+static void __init htcherald_init(void)
+{
+        printk(KERN_INFO "HTC Herald init.\n");
+
+        omap_gpio_init();
+
+        omap_board_config = htcherald_config;
+        omap_board_config_size = ARRAY_SIZE(htcherald_config);
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+
+        htcherald_disable_watchdog();
+
+        htcherald_usb_enable();
+        omap_usb_init(&htcherald_usb_config);
+}
+
+static void __init htcherald_init_irq(void)
+{
+        printk(KERN_INFO "htcherald_init_irq.\n");
+        omap1_init_common_hw();
+        omap_init_irq();
+}
+
+MACHINE_START(HERALD, "HTC Herald")
+        /* Maintainer: Cory Maccarrone <darkstar6262@gmail.com> */
+        /* Maintainer: wing-linux.sourceforge.net */
+        .phys_io        = 0xfff00000,
+        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
+        .boot_params    = 0x10000100,
+        .map_io         = htcherald_map_io,
+        .init_irq       = htcherald_init_irq,
+        .init_machine   = htcherald_init,
+        .timer          = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index cd6c39514826..5d12fd35681b 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -22,22 +22,24 @@
 #include <linux/delay.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/input.h>
+#include <linux/smc91x.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include <mach/mux.h>
-#include <mach/fpga.h>
+#include <plat/mux.h>
+#include <plat/flash.h>
+#include <plat/fpga.h>
 #include <mach/gpio.h>
-#include <mach/tc.h>
-#include <mach/usb.h>
-#include <mach/keypad.h>
-#include <mach/common.h>
-#include <mach/mmc.h>
+#include <plat/tc.h>
+#include <plat/usb.h>
+#include <plat/keypad.h>
+#include <plat/common.h>
+#include <plat/mmc.h>
 
 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
 #define INNOVATOR1610_ETHR_START        0x04000300
@@ -93,9 +95,9 @@ static struct mtd_partition innovator_partitions[] = {
         }
 };
 
-static struct flash_platform_data innovator_flash_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data innovator_flash_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = innovator_partitions,
         .nr_parts       = ARRAY_SIZE(innovator_partitions),
 };
@@ -107,7 +109,7 @@ static struct resource innovator_flash_resource = {
 };
 
 static struct platform_device innovator_flash_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &innovator_flash_data,
@@ -142,6 +144,11 @@ static struct platform_device innovator_kp_device = {
         .resource       = innovator_kp_resources,
 };
 
+static struct smc91x_platdata innovator_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
 
 #ifdef CONFIG_ARCH_OMAP15XX
 
@@ -175,6 +182,9 @@ static struct resource innovator1510_smc91x_resources[] = {
 static struct platform_device innovator1510_smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
+        .dev    = {
+                .platform_data  = &innovator_smc91x_info,
+        },
         .num_resources  = ARRAY_SIZE(innovator1510_smc91x_resources),
         .resource       = innovator1510_smc91x_resources,
 };
@@ -241,6 +251,9 @@ static struct resource innovator1610_smc91x_resources[] = {
 static struct platform_device innovator1610_smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
+        .dev    = {
+                .platform_data  = &innovator_smc91x_info,
+        },
         .num_resources  = ARRAY_SIZE(innovator1610_smc91x_resources),
         .resource       = innovator1610_smc91x_resources,
 };
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index ed2a48a9ce74..71e1a3fad0ea 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -14,6 +14,7 @@
 #include <linux/platform_device.h>
 #include <linux/input.h>
 #include <linux/clk.h>
+#include <linux/omapfb.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -26,17 +27,16 @@
 #include <asm/mach/map.h>
 
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/usb.h>
-#include <mach/board.h>
-#include <mach/keypad.h>
-#include <mach/common.h>
-#include <mach/dsp_common.h>
-#include <mach/omapfb.h>
-#include <mach/hwa742.h>
-#include <mach/lcd_mipid.h>
-#include <mach/mmc.h>
-#include <mach/clock.h>
+#include <plat/mux.h>
+#include <plat/usb.h>
+#include <plat/board.h>
+#include <plat/keypad.h>
+#include <plat/common.h>
+#include <plat/dsp_common.h>
+#include <plat/hwa742.h>
+#include <plat/lcd_mipid.h>
+#include <plat/mmc.h>
+#include <plat/clock.h>
 
 #define ADS7846_PENDOWN_GPIO    15
 
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index ed891b8a6b15..80d862001def 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -33,9 +33,11 @@
 #include <linux/irq.h>
 #include <linux/i2c.h>
 #include <linux/leds.h>
+#include <linux/smc91x.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 
 #include <linux/i2c/tps65010.h>
 
@@ -45,12 +47,12 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/flash.h>
 
-#include <mach/usb.h>
-#include <mach/mux.h>
-#include <mach/tc.h>
-#include <mach/common.h>
+#include <plat/flash.h>
+#include <plat/usb.h>
+#include <plat/mux.h>
+#include <plat/tc.h>
+#include <plat/common.h>
 
 /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
 #define OMAP_OSK_ETHR_START             0x04800300
@@ -93,9 +95,9 @@ static struct mtd_partition osk_partitions[] = {
         }
 };
 
-static struct flash_platform_data osk_flash_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data osk_flash_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = osk_partitions,
         .nr_parts       = ARRAY_SIZE(osk_partitions),
 };
@@ -106,7 +108,7 @@ static struct resource osk_flash_resource = {
 };
 
 static struct platform_device osk5912_flash_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &osk_flash_data,
@@ -115,6 +117,12 @@ static struct platform_device osk5912_flash_device = {
         .resource       = &osk_flash_resource,
 };
 
+static struct smc91x_platdata osk5912_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
 static struct resource osk5912_smc91x_resources[] = {
         [0] = {
                 .start  = OMAP_OSK_ETHR_START,          /* Physical */
@@ -131,6 +139,9 @@ static struct resource osk5912_smc91x_resources[] = {
 static struct platform_device osk5912_smc91x_device = {
         .name           = "smc91x",
         .id             = -1,
+        .dev    = {
+                .platform_data  = &osk5912_smc91x_info,
+        },
         .num_resources  = ARRAY_SIZE(osk5912_smc91x_resources),
         .resource       = osk5912_smc91x_resources,
 };
@@ -312,7 +323,7 @@ static struct omap_board_config_kernel osk_config[] __initdata = {
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
 
-#include <mach/keypad.h>
+#include <plat/keypad.h>
 
 static struct at24_platform_data at24c04 = {
         .byte_len       = SZ_4K / 8,
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 4de258420f39..569b4c9085cd 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -23,6 +23,7 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/interrupt.h>
 #include <linux/apm-emulation.h>
@@ -31,17 +32,17 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/flash.h>
 
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/usb.h>
-#include <mach/tc.h>
-#include <mach/dma.h>
-#include <mach/board.h>
-#include <mach/irda.h>
-#include <mach/keypad.h>
-#include <mach/common.h>
+#include <plat/flash.h>
+#include <plat/mux.h>
+#include <plat/usb.h>
+#include <plat/tc.h>
+#include <plat/dma.h>
+#include <plat/board.h>
+#include <plat/irda.h>
+#include <plat/keypad.h>
+#include <plat/common.h>
 
 #define PALMTE_USBDETECT_GPIO   0
 #define PALMTE_USB_OR_DC_GPIO   1
@@ -126,9 +127,9 @@ static struct mtd_partition palmte_rom_partitions[] = {
         },
 };
 
-static struct flash_platform_data palmte_rom_data = {
-        .map_name       = "map_rom",
+static struct physmap_flash_data palmte_rom_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = palmte_rom_partitions,
         .nr_parts       = ARRAY_SIZE(palmte_rom_partitions),
 };
@@ -140,7 +141,7 @@ static struct resource palmte_rom_resource = {
 };
 
 static struct platform_device palmte_rom_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = -1,
         .dev            = {
                 .platform_data  = &palmte_rom_data,
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index d972cf941b76..6ad49a2cc1a0 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -21,24 +21,25 @@
 #include <linux/interrupt.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/leds.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/flash.h>
 
-#include <mach/led.h>
+#include <plat/led.h>
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/usb.h>
-#include <mach/dma.h>
-#include <mach/tc.h>
-#include <mach/board.h>
-#include <mach/irda.h>
-#include <mach/keypad.h>
-#include <mach/common.h>
+#include <plat/flash.h>
+#include <plat/mux.h>
+#include <plat/usb.h>
+#include <plat/dma.h>
+#include <plat/tc.h>
+#include <plat/board.h>
+#include <plat/irda.h>
+#include <plat/keypad.h>
+#include <plat/common.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -104,9 +105,9 @@ static struct mtd_partition palmtt_partitions[] = {
         }
 };
 
-static struct flash_platform_data palmtt_flash_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data palmtt_flash_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = palmtt_partitions,
         .nr_parts       = ARRAY_SIZE(palmtt_partitions),
 };
@@ -118,7 +119,7 @@ static struct resource palmtt_flash_resource = {
 };
 
 static struct platform_device palmtt_flash_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &palmtt_flash_data,
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 986bd4df0e97..6641de9257ef 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -25,23 +25,24 @@
 #include <linux/interrupt.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/flash.h>
 
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/usb.h>
-#include <mach/dma.h>
-#include <mach/tc.h>
-#include <mach/board.h>
-#include <mach/irda.h>
-#include <mach/keypad.h>
-#include <mach/common.h>
-#include <mach/omap-alsa.h>
+#include <plat/flash.h>
+#include <plat/mux.h>
+#include <plat/usb.h>
+#include <plat/dma.h>
+#include <plat/tc.h>
+#include <plat/board.h>
+#include <plat/irda.h>
+#include <plat/keypad.h>
+#include <plat/common.h>
+#include <plat/omap-alsa.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -126,10 +127,9 @@ static struct mtd_partition palmz71_rom_partitions[] = {
         },
 };
 
-static struct flash_platform_data palmz71_rom_data = {
-        .map_name       = "map_rom",
-        .name           = "onboardrom",
+static struct physmap_flash_data palmz71_rom_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = palmz71_rom_partitions,
         .nr_parts       = ARRAY_SIZE(palmz71_rom_partitions),
 };
@@ -141,7 +141,7 @@ static struct resource palmz71_rom_resource = {
 };
 
 static struct platform_device palmz71_rom_device = {
-        .name   = "omapflash",
+        .name   = "physmap-flash",
         .id     = -1,
         .dev = {
                 .platform_data = &palmz71_rom_data,
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 83406699f310..e854d5741c88 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -18,22 +18,23 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/input.h>
+#include <linux/smc91x.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include <mach/tc.h>
+#include <plat/tc.h>
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/fpga.h>
-#include <mach/nand.h>
-#include <mach/keypad.h>
-#include <mach/common.h>
-#include <mach/board.h>
+#include <plat/mux.h>
+#include <plat/fpga.h>
+#include <plat/flash.h>
+#include <plat/keypad.h>
+#include <plat/common.h>
+#include <plat/board.h>
 
 static int p2_keymap[] = {
         KEY(0,0,KEY_UP),
@@ -67,6 +68,12 @@ static int p2_keymap[] = {
         0
 };
 
+static struct smc91x_platdata smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         [0] = {
                 .start  = H2P2_DBG_FPGA_ETHR_START,     /* Physical */
@@ -74,7 +81,7 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = INT_730_MPU_EXT_NIRQ,
+                .start  = INT_7XX_MPU_EXT_NIRQ,
                 .end    = 0,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
@@ -111,9 +118,9 @@ static struct mtd_partition nor_partitions[] = {
         },
 };
 
-static struct flash_platform_data nor_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data nor_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = nor_partitions,
         .nr_parts       = ARRAY_SIZE(nor_partitions),
 };
@@ -125,7 +132,7 @@ static struct resource nor_resource = {
 };
 
 static struct platform_device nor_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &nor_data,
@@ -134,8 +141,40 @@ static struct platform_device nor_device = {
         .resource       = &nor_resource,
 };
 
-static struct omap_nand_platform_data nand_data = {
-        .options        = NAND_SAMSUNG_LP_OPTIONS,
+static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+        struct nand_chip *this = mtd->priv;
+        unsigned long mask;
+
+        if (cmd == NAND_CMD_NONE)
+                return;
+
+        mask = (ctrl & NAND_CLE) ? 0x02 : 0;
+        if (ctrl & NAND_ALE)
+                mask |= 0x04;
+        writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
+}
+
+#define P2_NAND_RB_GPIO_PIN     62
+
+static int nand_dev_ready(struct mtd_info *mtd)
+{
+        return gpio_get_value(P2_NAND_RB_GPIO_PIN);
+}
+
+static const char *part_probes[] = { "cmdlinepart", NULL };
+
+static struct platform_nand_data nand_data = {
+        .chip   = {
+                .nr_chips               = 1,
+                .chip_offset            = 0,
+                .options                = NAND_SAMSUNG_LP_OPTIONS,
+                .part_probe_types       = part_probes,
+        },
+        .ctrl   = {
+                .cmd_ctrl       = nand_cmd_ctl,
+                .dev_ready      = nand_dev_ready,
+        },
 };
 
 static struct resource nand_resource = {
@@ -145,7 +184,7 @@ static struct resource nand_resource = {
 };
 
 static struct platform_device nand_device = {
-        .name           = "omapnand",
+        .name           = "gen_nand",
         .id             = 0,
         .dev            = {
                 .platform_data  = &nand_data,
@@ -157,14 +196,17 @@ static struct platform_device nand_device = {
 static struct platform_device smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
         .num_resources  = ARRAY_SIZE(smc91x_resources),
         .resource       = smc91x_resources,
 };
 
 static struct resource kp_resources[] = {
         [0] = {
-                .start  = INT_730_MPUIO_KEYPAD,
-                .end    = INT_730_MPUIO_KEYPAD,
+                .start  = INT_7XX_MPUIO_KEYPAD,
+                .end    = INT_7XX_MPUIO_KEYPAD,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -201,13 +243,6 @@ static struct platform_device *devices[] __initdata = {
         &lcd_device,
 };
 
-#define P2_NAND_RB_GPIO_PIN     62
-
-static int nand_dev_ready(struct omap_nand_platform_data *data)
-{
-        return gpio_get_value(P2_NAND_RB_GPIO_PIN);
-}
-
 static struct omap_lcd_config perseus2_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
@@ -220,7 +255,7 @@ static void __init omap_perseus2_init(void)
 {
         if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
                 BUG();
-        nand_data.dev_ready = nand_dev_ready;
+        gpio_direction_input(P2_NAND_RB_GPIO_PIN);
 
         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
@@ -270,7 +305,7 @@ static void __init omap_perseus2_map_io(void)
         /*
          * Hold GSM Reset until needed
          */
-        omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
+        omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
 
         /*
          * UARTs -> done automagically by 8250 driver
@@ -281,21 +316,21 @@ static void __init omap_perseus2_map_io(void)
          */
 
         /* Flash: CS0 timings setup */
-        omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
-        omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
+        omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
+        omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
 
         /*
          * Ethernet support through the debug board
          * CS1 timings setup
          */
-        omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
-        omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
+        omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
+        omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
 
         /*
          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
          * It is used as the Ethernet controller interrupt
          */
-        omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
+        omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
 }
 
 MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c
index 58a46e4e45c3..5b33ae8141bc 100644
--- a/arch/arm/mach-omap1/board-sx1-mmc.c
+++ b/arch/arm/mach-omap1/board-sx1-mmc.c
@@ -15,9 +15,9 @@
 #include <linux/platform_device.h>
 
 #include <mach/hardware.h>
-#include <mach/mmc.h>
+#include <plat/mmc.h>
 #include <mach/gpio.h>
-#include <mach/board-sx1.h>
+#include <plat/board-sx1.h>
 
 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 056ae64e0f55..2fb1e5f8e2ec 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -22,6 +22,7 @@
 #include <linux/notifier.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/types.h>
 #include <linux/i2c.h>
 #include <linux/errno.h>
@@ -29,19 +30,19 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/dma.h>
-#include <mach/irda.h>
-#include <mach/usb.h>
-#include <mach/tc.h>
-#include <mach/board.h>
-#include <mach/common.h>
-#include <mach/keypad.h>
-#include <mach/board-sx1.h>
+#include <plat/flash.h>
+#include <plat/mux.h>
+#include <plat/dma.h>
+#include <plat/irda.h>
+#include <plat/usb.h>
+#include <plat/tc.h>
+#include <plat/board.h>
+#include <plat/common.h>
+#include <plat/keypad.h>
+#include <plat/board-sx1.h>
 
 /* Write to I2C device */
 int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
@@ -287,9 +288,9 @@ static struct mtd_partition sx1_partitions[] = {
         }
 };
 
-static struct flash_platform_data sx1_flash_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data sx1_flash_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
         .parts          = sx1_partitions,
         .nr_parts       = ARRAY_SIZE(sx1_partitions),
 };
@@ -310,7 +311,7 @@ static struct resource sx1_old_flash_resource[] = {
 };
 
 static struct platform_device sx1_flash_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &sx1_flash_data,
@@ -327,7 +328,7 @@ static struct resource sx1_new_flash_resource = {
 };
 
 static struct platform_device sx1_flash_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &sx1_flash_data,
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 07b07522d5bf..87b9436fe7c0 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -18,22 +18,24 @@
 #include <linux/irq.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/mtd/physmap.h>
 #include <linux/notifier.h>
 #include <linux/reboot.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_reg.h>
+#include <linux/smc91x.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
+#include <plat/common.h>
 #include <mach/gpio.h>
-#include <mach/mux.h>
-#include <mach/tc.h>
-#include <mach/usb.h>
+#include <plat/flash.h>
+#include <plat/mux.h>
+#include <plat/tc.h>
+#include <plat/usb.h>
 
 static struct plat_serial8250_port voiceblue_ports[] = {
         {
@@ -85,9 +87,9 @@ static int __init ext_uart_init(void)
 }
 arch_initcall(ext_uart_init);
 
-static struct flash_platform_data voiceblue_flash_data = {
-        .map_name       = "cfi_probe",
+static struct physmap_flash_data voiceblue_flash_data = {
         .width          = 2,
+        .set_vpp        = omap1_set_vpp,
 };
 
 static struct resource voiceblue_flash_resource = {
@@ -97,7 +99,7 @@ static struct resource voiceblue_flash_resource = {
 };
 
 static struct platform_device voiceblue_flash_device = {
-        .name           = "omapflash",
+        .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
                 .platform_data  = &voiceblue_flash_data,
@@ -106,6 +108,12 @@ static struct platform_device voiceblue_flash_device = {
         .resource       = &voiceblue_flash_resource,
 };
 
+static struct smc91x_platdata voiceblue_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
 static struct resource voiceblue_smc91x_resources[] = {
         [0] = {
                 .start  = OMAP_CS2_PHYS + 0x300,
@@ -122,6 +130,9 @@ static struct resource voiceblue_smc91x_resources[] = {
 static struct platform_device voiceblue_smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
+        .dev    = {
+                .platform_data  = &voiceblue_smc91x_info,
+        },
         .num_resources  = ARRAY_SIZE(voiceblue_smc91x_resources),
         .resource       = voiceblue_smc91x_resources,
 };
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 436eed22801b..e0aec1007a0d 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -1,7 +1,7 @@
 /*
  *  linux/arch/arm/mach-omap1/clock.c
  *
- *  Copyright (C) 2004 - 2005 Nokia corporation
+ *  Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation
  *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
  *
  *  Modified to use omap shared clock framework by
@@ -22,152 +22,29 @@
 #include <asm/mach-types.h>
 #include <asm/clkdev.h>
 
-#include <mach/cpu.h>
-#include <mach/usb.h>
-#include <mach/clock.h>
-#include <mach/sram.h>
-
-static const struct clkops clkops_generic;
-static const struct clkops clkops_uart;
-static const struct clkops clkops_dspck;
+#include <plat/cpu.h>
+#include <plat/usb.h>
+#include <plat/clock.h>
+#include <plat/sram.h>
+#include <plat/clkdev_omap.h>
 
 #include "clock.h"
-
-static int clk_omap1_dummy_enable(struct clk *clk)
-{
-        return 0;
-}
-
-static void clk_omap1_dummy_disable(struct clk *clk)
-{
-}
-
-static const struct clkops clkops_dummy = {
-        .enable = clk_omap1_dummy_enable,
-        .disable = clk_omap1_dummy_disable,
-};
-
-static struct clk dummy_ck = {
-        .name   = "dummy",
-        .ops    = &clkops_dummy,
-        .flags  = RATE_FIXED,
-};
-
-struct omap_clk {
-        u32             cpu;
-        struct clk_lookup lk;
-};
-
-#define CLK(dev, con, ck, cp)           \
-        {                               \
-                 .cpu = cp,             \
-                .lk = {                 \
-                        .dev_id = dev,  \
-                        .con_id = con,  \
-                        .clk = ck,      \
-                },                      \
-        }
-
-#define CK_310  (1 << 0)
-#define CK_730  (1 << 1)
-#define CK_1510 (1 << 2)
-#define CK_16XX (1 << 3)
-
-static struct omap_clk omap_clks[] = {
-        /* non-ULPD clocks */
-        CLK(NULL,       "ck_ref",       &ck_ref,        CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "ck_dpll1",     &ck_dpll1,      CK_16XX | CK_1510 | CK_310),
-        /* CK_GEN1 clocks */
-        CLK(NULL,       "ck_dpll1out",  &ck_dpll1out.clk, CK_16XX),
-        CLK(NULL,       "ck_sossi",     &sossi_ck,      CK_16XX),
-        CLK(NULL,       "arm_ck",       &arm_ck,        CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "armper_ck",    &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "arm_gpio_ck",  &arm_gpio_ck,   CK_1510 | CK_310),
-        CLK(NULL,       "armxor_ck",    &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "armtim_ck",    &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
-        CLK("omap_wdt", "fck",          &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
-        CLK("omap_wdt", "ick",          &armper_ck.clk, CK_16XX),
-        CLK("omap_wdt", "ick",          &dummy_ck,      CK_1510 | CK_310),
-        CLK(NULL,       "arminth_ck",   &arminth_ck1510, CK_1510 | CK_310),
-        CLK(NULL,       "arminth_ck",   &arminth_ck16xx, CK_16XX),
-        /* CK_GEN2 clocks */
-        CLK(NULL,       "dsp_ck",       &dsp_ck,        CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "dspmmu_ck",    &dspmmu_ck,     CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "dspper_ck",    &dspper_ck,     CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "dspxor_ck",    &dspxor_ck,     CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "dsptim_ck",    &dsptim_ck,     CK_16XX | CK_1510 | CK_310),
-        /* CK_GEN3 clocks */
-        CLK(NULL,       "tc_ck",        &tc_ck.clk,     CK_16XX | CK_1510 | CK_310 | CK_730),
-        CLK(NULL,       "tipb_ck",      &tipb_ck,       CK_1510 | CK_310),
-        CLK(NULL,       "l3_ocpi_ck",   &l3_ocpi_ck,    CK_16XX),
-        CLK(NULL,       "tc1_ck",       &tc1_ck,        CK_16XX),
-        CLK(NULL,       "tc2_ck",       &tc2_ck,        CK_16XX),
-        CLK(NULL,       "dma_ck",       &dma_ck,        CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
-        CLK(NULL,       "api_ck",       &api_ck.clk,    CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "lb_ck",        &lb_ck.clk,     CK_1510 | CK_310),
-        CLK(NULL,       "rhea1_ck",     &rhea1_ck,      CK_16XX),
-        CLK(NULL,       "rhea2_ck",     &rhea2_ck,      CK_16XX),
-        CLK(NULL,       "lcd_ck",       &lcd_ck_16xx,   CK_16XX | CK_730),
-        CLK(NULL,       "lcd_ck",       &lcd_ck_1510.clk, CK_1510 | CK_310),
-        /* ULPD clocks */
-        CLK(NULL,       "uart1_ck",     &uart1_1510,    CK_1510 | CK_310),
-        CLK(NULL,       "uart1_ck",     &uart1_16xx.clk, CK_16XX),
-        CLK(NULL,       "uart2_ck",     &uart2_ck,      CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "uart3_ck",     &uart3_1510,    CK_1510 | CK_310),
-        CLK(NULL,       "uart3_ck",     &uart3_16xx.clk, CK_16XX),
-        CLK(NULL,       "usb_clko",     &usb_clko,      CK_16XX | CK_1510 | CK_310),
-        CLK(NULL,       "usb_hhc_ck",   &usb_hhc_ck1510, CK_1510 | CK_310),
-        CLK(NULL,       "usb_hhc_ck",   &usb_hhc_ck16xx, CK_16XX),
-        CLK(NULL,       "usb_dc_ck",    &usb_dc_ck,     CK_16XX),
-        CLK(NULL,       "mclk",         &mclk_1510,     CK_1510 | CK_310),
-        CLK(NULL,       "mclk",         &mclk_16xx,     CK_16XX),
-        CLK(NULL,       "bclk",         &bclk_1510,     CK_1510 | CK_310),
-        CLK(NULL,       "bclk",         &bclk_16xx,     CK_16XX),
-        CLK("mmci-omap.0", "fck",       &mmc1_ck,       CK_16XX | CK_1510 | CK_310),
-        CLK("mmci-omap.0", "ick",       &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
-        CLK("mmci-omap.1", "fck",       &mmc2_ck,       CK_16XX),
-        CLK("mmci-omap.1", "ick",       &armper_ck.clk, CK_16XX),
-        /* Virtual clocks */
-        CLK(NULL,       "mpu",          &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
-        CLK("i2c_omap.1", "fck",        &i2c_fck,       CK_16XX | CK_1510 | CK_310),
-        CLK("i2c_omap.1", "ick",        &i2c_ick,       CK_16XX),
-        CLK("i2c_omap.1", "ick",        &dummy_ck,      CK_1510 | CK_310),
-        CLK("omap_uwire", "fck",        &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
-        CLK("omap-mcbsp.1", "ick",      &dspper_ck,     CK_16XX),
-        CLK("omap-mcbsp.1", "ick",      &dummy_ck,      CK_1510 | CK_310),
-        CLK("omap-mcbsp.2", "ick",      &armper_ck.clk, CK_16XX),
-        CLK("omap-mcbsp.2", "ick",      &dummy_ck,      CK_1510 | CK_310),
-        CLK("omap-mcbsp.3", "ick",      &dspper_ck,     CK_16XX),
-        CLK("omap-mcbsp.3", "ick",      &dummy_ck,      CK_1510 | CK_310),
-        CLK("omap-mcbsp.1", "fck",      &dspxor_ck,     CK_16XX | CK_1510 | CK_310),
-        CLK("omap-mcbsp.2", "fck",      &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
-        CLK("omap-mcbsp.3", "fck",      &dspxor_ck,     CK_16XX | CK_1510 | CK_310),
-};
-
-static int omap1_clk_enable_generic(struct clk * clk);
-static int omap1_clk_enable(struct clk *clk);
-static void omap1_clk_disable_generic(struct clk * clk);
-static void omap1_clk_disable(struct clk *clk);
+#include "opp.h"
 
 __u32 arm_idlect1_mask;
+struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
 
 /*-------------------------------------------------------------------------
  * Omap1 specific clock functions
  *-------------------------------------------------------------------------*/
 
-static unsigned long omap1_watchdog_recalc(struct clk *clk)
-{
-        return clk->parent->rate / 14;
-}
-
-static unsigned long omap1_uart_recalc(struct clk *clk)
+unsigned long omap1_uart_recalc(struct clk *clk)
 {
         unsigned int val = __raw_readl(clk->enable_reg);
         return val & clk->enable_bit ? 48000000 : 12000000;
 }
 
-static unsigned long omap1_sossi_recalc(struct clk *clk)
+unsigned long omap1_sossi_recalc(struct clk *clk)
 {
         u32 div = omap_readl(MOD_CONF_CTRL_1);
 
@@ -177,64 +54,6 @@ static unsigned long omap1_sossi_recalc(struct clk *clk)
         return clk->parent->rate / div;
 }
 
-static int omap1_clk_enable_dsp_domain(struct clk *clk)
-{
-        int retval;
-
-        retval = omap1_clk_enable(&api_ck.clk);
-        if (!retval) {
-                retval = omap1_clk_enable_generic(clk);
-                omap1_clk_disable(&api_ck.clk);
-        }
-
-        return retval;
-}
-
-static void omap1_clk_disable_dsp_domain(struct clk *clk)
-{
-        if (omap1_clk_enable(&api_ck.clk) == 0) {
-                omap1_clk_disable_generic(clk);
-                omap1_clk_disable(&api_ck.clk);
-        }
-}
-
-static const struct clkops clkops_dspck = {
-        .enable         = &omap1_clk_enable_dsp_domain,
-        .disable        = &omap1_clk_disable_dsp_domain,
-};
-
-static int omap1_clk_enable_uart_functional(struct clk *clk)
-{
-        int ret;
-        struct uart_clk *uclk;
-
-        ret = omap1_clk_enable_generic(clk);
-        if (ret == 0) {
-                /* Set smart idle acknowledgement mode */
-                uclk = (struct uart_clk *)clk;
-                omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8,
-                            uclk->sysc_addr);
-        }
-
-        return ret;
-}
-
-static void omap1_clk_disable_uart_functional(struct clk *clk)
-{
-        struct uart_clk *uclk;
-
-        /* Set force idle acknowledgement mode */
-        uclk = (struct uart_clk *)clk;
-        omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr);
-
-        omap1_clk_disable_generic(clk);
-}
-
-static const struct clkops clkops_uart = {
-        .enable         = &omap1_clk_enable_uart_functional,
-        .disable        = &omap1_clk_disable_uart_functional,
-};
-
 static void omap1_clk_allow_idle(struct clk *clk)
 {
         struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
@@ -342,7 +161,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
         return dsor_exp;
 }
 
-static unsigned long omap1_ckctl_recalc(struct clk *clk)
+unsigned long omap1_ckctl_recalc(struct clk *clk)
 {
         /* Calculate divisor encoded as 2-bit exponent */
         int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
@@ -350,7 +169,7 @@ static unsigned long omap1_ckctl_recalc(struct clk *clk)
         return clk->parent->rate / dsor;
 }
 
-static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk)
+unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk)
 {
         int dsor;
 
@@ -361,28 +180,29 @@ static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk)
          * Note that DSP_CKCTL virt addr = phys addr, so
          * we must use __raw_readw() instead of omap_readw().
          */
-        omap1_clk_enable(&api_ck.clk);
+        omap1_clk_enable(api_ck_p);
         dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
-        omap1_clk_disable(&api_ck.clk);
+        omap1_clk_disable(api_ck_p);
 
         return clk->parent->rate / dsor;
 }
 
 /* MPU virtual clock functions */
-static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
+int omap1_select_table_rate(struct clk *clk, unsigned long rate)
 {
         /* Find the highest supported frequency <= rate and switch to it */
         struct mpu_rate * ptr;
+        unsigned long dpll1_rate, ref_rate;
 
-        if (clk != &virtual_ck_mpu)
-                return -EINVAL;
+        dpll1_rate = ck_dpll1_p->rate;
+        ref_rate = ck_ref_p->rate;
 
-        for (ptr = rate_table; ptr->rate; ptr++) {
-                if (ptr->xtal != ck_ref.rate)
+        for (ptr = omap1_rate_table; ptr->rate; ptr++) {
+                if (ptr->xtal != ref_rate)
                         continue;
 
                 /* DPLL1 cannot be reprogrammed without risking system crash */
-                if (likely(ck_dpll1.rate!=0) && ptr->pll_rate != ck_dpll1.rate)
+                if (likely(dpll1_rate != 0) && ptr->pll_rate != dpll1_rate)
                         continue;
 
                 /* Can check only after xtal frequency check */
@@ -398,16 +218,18 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
          * Reprogramming the DPLL is tricky, it must be done from SRAM.
          * (on 730, bit 13 must always be 1)
          */
-        if (cpu_is_omap730())
+        if (cpu_is_omap7xx())
                 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000);
         else
                 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
 
-        ck_dpll1.rate = ptr->pll_rate;
+        /* XXX Do we need to recalculate the tree below DPLL1 at this point? */
+        ck_dpll1_p->rate = ptr->pll_rate;
+
         return 0;
 }
 
-static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
+int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
 {
         int dsor_exp;
         u16 regval;
@@ -427,7 +249,7 @@ static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
         return 0;
 }
 
-static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate)
+long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate)
 {
         int dsor_exp = calc_dsor_exp(clk, rate);
         if (dsor_exp < 0)
@@ -437,7 +259,7 @@ static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate)
         return clk->parent->rate / (1 << dsor_exp);
 }
 
-static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate)
+int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate)
 {
         int dsor_exp;
         u16 regval;
@@ -457,19 +279,19 @@ static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate)
         return 0;
 }
 
-static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate)
+long omap1_round_to_table_rate(struct clk *clk, unsigned long rate)
 {
         /* Find the highest supported frequency <= rate */
         struct mpu_rate * ptr;
-        long  highest_rate;
+        long highest_rate;
+        unsigned long ref_rate;
 
-        if (clk != &virtual_ck_mpu)
-                return -EINVAL;
+        ref_rate = ck_ref_p->rate;
 
         highest_rate = -EINVAL;
 
-        for (ptr = rate_table; ptr->rate; ptr++) {
-                if (ptr->xtal != ck_ref.rate)
+        for (ptr = omap1_rate_table; ptr->rate; ptr++) {
+                if (ptr->xtal != ref_rate)
                         continue;
 
                 highest_rate = ptr->rate;
@@ -504,8 +326,8 @@ static unsigned calc_ext_dsor(unsigned long rate)
         return dsor;
 }
 
-/* Only needed on 1510 */
-static int omap1_set_uart_rate(struct clk * clk, unsigned long rate)
+/* XXX Only needed on 1510 */
+int omap1_set_uart_rate(struct clk *clk, unsigned long rate)
 {
         unsigned int val;
 
@@ -523,7 +345,7 @@ static int omap1_set_uart_rate(struct clk * clk, unsigned long rate)
 }
 
 /* External clock (MCLK & BCLK) functions */
-static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
+int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate)
 {
         unsigned dsor;
         __u16 ratio_bits;
@@ -541,7 +363,7 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
         return 0;
 }
 
-static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate)
+int omap1_set_sossi_rate(struct clk *clk, unsigned long rate)
 {
         u32 l;
         int div;
@@ -564,12 +386,12 @@ static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
-static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate)
+long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate)
 {
         return 96000000 / calc_ext_dsor(rate);
 }
 
-static void omap1_init_ext_clk(struct clk * clk)
+void omap1_init_ext_clk(struct clk *clk)
 {
         unsigned dsor;
         __u16 ratio_bits;
@@ -587,7 +409,7 @@ static void omap1_init_ext_clk(struct clk * clk)
         clk-> rate = 96000000 / dsor;
 }
 
-static int omap1_clk_enable(struct clk *clk)
+int omap1_clk_enable(struct clk *clk)
 {
         int ret = 0;
 
@@ -615,7 +437,7 @@ err:
         return ret;
 }
 
-static void omap1_clk_disable(struct clk *clk)
+void omap1_clk_disable(struct clk *clk)
 {
         if (clk->usecount > 0 && !(--clk->usecount)) {
                 clk->ops->disable(clk);
@@ -670,23 +492,78 @@ static void omap1_clk_disable_generic(struct clk *clk)
         }
 }
 
-static const struct clkops clkops_generic = {
-        .enable         = &omap1_clk_enable_generic,
-        .disable        = &omap1_clk_disable_generic,
+const struct clkops clkops_generic = {
+        .enable         = omap1_clk_enable_generic,
+        .disable        = omap1_clk_disable_generic,
+};
+
+static int omap1_clk_enable_dsp_domain(struct clk *clk)
+{
+        int retval;
+
+        retval = omap1_clk_enable(api_ck_p);
+        if (!retval) {
+                retval = omap1_clk_enable_generic(clk);
+                omap1_clk_disable(api_ck_p);
+        }
+
+        return retval;
+}
+
+static void omap1_clk_disable_dsp_domain(struct clk *clk)
+{
+        if (omap1_clk_enable(api_ck_p) == 0) {
+                omap1_clk_disable_generic(clk);
+                omap1_clk_disable(api_ck_p);
+        }
+}
+
+const struct clkops clkops_dspck = {
+        .enable         = omap1_clk_enable_dsp_domain,
+        .disable        = omap1_clk_disable_dsp_domain,
 };
 
-static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
+static int omap1_clk_enable_uart_functional(struct clk *clk)
+{
+        int ret;
+        struct uart_clk *uclk;
+
+        ret = omap1_clk_enable_generic(clk);
+        if (ret == 0) {
+                /* Set smart idle acknowledgement mode */
+                uclk = (struct uart_clk *)clk;
+                omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8,
+                            uclk->sysc_addr);
+        }
+
+        return ret;
+}
+
+static void omap1_clk_disable_uart_functional(struct clk *clk)
 {
-        if (clk->flags & RATE_FIXED)
-                return clk->rate;
+        struct uart_clk *uclk;
+
+        /* Set force idle acknowledgement mode */
+        uclk = (struct uart_clk *)clk;
+        omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr);
+
+        omap1_clk_disable_generic(clk);
+}
+
+const struct clkops clkops_uart = {
+        .enable         = omap1_clk_enable_uart_functional,
+        .disable        = omap1_clk_disable_uart_functional,
+};
 
+long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
+{
         if (clk->round_rate != NULL)
                 return clk->round_rate(clk, rate);
 
         return clk->rate;
 }
 
-static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
+int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
 {
         int  ret = -EINVAL;
 
@@ -701,7 +578,7 @@ static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
 
 #ifdef CONFIG_OMAP_RESET_CLOCKS
 
-static void __init omap1_clk_disable_unused(struct clk *clk)
+void __init omap1_clk_disable_unused(struct clk *clk)
 {
         __u32 regval32;
 
@@ -722,184 +599,9 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
         if ((regval32 & (1 << clk->enable_bit)) == 0)
                 return;
 
-        /* FIXME: This clock seems to be necessary but no-one
-         * has asked for its activation. */
-        if (clk == &tc2_ck              /* FIX: pm.c (SRAM), CCP, Camera */
-            || clk == &ck_dpll1out.clk  /* FIX: SoSSI, SSR */
-            || clk == &arm_gpio_ck      /* FIX: GPIO code for 1510 */
-                ) {
-                printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
-                       clk->name);
-                return;
-        }
-
         printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
         clk->ops->disable(clk);
         printk(" done\n");
 }
 
-#else
-#define omap1_clk_disable_unused        NULL
-#endif
-
-static struct clk_functions omap1_clk_functions = {
-        .clk_enable             = omap1_clk_enable,
-        .clk_disable            = omap1_clk_disable,
-        .clk_round_rate         = omap1_clk_round_rate,
-        .clk_set_rate           = omap1_clk_set_rate,
-        .clk_disable_unused     = omap1_clk_disable_unused,
-};
-
-int __init omap1_clk_init(void)
-{
-        struct omap_clk *c;
-        const struct omap_clock_config *info;
-        int crystal_type = 0; /* Default 12 MHz */
-        u32 reg, cpu_mask;
-
-#ifdef CONFIG_DEBUG_LL
-        /* Resets some clocks that may be left on from bootloader,
-         * but leaves serial clocks on.
-         */
-        omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
-#endif
-
-        /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
-        reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
-        omap_writew(reg, SOFT_REQ_REG);
-        if (!cpu_is_omap15xx())
-                omap_writew(0, SOFT_REQ_REG2);
-
-        clk_init(&omap1_clk_functions);
-
-        /* By default all idlect1 clocks are allowed to idle */
-        arm_idlect1_mask = ~0;
-
-        for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
-                clk_preinit(c->lk.clk);
-
-        cpu_mask = 0;
-        if (cpu_is_omap16xx())
-                cpu_mask |= CK_16XX;
-        if (cpu_is_omap1510())
-                cpu_mask |= CK_1510;
-        if (cpu_is_omap730())
-                cpu_mask |= CK_730;
-        if (cpu_is_omap310())
-                cpu_mask |= CK_310;
-
-        for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
-                if (c->cpu & cpu_mask) {
-                        clkdev_add(&c->lk);
-                        clk_register(c->lk.clk);
-                }
-
-        info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
-        if (info != NULL) {
-                if (!cpu_is_omap15xx())
-                        crystal_type = info->system_clock_type;
-        }
-
-#if defined(CONFIG_ARCH_OMAP730)
-        ck_ref.rate = 13000000;
-#elif defined(CONFIG_ARCH_OMAP16XX)
-        if (crystal_type == 2)
-                ck_ref.rate = 19200000;
 #endif
-
-        printk("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n",
-               omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
-               omap_readw(ARM_CKCTL));
-
-        /* We want to be in syncronous scalable mode */
-        omap_writew(0x1000, ARM_SYSST);
-
-#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
-        /* Use values set by bootloader. Determine PLL rate and recalculate
-         * dependent clocks as if kernel had changed PLL or divisors.
-         */
-        {
-                unsigned pll_ctl_val = omap_readw(DPLL_CTL);
-
-                ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */
-                if (pll_ctl_val & 0x10) {
-                        /* PLL enabled, apply multiplier and divisor */
-                        if (pll_ctl_val & 0xf80)
-                                ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7;
-                        ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
-                } else {
-                        /* PLL disabled, apply bypass divisor */
-                        switch (pll_ctl_val & 0xc) {
-                        case 0:
-                                break;
-                        case 0x4:
-                                ck_dpll1.rate /= 2;
-                                break;
-                        default:
-                                ck_dpll1.rate /= 4;
-                                break;
-                        }
-                }
-        }
-#else
-        /* Find the highest supported frequency and enable it */
-        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
-                printk(KERN_ERR "System frequencies not set. Check your config.\n");
-                /* Guess sane values (60MHz) */
-                omap_writew(0x2290, DPLL_CTL);
-                omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL);
-                ck_dpll1.rate = 60000000;
-        }
-#endif
-        propagate_rate(&ck_dpll1);
-        /* Cache rates for clocks connected to ck_ref (not dpll1) */
-        propagate_rate(&ck_ref);
-        printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
-                "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
-               ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
-               ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
-               arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
-
-#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
-        /* Select slicer output as OMAP input clock */
-        omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
-#endif
-
-        /* Amstrad Delta wants BCLK high when inactive */
-        if (machine_is_ams_delta())
-                omap_writel(omap_readl(ULPD_CLOCK_CTRL) |
-                                (1 << SDW_MCLK_INV_BIT),
-                                ULPD_CLOCK_CTRL);
-
-        /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
-        /* (on 730, bit 13 must not be cleared) */
-        if (cpu_is_omap730())
-                omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL);
-        else
-                omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
-
-        /* Put DSP/MPUI into reset until needed */
-        omap_writew(0, ARM_RSTCT1);
-        omap_writew(1, ARM_RSTCT2);
-        omap_writew(0x400, ARM_IDLECT1);
-
-        /*
-         * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8)
-         * of the ARM_IDLECT2 register must be set to zero. The power-on
-         * default value of this bit is one.
-         */
-        omap_writew(0x0000, ARM_IDLECT2);       /* Turn LCD clock off also */
-
-        /*
-         * Only enable those clocks we will need, let the drivers
-         * enable other clocks as necessary
-         */
-        clk_enable(&armper_ck.clk);
-        clk_enable(&armxor_ck.clk);
-        clk_enable(&armtim_ck.clk); /* This should be done by timer code */
-
-        if (cpu_is_omap15xx())
-                clk_enable(&arm_gpio_ck);
-
-        return 0;
-}
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 17f874271255..a4190afb8614 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -1,7 +1,7 @@
 /*
  *  linux/arch/arm/mach-omap1/clock.h
  *
- *  Copyright (C) 2004 - 2005 Nokia corporation
+ *  Copyright (C) 2004 - 2005, 2009 Nokia corporation
  *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
  *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
  *
@@ -13,30 +13,36 @@
 #ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
 #define __ARCH_ARM_MACH_OMAP1_CLOCK_H
 
-static unsigned long omap1_ckctl_recalc(struct clk *clk);
-static unsigned long omap1_watchdog_recalc(struct clk *clk);
-static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
-static unsigned long omap1_sossi_recalc(struct clk *clk);
-static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);
-static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate);
-static int omap1_set_uart_rate(struct clk * clk, unsigned long rate);
-static unsigned long omap1_uart_recalc(struct clk *clk);
-static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate);
-static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate);
-static void omap1_init_ext_clk(struct clk * clk);
-static int omap1_select_table_rate(struct clk * clk, unsigned long rate);
-static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate);
-
-static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
-static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
-
-struct mpu_rate {
-        unsigned long           rate;
-        unsigned long           xtal;
-        unsigned long           pll_rate;
-        __u16                   ckctl_val;
-        __u16                   dpllctl_val;
-};
+#include <linux/clk.h>
+
+#include <plat/clock.h>
+
+extern int __init omap1_clk_init(void);
+extern int omap1_clk_enable(struct clk *clk);
+extern void omap1_clk_disable(struct clk *clk);
+extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
+extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate);
+extern unsigned long omap1_ckctl_recalc(struct clk *clk);
+extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
+extern unsigned long omap1_sossi_recalc(struct clk *clk);
+extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);
+extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate);
+extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate);
+extern unsigned long omap1_uart_recalc(struct clk *clk);
+extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate);
+extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate);
+extern void omap1_init_ext_clk(struct clk *clk);
+extern int omap1_select_table_rate(struct clk *clk, unsigned long rate);
+extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate);
+extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
+extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
+extern unsigned long omap1_watchdog_recalc(struct clk *clk);
+
+#ifdef CONFIG_OMAP_RESET_CLOCKS
+extern void __init omap1_clk_disable_unused(struct clk *clk);
+#else
+#define omap1_clk_disable_unused        NULL
+#endif
 
 struct uart_clk {
         struct clk      clk;
@@ -96,574 +102,12 @@ struct arm_idlect1_clk {
 #define SOFT_REQ_REG            0xfffe0834
 #define SOFT_REQ_REG2           0xfffe0880
 
-/*-------------------------------------------------------------------------
- * Omap1 MPU rate table
- *-------------------------------------------------------------------------*/
-static struct mpu_rate rate_table[] = {
-        /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
-         * NOTE: Comment order here is different from bits in CKCTL value:
-         * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
-         */
-#if defined(CONFIG_OMAP_ARM_216MHZ)
-        { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_195MHZ)
-        { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_192MHZ)
-        { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
-        { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
-        {  96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
-        {  48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */
-        {  24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_182MHZ)
-        { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_168MHZ)
-        { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_150MHZ)
-        { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
-#endif
-#if defined(CONFIG_OMAP_ARM_120MHZ)
-        { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
-#endif
-#if defined(CONFIG_OMAP_ARM_96MHZ)
-        {  96000000, 12000000,  96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */
-#endif
-#if defined(CONFIG_OMAP_ARM_60MHZ)
-        {  60000000, 12000000,  60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
-#endif
-#if defined(CONFIG_OMAP_ARM_30MHZ)
-        {  30000000, 12000000,  60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
-#endif
-        { 0, 0, 0, 0, 0 },
-};
-
-/*-------------------------------------------------------------------------
- * Omap1 clocks
- *-------------------------------------------------------------------------*/
-
-static struct clk ck_ref = {
-        .name           = "ck_ref",
-        .ops            = &clkops_null,
-        .rate           = 12000000,
-};
-
-static struct clk ck_dpll1 = {
-        .name           = "ck_dpll1",
-        .ops            = &clkops_null,
-        .parent         = &ck_ref,
-};
-
-static struct arm_idlect1_clk ck_dpll1out = {
-        .clk = {
-                .name           = "ck_dpll1out",
-                .ops            = &clkops_generic,
-                .parent         = &ck_dpll1,
-                .flags          = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT,
-                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-                .enable_bit     = EN_CKOUT_ARM,
-                .recalc         = &followparent_recalc,
-        },
-        .idlect_shift   = 12,
-};
-
-static struct clk sossi_ck = {
-        .name           = "ck_sossi",
-        .ops            = &clkops_generic,
-        .parent         = &ck_dpll1out.clk,
-        .flags          = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT,
-        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1),
-        .enable_bit     = 16,
-        .recalc         = &omap1_sossi_recalc,
-        .set_rate       = &omap1_set_sossi_rate,
-};
-
-static struct clk arm_ck = {
-        .name           = "arm_ck",
-        .ops            = &clkops_null,
-        .parent         = &ck_dpll1,
-        .rate_offset    = CKCTL_ARMDIV_OFFSET,
-        .recalc         = &omap1_ckctl_recalc,
-        .round_rate     = omap1_clk_round_rate_ckctl_arm,
-        .set_rate       = omap1_clk_set_rate_ckctl_arm,
-};
-
-static struct arm_idlect1_clk armper_ck = {
-        .clk = {
-                .name           = "armper_ck",
-                .ops            = &clkops_generic,
-                .parent         = &ck_dpll1,
-                .flags          = CLOCK_IDLE_CONTROL,
-                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-                .enable_bit     = EN_PERCK,
-                .rate_offset    = CKCTL_PERDIV_OFFSET,
-                .recalc         = &omap1_ckctl_recalc,
-                .round_rate     = omap1_clk_round_rate_ckctl_arm,
-                .set_rate       = omap1_clk_set_rate_ckctl_arm,
-        },
-        .idlect_shift   = 2,
-};
-
-static struct clk arm_gpio_ck = {
-        .name           = "arm_gpio_ck",
-        .ops            = &clkops_generic,
-        .parent         = &ck_dpll1,
-        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-        .enable_bit     = EN_GPIOCK,
-        .recalc         = &followparent_recalc,
-};
-
-static struct arm_idlect1_clk armxor_ck = {
-        .clk = {
-                .name           = "armxor_ck",
-                .ops            = &clkops_generic,
-                .parent         = &ck_ref,
-                .flags          = CLOCK_IDLE_CONTROL,
-                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-                .enable_bit     = EN_XORPCK,
-                .recalc         = &followparent_recalc,
-        },
-        .idlect_shift   = 1,
-};
-
-static struct arm_idlect1_clk armtim_ck = {
-        .clk = {
-                .name           = "armtim_ck",
-                .ops            = &clkops_generic,
-                .parent         = &ck_ref,
-                .flags          = CLOCK_IDLE_CONTROL,
-                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-                .enable_bit     = EN_TIMCK,
-                .recalc         = &followparent_recalc,
-        },
-        .idlect_shift   = 9,
-};
-
-static struct arm_idlect1_clk armwdt_ck = {
-        .clk = {
-                .name           = "armwdt_ck",
-                .ops            = &clkops_generic,
-                .parent         = &ck_ref,
-                .flags          = CLOCK_IDLE_CONTROL,
-                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-                .enable_bit     = EN_WDTCK,
-                .recalc         = &omap1_watchdog_recalc,
-        },
-        .idlect_shift   = 0,
-};
-
-static struct clk arminth_ck16xx = {
-        .name           = "arminth_ck",
-        .ops            = &clkops_null,
-        .parent         = &arm_ck,
-        .recalc         = &followparent_recalc,
-        /* Note: On 16xx the frequency can be divided by 2 by programming
-         * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
-         *
-         * 1510 version is in TC clocks.
-         */
-};
-
-static struct clk dsp_ck = {
-        .name           = "dsp_ck",
-        .ops            = &clkops_generic,
-        .parent         = &ck_dpll1,
-        .enable_reg     = OMAP1_IO_ADDRESS(ARM_CKCTL),
-        .enable_bit     = EN_DSPCK,
-        .rate_offset    = CKCTL_DSPDIV_OFFSET,
-        .recalc         = &omap1_ckctl_recalc,
-        .round_rate     = omap1_clk_round_rate_ckctl_arm,
-        .set_rate       = omap1_clk_set_rate_ckctl_arm,
-};
-
-static struct clk dspmmu_ck = {
-        .name           = "dspmmu_ck",
-        .ops            = &clkops_null,
-        .parent         = &ck_dpll1,
-        .rate_offset    = CKCTL_DSPMMUDIV_OFFSET,
-        .recalc         = &omap1_ckctl_recalc,
-        .round_rate     = omap1_clk_round_rate_ckctl_arm,
-        .set_rate       = omap1_clk_set_rate_ckctl_arm,
-};
-
-static struct clk dspper_ck = {
-        .name           = "dspper_ck",
-        .ops            = &clkops_dspck,
-        .parent         = &ck_dpll1,
-        .enable_reg     = DSP_IDLECT2,
-        .enable_bit     = EN_PERCK,
-        .rate_offset    = CKCTL_PERDIV_OFFSET,
-        .recalc         = &omap1_ckctl_recalc_dsp_domain,
-        .round_rate     = omap1_clk_round_rate_ckctl_arm,
-        .set_rate       = &omap1_clk_set_rate_dsp_domain,
-};
-
-static struct clk dspxor_ck = {
-        .name           = "dspxor_ck",
-        .ops            = &clkops_dspck,
-        .parent         = &ck_ref,
-        .enable_reg     = DSP_IDLECT2,
-        .enable_bit     = EN_XORPCK,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk dsptim_ck = {
-        .name           = "dsptim_ck",
-        .ops            = &clkops_dspck,
-        .parent         = &ck_ref,
-        .enable_reg     = DSP_IDLECT2,
-        .enable_bit     = EN_DSPTIMCK,
-        .recalc         = &followparent_recalc,
-};
-
-/* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */
-static struct arm_idlect1_clk tc_ck = {
-        .clk = {
-                .name           = "tc_ck",
-                .ops            = &clkops_null,
-                .parent         = &ck_dpll1,
-                .flags          = CLOCK_IDLE_CONTROL,
-                .rate_offset    = CKCTL_TCDIV_OFFSET,
-                .recalc         = &omap1_ckctl_recalc,
-                .round_rate     = omap1_clk_round_rate_ckctl_arm,
-                .set_rate       = omap1_clk_set_rate_ckctl_arm,
-        },
-        .idlect_shift   = 6,
-};
-
-static struct clk arminth_ck1510 = {
-        .name           = "arminth_ck",
-        .ops            = &clkops_null,
-        .parent         = &tc_ck.clk,
-        .recalc         = &followparent_recalc,
-        /* Note: On 1510 the frequency follows TC_CK
-         *
-         * 16xx version is in MPU clocks.
-         */
-};
-
-static struct clk tipb_ck = {
-        /* No-idle controlled by "tc_ck" */
-        .name           = "tipb_ck",
-        .ops            = &clkops_null,
-        .parent         = &tc_ck.clk,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk l3_ocpi_ck = {
-        /* No-idle controlled by "tc_ck" */
-        .name           = "l3_ocpi_ck",
-        .ops            = &clkops_generic,
-        .parent         = &tc_ck.clk,
-        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
-        .enable_bit     = EN_OCPI_CK,
-        .recalc         = &followparent_recalc,
-};
+extern __u32 arm_idlect1_mask;
+extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
 
-static struct clk tc1_ck = {
-        .name           = "tc1_ck",
-        .ops            = &clkops_generic,
-        .parent         = &tc_ck.clk,
-        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
-        .enable_bit     = EN_TC1_CK,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk tc2_ck = {
-        .name           = "tc2_ck",
-        .ops            = &clkops_generic,
-        .parent         = &tc_ck.clk,
-        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
-        .enable_bit     = EN_TC2_CK,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk dma_ck = {
-        /* No-idle controlled by "tc_ck" */
-        .name           = "dma_ck",
-        .ops            = &clkops_null,
-        .parent         = &tc_ck.clk,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk dma_lcdfree_ck = {
-        .name           = "dma_lcdfree_ck",
-        .ops            = &clkops_null,
-        .parent         = &tc_ck.clk,
-        .recalc         = &followparent_recalc,
-};
-
-static struct arm_idlect1_clk api_ck = {
-        .clk = {
-                .name           = "api_ck",
-                .ops            = &clkops_generic,
-                .parent         = &tc_ck.clk,
-                .flags          = CLOCK_IDLE_CONTROL,
-                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-                .enable_bit     = EN_APICK,
-                .recalc         = &followparent_recalc,
-        },
-        .idlect_shift   = 8,
-};
-
-static struct arm_idlect1_clk lb_ck = {
-        .clk = {
-                .name           = "lb_ck",
-                .ops            = &clkops_generic,
-                .parent         = &tc_ck.clk,
-                .flags          = CLOCK_IDLE_CONTROL,
-                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-                .enable_bit     = EN_LBCK,
-                .recalc         = &followparent_recalc,
-        },
-        .idlect_shift   = 4,
-};
-
-static struct clk rhea1_ck = {
-        .name           = "rhea1_ck",
-        .ops            = &clkops_null,
-        .parent         = &tc_ck.clk,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk rhea2_ck = {
-        .name           = "rhea2_ck",
-        .ops            = &clkops_null,
-        .parent         = &tc_ck.clk,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk lcd_ck_16xx = {
-        .name           = "lcd_ck",
-        .ops            = &clkops_generic,
-        .parent         = &ck_dpll1,
-        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-        .enable_bit     = EN_LCDCK,
-        .rate_offset    = CKCTL_LCDDIV_OFFSET,
-        .recalc         = &omap1_ckctl_recalc,
-        .round_rate     = omap1_clk_round_rate_ckctl_arm,
-        .set_rate       = omap1_clk_set_rate_ckctl_arm,
-};
-
-static struct arm_idlect1_clk lcd_ck_1510 = {
-        .clk = {
-                .name           = "lcd_ck",
-                .ops            = &clkops_generic,
-                .parent         = &ck_dpll1,
-                .flags          = CLOCK_IDLE_CONTROL,
-                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
-                .enable_bit     = EN_LCDCK,
-                .rate_offset    = CKCTL_LCDDIV_OFFSET,
-                .recalc         = &omap1_ckctl_recalc,
-                .round_rate     = omap1_clk_round_rate_ckctl_arm,
-                .set_rate       = omap1_clk_set_rate_ckctl_arm,
-        },
-        .idlect_shift   = 3,
-};
-
-static struct clk uart1_1510 = {
-        .name           = "uart1_ck",
-        .ops            = &clkops_null,
-        /* Direct from ULPD, no real parent */
-        .parent         = &armper_ck.clk,
-        .rate           = 12000000,
-        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
-        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
-        .enable_bit     = 29,   /* Chooses between 12MHz and 48MHz */
-        .set_rate       = &omap1_set_uart_rate,
-        .recalc         = &omap1_uart_recalc,
-};
-
-static struct uart_clk uart1_16xx = {
-        .clk    = {
-                .name           = "uart1_ck",
-                .ops            = &clkops_uart,
-                /* Direct from ULPD, no real parent */
-                .parent         = &armper_ck.clk,
-                .rate           = 48000000,
-                .flags          = RATE_FIXED | ENABLE_REG_32BIT |
-                                  CLOCK_NO_IDLE_PARENT,
-                .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
-                .enable_bit     = 29,
-        },
-        .sysc_addr      = 0xfffb0054,
-};
-
-static struct clk uart2_ck = {
-        .name           = "uart2_ck",
-        .ops            = &clkops_null,
-        /* Direct from ULPD, no real parent */
-        .parent         = &armper_ck.clk,
-        .rate           = 12000000,
-        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
-        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
-        .enable_bit     = 30,   /* Chooses between 12MHz and 48MHz */
-        .set_rate       = &omap1_set_uart_rate,
-        .recalc         = &omap1_uart_recalc,
-};
-
-static struct clk uart3_1510 = {
-        .name           = "uart3_ck",
-        .ops            = &clkops_null,
-        /* Direct from ULPD, no real parent */
-        .parent         = &armper_ck.clk,
-        .rate           = 12000000,
-        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
-        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
-        .enable_bit     = 31,   /* Chooses between 12MHz and 48MHz */
-        .set_rate       = &omap1_set_uart_rate,
-        .recalc         = &omap1_uart_recalc,
-};
-
-static struct uart_clk uart3_16xx = {
-        .clk    = {
-                .name           = "uart3_ck",
-                .ops            = &clkops_uart,
-                /* Direct from ULPD, no real parent */
-                .parent         = &armper_ck.clk,
-                .rate           = 48000000,
-                .flags          = RATE_FIXED | ENABLE_REG_32BIT |
-                                  CLOCK_NO_IDLE_PARENT,
-                .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
-                .enable_bit     = 31,
-        },
-        .sysc_addr      = 0xfffb9854,
-};
-
-static struct clk usb_clko = {  /* 6 MHz output on W4_USB_CLKO */
-        .name           = "usb_clko",
-        .ops            = &clkops_generic,
-        /* Direct from ULPD, no parent */
-        .rate           = 6000000,
-        .flags          = RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
-        .enable_bit     = USB_MCLK_EN_BIT,
-};
-
-static struct clk usb_hhc_ck1510 = {
-        .name           = "usb_hhc_ck",
-        .ops            = &clkops_generic,
-        /* Direct from ULPD, no parent */
-        .rate           = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
-        .flags          = RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
-        .enable_bit     = USB_HOST_HHC_UHOST_EN,
-};
-
-static struct clk usb_hhc_ck16xx = {
-        .name           = "usb_hhc_ck",
-        .ops            = &clkops_generic,
-        /* Direct from ULPD, no parent */
-        .rate           = 48000000,
-        /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
-        .flags          = RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
-        .enable_bit     = 8 /* UHOST_EN */,
-};
-
-static struct clk usb_dc_ck = {
-        .name           = "usb_dc_ck",
-        .ops            = &clkops_generic,
-        /* Direct from ULPD, no parent */
-        .rate           = 48000000,
-        .flags          = RATE_FIXED,
-        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
-        .enable_bit     = 4,
-};
-
-static struct clk mclk_1510 = {
-        .name           = "mclk",
-        .ops            = &clkops_generic,
-        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
-        .rate           = 12000000,
-        .flags          = RATE_FIXED,
-        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
-        .enable_bit     = 6,
-};
-
-static struct clk mclk_16xx = {
-        .name           = "mclk",
-        .ops            = &clkops_generic,
-        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
-        .enable_reg     = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL),
-        .enable_bit     = COM_ULPD_PLL_CLK_REQ,
-        .set_rate       = &omap1_set_ext_clk_rate,
-        .round_rate     = &omap1_round_ext_clk_rate,
-        .init           = &omap1_init_ext_clk,
-};
-
-static struct clk bclk_1510 = {
-        .name           = "bclk",
-        .ops            = &clkops_generic,
-        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
-        .rate           = 12000000,
-        .flags          = RATE_FIXED,
-};
-
-static struct clk bclk_16xx = {
-        .name           = "bclk",
-        .ops            = &clkops_generic,
-        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
-        .enable_reg     = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL),
-        .enable_bit     = SWD_ULPD_PLL_CLK_REQ,
-        .set_rate       = &omap1_set_ext_clk_rate,
-        .round_rate     = &omap1_round_ext_clk_rate,
-        .init           = &omap1_init_ext_clk,
-};
-
-static struct clk mmc1_ck = {
-        .name           = "mmc_ck",
-        .ops            = &clkops_generic,
-        /* Functional clock is direct from ULPD, interface clock is ARMPER */
-        .parent         = &armper_ck.clk,
-        .rate           = 48000000,
-        .flags          = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
-        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
-        .enable_bit     = 23,
-};
-
-static struct clk mmc2_ck = {
-        .name           = "mmc_ck",
-        .id             = 1,
-        .ops            = &clkops_generic,
-        /* Functional clock is direct from ULPD, interface clock is ARMPER */
-        .parent         = &armper_ck.clk,
-        .rate           = 48000000,
-        .flags          = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
-        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
-        .enable_bit     = 20,
-};
-
-static struct clk virtual_ck_mpu = {
-        .name           = "mpu",
-        .ops            = &clkops_null,
-        .parent         = &arm_ck, /* Is smarter alias for */
-        .recalc         = &followparent_recalc,
-        .set_rate       = &omap1_select_table_rate,
-        .round_rate     = &omap1_round_to_table_rate,
-};
-
-/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK
-remains active during MPU idle whenever this is enabled */
-static struct clk i2c_fck = {
-        .name           = "i2c_fck",
-        .id             = 1,
-        .ops            = &clkops_null,
-        .flags          = CLOCK_NO_IDLE_PARENT,
-        .parent         = &armxor_ck.clk,
-        .recalc         = &followparent_recalc,
-};
-
-static struct clk i2c_ick = {
-        .name           = "i2c_ick",
-        .id             = 1,
-        .ops            = &clkops_null,
-        .flags          = CLOCK_NO_IDLE_PARENT,
-        .parent         = &armper_ck.clk,
-        .recalc         = &followparent_recalc,
-};
+extern const struct clkops clkops_dspck;
+extern const struct clkops clkops_dummy;
+extern const struct clkops clkops_uart;
+extern const struct clkops clkops_generic;
 
 #endif
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
new file mode 100644
index 000000000000..aa8558adbf1c
--- /dev/null
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -0,0 +1,831 @@
+/*
+ *  linux/arch/arm/mach-omap1/clock_data.c
+ *
+ *  Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <asm/mach-types.h>  /* for machine_is_* */
+
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/clkdev_omap.h>
+#include <plat/usb.h>   /* for OTG_BASE */
+
+#include "clock.h"
+
+/*------------------------------------------------------------------------
+ * Omap1 clocks
+ *-------------------------------------------------------------------------*/
+
+static struct clk ck_ref = {
+        .name           = "ck_ref",
+        .ops            = &clkops_null,
+        .rate           = 12000000,
+};
+
+static struct clk ck_dpll1 = {
+        .name           = "ck_dpll1",
+        .ops            = &clkops_null,
+        .parent         = &ck_ref,
+};
+
+/*
+ * FIXME: This clock seems to be necessary but no-one has asked for its
+ * activation.  [ FIX: SoSSI, SSR ]
+ */
+static struct arm_idlect1_clk ck_dpll1out = {
+        .clk = {
+                .name           = "ck_dpll1out",
+                .ops            = &clkops_generic,
+                .parent         = &ck_dpll1,
+                .flags          = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT |
+                                  ENABLE_ON_INIT,
+                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+                .enable_bit     = EN_CKOUT_ARM,
+                .recalc         = &followparent_recalc,
+        },
+        .idlect_shift   = 12,
+};
+
+static struct clk sossi_ck = {
+        .name           = "ck_sossi",
+        .ops            = &clkops_generic,
+        .parent         = &ck_dpll1out.clk,
+        .flags          = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT,
+        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1),
+        .enable_bit     = 16,
+        .recalc         = &omap1_sossi_recalc,
+        .set_rate       = &omap1_set_sossi_rate,
+};
+
+static struct clk arm_ck = {
+        .name           = "arm_ck",
+        .ops            = &clkops_null,
+        .parent         = &ck_dpll1,
+        .rate_offset    = CKCTL_ARMDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc,
+        .round_rate     = omap1_clk_round_rate_ckctl_arm,
+        .set_rate       = omap1_clk_set_rate_ckctl_arm,
+};
+
+static struct arm_idlect1_clk armper_ck = {
+        .clk = {
+                .name           = "armper_ck",
+                .ops            = &clkops_generic,
+                .parent         = &ck_dpll1,
+                .flags          = CLOCK_IDLE_CONTROL,
+                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+                .enable_bit     = EN_PERCK,
+                .rate_offset    = CKCTL_PERDIV_OFFSET,
+                .recalc         = &omap1_ckctl_recalc,
+                .round_rate     = omap1_clk_round_rate_ckctl_arm,
+                .set_rate       = omap1_clk_set_rate_ckctl_arm,
+        },
+        .idlect_shift   = 2,
+};
+
+/*
+ * FIXME: This clock seems to be necessary but no-one has asked for its
+ * activation.  [ GPIO code for 1510 ]
+ */
+static struct clk arm_gpio_ck = {
+        .name           = "arm_gpio_ck",
+        .ops            = &clkops_generic,
+        .parent         = &ck_dpll1,
+        .flags          = ENABLE_ON_INIT,
+        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+        .enable_bit     = EN_GPIOCK,
+        .recalc         = &followparent_recalc,
+};
+
+static struct arm_idlect1_clk armxor_ck = {
+        .clk = {
+                .name           = "armxor_ck",
+                .ops            = &clkops_generic,
+                .parent         = &ck_ref,
+                .flags          = CLOCK_IDLE_CONTROL,
+                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+                .enable_bit     = EN_XORPCK,
+                .recalc         = &followparent_recalc,
+        },
+        .idlect_shift   = 1,
+};
+
+static struct arm_idlect1_clk armtim_ck = {
+        .clk = {
+                .name           = "armtim_ck",
+                .ops            = &clkops_generic,
+                .parent         = &ck_ref,
+                .flags          = CLOCK_IDLE_CONTROL,
+                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+                .enable_bit     = EN_TIMCK,
+                .recalc         = &followparent_recalc,
+        },
+        .idlect_shift   = 9,
+};
+
+static struct arm_idlect1_clk armwdt_ck = {
+        .clk = {
+                .name           = "armwdt_ck",
+                .ops            = &clkops_generic,
+                .parent         = &ck_ref,
+                .flags          = CLOCK_IDLE_CONTROL,
+                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+                .enable_bit     = EN_WDTCK,
+                .fixed_div      = 14,
+                .recalc         = &omap_fixed_divisor_recalc,
+        },
+        .idlect_shift   = 0,
+};
+
+static struct clk arminth_ck16xx = {
+        .name           = "arminth_ck",
+        .ops            = &clkops_null,
+        .parent         = &arm_ck,
+        .recalc         = &followparent_recalc,
+        /* Note: On 16xx the frequency can be divided by 2 by programming
+         * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
+         *
+         * 1510 version is in TC clocks.
+         */
+};
+
+static struct clk dsp_ck = {
+        .name           = "dsp_ck",
+        .ops            = &clkops_generic,
+        .parent         = &ck_dpll1,
+        .enable_reg     = OMAP1_IO_ADDRESS(ARM_CKCTL),
+        .enable_bit     = EN_DSPCK,
+        .rate_offset    = CKCTL_DSPDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc,
+        .round_rate     = omap1_clk_round_rate_ckctl_arm,
+        .set_rate       = omap1_clk_set_rate_ckctl_arm,
+};
+
+static struct clk dspmmu_ck = {
+        .name           = "dspmmu_ck",
+        .ops            = &clkops_null,
+        .parent         = &ck_dpll1,
+        .rate_offset    = CKCTL_DSPMMUDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc,
+        .round_rate     = omap1_clk_round_rate_ckctl_arm,
+        .set_rate       = omap1_clk_set_rate_ckctl_arm,
+};
+
+static struct clk dspper_ck = {
+        .name           = "dspper_ck",
+        .ops            = &clkops_dspck,
+        .parent         = &ck_dpll1,
+        .enable_reg     = DSP_IDLECT2,
+        .enable_bit     = EN_PERCK,
+        .rate_offset    = CKCTL_PERDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc_dsp_domain,
+        .round_rate     = omap1_clk_round_rate_ckctl_arm,
+        .set_rate       = &omap1_clk_set_rate_dsp_domain,
+};
+
+static struct clk dspxor_ck = {
+        .name           = "dspxor_ck",
+        .ops            = &clkops_dspck,
+        .parent         = &ck_ref,
+        .enable_reg     = DSP_IDLECT2,
+        .enable_bit     = EN_XORPCK,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk dsptim_ck = {
+        .name           = "dsptim_ck",
+        .ops            = &clkops_dspck,
+        .parent         = &ck_ref,
+        .enable_reg     = DSP_IDLECT2,
+        .enable_bit     = EN_DSPTIMCK,
+        .recalc         = &followparent_recalc,
+};
+
+/* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */
+static struct arm_idlect1_clk tc_ck = {
+        .clk = {
+                .name           = "tc_ck",
+                .ops            = &clkops_null,
+                .parent         = &ck_dpll1,
+                .flags          = CLOCK_IDLE_CONTROL,
+                .rate_offset    = CKCTL_TCDIV_OFFSET,
+                .recalc         = &omap1_ckctl_recalc,
+                .round_rate     = omap1_clk_round_rate_ckctl_arm,
+                .set_rate       = omap1_clk_set_rate_ckctl_arm,
+        },
+        .idlect_shift   = 6,
+};
+
+static struct clk arminth_ck1510 = {
+        .name           = "arminth_ck",
+        .ops            = &clkops_null,
+        .parent         = &tc_ck.clk,
+        .recalc         = &followparent_recalc,
+        /* Note: On 1510 the frequency follows TC_CK
+         *
+         * 16xx version is in MPU clocks.
+         */
+};
+
+static struct clk tipb_ck = {
+        /* No-idle controlled by "tc_ck" */
+        .name           = "tipb_ck",
+        .ops            = &clkops_null,
+        .parent         = &tc_ck.clk,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk l3_ocpi_ck = {
+        /* No-idle controlled by "tc_ck" */
+        .name           = "l3_ocpi_ck",
+        .ops            = &clkops_generic,
+        .parent         = &tc_ck.clk,
+        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
+        .enable_bit     = EN_OCPI_CK,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk tc1_ck = {
+        .name           = "tc1_ck",
+        .ops            = &clkops_generic,
+        .parent         = &tc_ck.clk,
+        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
+        .enable_bit     = EN_TC1_CK,
+        .recalc         = &followparent_recalc,
+};
+
+/*
+ * FIXME: This clock seems to be necessary but no-one has asked for its
+ * activation.  [ pm.c (SRAM), CCP, Camera ]
+ */
+static struct clk tc2_ck = {
+        .name           = "tc2_ck",
+        .ops            = &clkops_generic,
+        .parent         = &tc_ck.clk,
+        .flags          = ENABLE_ON_INIT,
+        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
+        .enable_bit     = EN_TC2_CK,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk dma_ck = {
+        /* No-idle controlled by "tc_ck" */
+        .name           = "dma_ck",
+        .ops            = &clkops_null,
+        .parent         = &tc_ck.clk,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk dma_lcdfree_ck = {
+        .name           = "dma_lcdfree_ck",
+        .ops            = &clkops_null,
+        .parent         = &tc_ck.clk,
+        .recalc         = &followparent_recalc,
+};
+
+static struct arm_idlect1_clk api_ck = {
+        .clk = {
+                .name           = "api_ck",
+                .ops            = &clkops_generic,
+                .parent         = &tc_ck.clk,
+                .flags          = CLOCK_IDLE_CONTROL,
+                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+                .enable_bit     = EN_APICK,
+                .recalc         = &followparent_recalc,
+        },
+        .idlect_shift   = 8,
+};
+
+static struct arm_idlect1_clk lb_ck = {
+        .clk = {
+                .name           = "lb_ck",
+                .ops            = &clkops_generic,
+                .parent         = &tc_ck.clk,
+                .flags          = CLOCK_IDLE_CONTROL,
+                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+                .enable_bit     = EN_LBCK,
+                .recalc         = &followparent_recalc,
+        },
+        .idlect_shift   = 4,
+};
+
+static struct clk rhea1_ck = {
+        .name           = "rhea1_ck",
+        .ops            = &clkops_null,
+        .parent         = &tc_ck.clk,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk rhea2_ck = {
+        .name           = "rhea2_ck",
+        .ops            = &clkops_null,
+        .parent         = &tc_ck.clk,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk lcd_ck_16xx = {
+        .name           = "lcd_ck",
+        .ops            = &clkops_generic,
+        .parent         = &ck_dpll1,
+        .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+        .enable_bit     = EN_LCDCK,
+        .rate_offset    = CKCTL_LCDDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc,
+        .round_rate     = omap1_clk_round_rate_ckctl_arm,
+        .set_rate       = omap1_clk_set_rate_ckctl_arm,
+};
+
+static struct arm_idlect1_clk lcd_ck_1510 = {
+        .clk = {
+                .name           = "lcd_ck",
+                .ops            = &clkops_generic,
+                .parent         = &ck_dpll1,
+                .flags          = CLOCK_IDLE_CONTROL,
+                .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
+                .enable_bit     = EN_LCDCK,
+                .rate_offset    = CKCTL_LCDDIV_OFFSET,
+                .recalc         = &omap1_ckctl_recalc,
+                .round_rate     = omap1_clk_round_rate_ckctl_arm,
+                .set_rate       = omap1_clk_set_rate_ckctl_arm,
+        },
+        .idlect_shift   = 3,
+};
+
+static struct clk uart1_1510 = {
+        .name           = "uart1_ck",
+        .ops            = &clkops_null,
+        /* Direct from ULPD, no real parent */
+        .parent         = &armper_ck.clk,
+        .rate           = 12000000,
+        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
+        .enable_bit     = 29,   /* Chooses between 12MHz and 48MHz */
+        .set_rate       = &omap1_set_uart_rate,
+        .recalc         = &omap1_uart_recalc,
+};
+
+static struct uart_clk uart1_16xx = {
+        .clk    = {
+                .name           = "uart1_ck",
+                .ops            = &clkops_uart,
+                /* Direct from ULPD, no real parent */
+                .parent         = &armper_ck.clk,
+                .rate           = 48000000,
+                .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+                .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
+                .enable_bit     = 29,
+        },
+        .sysc_addr      = 0xfffb0054,
+};
+
+static struct clk uart2_ck = {
+        .name           = "uart2_ck",
+        .ops            = &clkops_null,
+        /* Direct from ULPD, no real parent */
+        .parent         = &armper_ck.clk,
+        .rate           = 12000000,
+        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
+        .enable_bit     = 30,   /* Chooses between 12MHz and 48MHz */
+        .set_rate       = &omap1_set_uart_rate,
+        .recalc         = &omap1_uart_recalc,
+};
+
+static struct clk uart3_1510 = {
+        .name           = "uart3_ck",
+        .ops            = &clkops_null,
+        /* Direct from ULPD, no real parent */
+        .parent         = &armper_ck.clk,
+        .rate           = 12000000,
+        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
+        .enable_bit     = 31,   /* Chooses between 12MHz and 48MHz */
+        .set_rate       = &omap1_set_uart_rate,
+        .recalc         = &omap1_uart_recalc,
+};
+
+static struct uart_clk uart3_16xx = {
+        .clk    = {
+                .name           = "uart3_ck",
+                .ops            = &clkops_uart,
+                /* Direct from ULPD, no real parent */
+                .parent         = &armper_ck.clk,
+                .rate           = 48000000,
+                .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+                .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
+                .enable_bit     = 31,
+        },
+        .sysc_addr      = 0xfffb9854,
+};
+
+static struct clk usb_clko = {  /* 6 MHz output on W4_USB_CLKO */
+        .name           = "usb_clko",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent */
+        .rate           = 6000000,
+        .flags          = ENABLE_REG_32BIT,
+        .enable_reg     = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
+        .enable_bit     = USB_MCLK_EN_BIT,
+};
+
+static struct clk usb_hhc_ck1510 = {
+        .name           = "usb_hhc_ck",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent */
+        .rate           = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
+        .flags          = ENABLE_REG_32BIT,
+        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
+        .enable_bit     = USB_HOST_HHC_UHOST_EN,
+};
+
+static struct clk usb_hhc_ck16xx = {
+        .name           = "usb_hhc_ck",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent */
+        .rate           = 48000000,
+        /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
+        .flags          = ENABLE_REG_32BIT,
+        .enable_reg     = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
+        .enable_bit     = 8 /* UHOST_EN */,
+};
+
+static struct clk usb_dc_ck = {
+        .name           = "usb_dc_ck",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent */
+        .rate           = 48000000,
+        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+        .enable_bit     = 4,
+};
+
+static struct clk usb_dc_ck7xx = {
+        .name           = "usb_dc_ck",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent */
+        .rate           = 48000000,
+        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+        .enable_bit     = 8,
+};
+
+static struct clk mclk_1510 = {
+        .name           = "mclk",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+        .rate           = 12000000,
+        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+        .enable_bit     = 6,
+};
+
+static struct clk mclk_16xx = {
+        .name           = "mclk",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+        .enable_reg     = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL),
+        .enable_bit     = COM_ULPD_PLL_CLK_REQ,
+        .set_rate       = &omap1_set_ext_clk_rate,
+        .round_rate     = &omap1_round_ext_clk_rate,
+        .init           = &omap1_init_ext_clk,
+};
+
+static struct clk bclk_1510 = {
+        .name           = "bclk",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+        .rate           = 12000000,
+};
+
+static struct clk bclk_16xx = {
+        .name           = "bclk",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+        .enable_reg     = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL),
+        .enable_bit     = SWD_ULPD_PLL_CLK_REQ,
+        .set_rate       = &omap1_set_ext_clk_rate,
+        .round_rate     = &omap1_round_ext_clk_rate,
+        .init           = &omap1_init_ext_clk,
+};
+
+static struct clk mmc1_ck = {
+        .name           = "mmc1_ck",
+        .ops            = &clkops_generic,
+        /* Functional clock is direct from ULPD, interface clock is ARMPER */
+        .parent         = &armper_ck.clk,
+        .rate           = 48000000,
+        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
+        .enable_bit     = 23,
+};
+
+static struct clk mmc2_ck = {
+        .name           = "mmc2_ck",
+        .ops            = &clkops_generic,
+        /* Functional clock is direct from ULPD, interface clock is ARMPER */
+        .parent         = &armper_ck.clk,
+        .rate           = 48000000,
+        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
+        .enable_bit     = 20,
+};
+
+static struct clk mmc3_ck = {
+        .name           = "mmc3_ck",
+        .ops            = &clkops_generic,
+        /* Functional clock is direct from ULPD, interface clock is ARMPER */
+        .parent         = &armper_ck.clk,
+        .rate           = 48000000,
+        .flags          = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+        .enable_bit     = 12,
+};
+
+static struct clk virtual_ck_mpu = {
+        .name           = "mpu",
+        .ops            = &clkops_null,
+        .parent         = &arm_ck, /* Is smarter alias for */
+        .recalc         = &followparent_recalc,
+        .set_rate       = &omap1_select_table_rate,
+        .round_rate     = &omap1_round_to_table_rate,
+};
+
+/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK
+remains active during MPU idle whenever this is enabled */
+static struct clk i2c_fck = {
+        .name           = "i2c_fck",
+        .ops            = &clkops_null,
+        .flags          = CLOCK_NO_IDLE_PARENT,
+        .parent         = &armxor_ck.clk,
+        .recalc         = &followparent_recalc,
+};
+
+static struct clk i2c_ick = {
+        .name           = "i2c_ick",
+        .ops            = &clkops_null,
+        .flags          = CLOCK_NO_IDLE_PARENT,
+        .parent         = &armper_ck.clk,
+        .recalc         = &followparent_recalc,
+};
+
+/*
+ * clkdev integration
+ */
+
+static struct omap_clk omap_clks[] = {
+        /* non-ULPD clocks */
+        CLK(NULL,       "ck_ref",       &ck_ref,        CK_16XX | CK_1510 | CK_310 | CK_7XX),
+        CLK(NULL,       "ck_dpll1",     &ck_dpll1,      CK_16XX | CK_1510 | CK_310 | CK_7XX),
+        /* CK_GEN1 clocks */
+        CLK(NULL,       "ck_dpll1out",  &ck_dpll1out.clk, CK_16XX),
+        CLK(NULL,       "ck_sossi",     &sossi_ck,      CK_16XX),
+        CLK(NULL,       "arm_ck",       &arm_ck,        CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "armper_ck",    &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "arm_gpio_ck",  &arm_gpio_ck,   CK_1510 | CK_310),
+        CLK(NULL,       "armxor_ck",    &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
+        CLK(NULL,       "armtim_ck",    &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
+        CLK("omap_wdt", "fck",          &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
+        CLK("omap_wdt", "ick",          &armper_ck.clk, CK_16XX),
+        CLK("omap_wdt", "ick",          &dummy_ck,      CK_1510 | CK_310),
+        CLK(NULL,       "arminth_ck",   &arminth_ck1510, CK_1510 | CK_310),
+        CLK(NULL,       "arminth_ck",   &arminth_ck16xx, CK_16XX),
+        /* CK_GEN2 clocks */
+        CLK(NULL,       "dsp_ck",       &dsp_ck,        CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "dspmmu_ck",    &dspmmu_ck,     CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "dspper_ck",    &dspper_ck,     CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "dspxor_ck",    &dspxor_ck,     CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "dsptim_ck",    &dsptim_ck,     CK_16XX | CK_1510 | CK_310),
+        /* CK_GEN3 clocks */
+        CLK(NULL,       "tc_ck",        &tc_ck.clk,     CK_16XX | CK_1510 | CK_310 | CK_7XX),
+        CLK(NULL,       "tipb_ck",      &tipb_ck,       CK_1510 | CK_310),
+        CLK(NULL,       "l3_ocpi_ck",   &l3_ocpi_ck,    CK_16XX | CK_7XX),
+        CLK(NULL,       "tc1_ck",       &tc1_ck,        CK_16XX),
+        CLK(NULL,       "tc2_ck",       &tc2_ck,        CK_16XX),
+        CLK(NULL,       "dma_ck",       &dma_ck,        CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
+        CLK(NULL,       "api_ck",       &api_ck.clk,    CK_16XX | CK_1510 | CK_310 | CK_7XX),
+        CLK(NULL,       "lb_ck",        &lb_ck.clk,     CK_1510 | CK_310),
+        CLK(NULL,       "rhea1_ck",     &rhea1_ck,      CK_16XX),
+        CLK(NULL,       "rhea2_ck",     &rhea2_ck,      CK_16XX),
+        CLK(NULL,       "lcd_ck",       &lcd_ck_16xx,   CK_16XX | CK_7XX),
+        CLK(NULL,       "lcd_ck",       &lcd_ck_1510.clk, CK_1510 | CK_310),
+        /* ULPD clocks */
+        CLK(NULL,       "uart1_ck",     &uart1_1510,    CK_1510 | CK_310),
+        CLK(NULL,       "uart1_ck",     &uart1_16xx.clk, CK_16XX),
+        CLK(NULL,       "uart2_ck",     &uart2_ck,      CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "uart3_ck",     &uart3_1510,    CK_1510 | CK_310),
+        CLK(NULL,       "uart3_ck",     &uart3_16xx.clk, CK_16XX),
+        CLK(NULL,       "usb_clko",     &usb_clko,      CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "usb_hhc_ck",   &usb_hhc_ck1510, CK_1510 | CK_310),
+        CLK(NULL,       "usb_hhc_ck",   &usb_hhc_ck16xx, CK_16XX),
+        CLK(NULL,       "usb_dc_ck",    &usb_dc_ck,     CK_16XX),
+        CLK(NULL,       "usb_dc_ck",    &usb_dc_ck7xx,  CK_7XX),
+        CLK(NULL,       "mclk",         &mclk_1510,     CK_1510 | CK_310),
+        CLK(NULL,       "mclk",         &mclk_16xx,     CK_16XX),
+        CLK(NULL,       "bclk",         &bclk_1510,     CK_1510 | CK_310),
+        CLK(NULL,       "bclk",         &bclk_16xx,     CK_16XX),
+        CLK("mmci-omap.0", "fck",       &mmc1_ck,       CK_16XX | CK_1510 | CK_310),
+        CLK("mmci-omap.0", "fck",       &mmc3_ck,       CK_7XX),
+        CLK("mmci-omap.0", "ick",       &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
+        CLK("mmci-omap.1", "fck",       &mmc2_ck,       CK_16XX),
+        CLK("mmci-omap.1", "ick",       &armper_ck.clk, CK_16XX),
+        /* Virtual clocks */
+        CLK(NULL,       "mpu",          &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
+        CLK("i2c_omap.1", "fck",        &i2c_fck,       CK_16XX | CK_1510 | CK_310 | CK_7XX),
+        CLK("i2c_omap.1", "ick",        &i2c_ick,       CK_16XX),
+        CLK("i2c_omap.1", "ick",        &dummy_ck,      CK_1510 | CK_310 | CK_7XX),
+        CLK("omap1_spi100k.1", "fck",   &dummy_ck,      CK_7XX),
+        CLK("omap1_spi100k.1", "ick",   &dummy_ck,      CK_7XX),
+        CLK("omap1_spi100k.2", "fck",   &dummy_ck,      CK_7XX),
+        CLK("omap1_spi100k.2", "ick",   &dummy_ck,      CK_7XX),
+        CLK("omap_uwire", "fck",        &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
+        CLK("omap-mcbsp.1", "ick",      &dspper_ck,     CK_16XX),
+        CLK("omap-mcbsp.1", "ick",      &dummy_ck,      CK_1510 | CK_310),
+        CLK("omap-mcbsp.2", "ick",      &armper_ck.clk, CK_16XX),
+        CLK("omap-mcbsp.2", "ick",      &dummy_ck,      CK_1510 | CK_310),
+        CLK("omap-mcbsp.3", "ick",      &dspper_ck,     CK_16XX),
+        CLK("omap-mcbsp.3", "ick",      &dummy_ck,      CK_1510 | CK_310),
+        CLK("omap-mcbsp.1", "fck",      &dspxor_ck,     CK_16XX | CK_1510 | CK_310),
+        CLK("omap-mcbsp.2", "fck",      &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
+        CLK("omap-mcbsp.3", "fck",      &dspxor_ck,     CK_16XX | CK_1510 | CK_310),
+};
+
+/*
+ * init
+ */
+
+static struct clk_functions omap1_clk_functions = {
+        .clk_enable             = omap1_clk_enable,
+        .clk_disable            = omap1_clk_disable,
+        .clk_round_rate         = omap1_clk_round_rate,
+        .clk_set_rate           = omap1_clk_set_rate,
+        .clk_disable_unused     = omap1_clk_disable_unused,
+};
+
+int __init omap1_clk_init(void)
+{
+        struct omap_clk *c;
+        const struct omap_clock_config *info;
+        int crystal_type = 0; /* Default 12 MHz */
+        u32 reg, cpu_mask;
+
+#ifdef CONFIG_DEBUG_LL
+        /*
+         * Resets some clocks that may be left on from bootloader,
+         * but leaves serial clocks on.
+         */
+        omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
+#endif
+
+        /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
+        reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
+        omap_writew(reg, SOFT_REQ_REG);
+        if (!cpu_is_omap15xx())
+                omap_writew(0, SOFT_REQ_REG2);
+
+        clk_init(&omap1_clk_functions);
+
+        /* By default all idlect1 clocks are allowed to idle */
+        arm_idlect1_mask = ~0;
+
+        for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
+                clk_preinit(c->lk.clk);
+
+        cpu_mask = 0;
+        if (cpu_is_omap16xx())
+                cpu_mask |= CK_16XX;
+        if (cpu_is_omap1510())
+                cpu_mask |= CK_1510;
+        if (cpu_is_omap7xx())
+                cpu_mask |= CK_7XX;
+        if (cpu_is_omap310())
+                cpu_mask |= CK_310;
+
+        for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
+                if (c->cpu & cpu_mask) {
+                        clkdev_add(&c->lk);
+                        clk_register(c->lk.clk);
+                }
+
+        /* Pointers to these clocks are needed by code in clock.c */
+        api_ck_p = clk_get(NULL, "api_ck");
+        ck_dpll1_p = clk_get(NULL, "ck_dpll1");
+        ck_ref_p = clk_get(NULL, "ck_ref");
+
+        info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
+        if (info != NULL) {
+                if (!cpu_is_omap15xx())
+                        crystal_type = info->system_clock_type;
+        }
+
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        ck_ref.rate = 13000000;
+#elif defined(CONFIG_ARCH_OMAP16XX)
+        if (crystal_type == 2)
+                ck_ref.rate = 19200000;
+#endif
+
+        pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: "
+                "0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
+                omap_readw(ARM_CKCTL));
+
+        /* We want to be in syncronous scalable mode */
+        omap_writew(0x1000, ARM_SYSST);
+
+#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
+        /* Use values set by bootloader. Determine PLL rate and recalculate
+         * dependent clocks as if kernel had changed PLL or divisors.
+         */
+        {
+                unsigned pll_ctl_val = omap_readw(DPLL_CTL);
+
+                ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */
+                if (pll_ctl_val & 0x10) {
+                        /* PLL enabled, apply multiplier and divisor */
+                        if (pll_ctl_val & 0xf80)
+                                ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7;
+                        ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
+                } else {
+                        /* PLL disabled, apply bypass divisor */
+                        switch (pll_ctl_val & 0xc) {
+                        case 0:
+                                break;
+                        case 0x4:
+                                ck_dpll1.rate /= 2;
+                                break;
+                        default:
+                                ck_dpll1.rate /= 4;
+                                break;
+                        }
+                }
+        }
+#else
+        /* Find the highest supported frequency and enable it */
+        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
+                printk(KERN_ERR "System frequencies not set. Check your config.\n");
+                /* Guess sane values (60MHz) */
+                omap_writew(0x2290, DPLL_CTL);
+                omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
+                ck_dpll1.rate = 60000000;
+        }
+#endif
+        propagate_rate(&ck_dpll1);
+        /* Cache rates for clocks connected to ck_ref (not dpll1) */
+        propagate_rate(&ck_ref);
+        printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
+                "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
+               ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
+               ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
+               arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
+
+#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
+        /* Select slicer output as OMAP input clock */
+        omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, OMAP7XX_PCC_UPLD_CTRL);
+#endif
+
+        /* Amstrad Delta wants BCLK high when inactive */
+        if (machine_is_ams_delta())
+                omap_writel(omap_readl(ULPD_CLOCK_CTRL) |
+                                (1 << SDW_MCLK_INV_BIT),
+                                ULPD_CLOCK_CTRL);
+
+        /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
+        /* (on 730, bit 13 must not be cleared) */
+        if (cpu_is_omap7xx())
+                omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL);
+        else
+                omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
+
+        /* Put DSP/MPUI into reset until needed */
+        omap_writew(0, ARM_RSTCT1);
+        omap_writew(1, ARM_RSTCT2);
+        omap_writew(0x400, ARM_IDLECT1);
+
+        /*
+         * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8)
+         * of the ARM_IDLECT2 register must be set to zero. The power-on
+         * default value of this bit is one.
+         */
+        omap_writew(0x0000, ARM_IDLECT2);       /* Turn LCD clock off also */
+
+        /*
+         * Only enable those clocks we will need, let the drivers
+         * enable other clocks as necessary
+         */
+        clk_enable(&armper_ck.clk);
+        clk_enable(&armxor_ck.clk);
+        clk_enable(&armtim_ck.clk); /* This should be done by timer code */
+
+        if (cpu_is_omap15xx())
+                clk_enable(&arm_gpio_ck);
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 06808434ea04..379100c17639 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -14,15 +14,17 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/spi/spi.h>
 
 #include <mach/hardware.h>
 #include <asm/mach/map.h>
 
-#include <mach/tc.h>
-#include <mach/board.h>
-#include <mach/mux.h>
+#include <plat/tc.h>
+#include <plat/board.h>
+#include <plat/mux.h>
 #include <mach/gpio.h>
-#include <mach/mmc.h>
+#include <plat/mmc.h>
+#include <plat/omap7xx.h>
 
 /*-------------------------------------------------------------------------*/
 
@@ -71,7 +73,7 @@ static inline void omap_init_rtc(void) {}
 #  define INT_DSP_MAILBOX1      INT_1610_DSP_MAILBOX1
 #endif
 
-#define OMAP1_MBOX_BASE         OMAP1_IO_ADDRESS(OMAP16XX_MAILBOX_BASE)
+#define OMAP1_MBOX_BASE         OMAP16XX_MAILBOX_BASE
 
 static struct resource mbox_resources[] = {
         {
@@ -108,15 +110,22 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
                         int controller_nr)
 {
         if (controller_nr == 0) {
-                omap_cfg_reg(MMC_CMD);
-                omap_cfg_reg(MMC_CLK);
-                omap_cfg_reg(MMC_DAT0);
+                if (cpu_is_omap7xx()) {
+                        omap_cfg_reg(MMC_7XX_CMD);
+                        omap_cfg_reg(MMC_7XX_CLK);
+                        omap_cfg_reg(MMC_7XX_DAT0);
+                } else {
+                        omap_cfg_reg(MMC_CMD);
+                        omap_cfg_reg(MMC_CLK);
+                        omap_cfg_reg(MMC_DAT0);
+                }
+
                 if (cpu_is_omap1710()) {
                         omap_cfg_reg(M15_1710_MMC_CLKI);
                         omap_cfg_reg(P19_1710_MMC_CMDDIR);
                         omap_cfg_reg(P20_1710_MMC_DATDIR0);
                 }
-                if (mmc_controller->slots[0].wires == 4) {
+                if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
                         omap_cfg_reg(MMC_DAT1);
                         /* NOTE: DAT2 can be on W10 (here) or M15 */
                         if (!mmc_controller->slots[0].nomux)
@@ -189,6 +198,38 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 
 /*-------------------------------------------------------------------------*/
 
+/* OMAP7xx SPI support */
+#if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE)
+
+struct platform_device omap_spi1 = {
+        .name           = "omap1_spi100k",
+        .id             = 1,
+};
+
+struct platform_device omap_spi2 = {
+        .name           = "omap1_spi100k",
+        .id             = 2,
+};
+
+static void omap_init_spi100k(void)
+{
+        omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
+        if (omap_spi1.dev.platform_data)
+                platform_device_register(&omap_spi1);
+
+        omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
+        if (omap_spi2.dev.platform_data)
+                platform_device_register(&omap_spi2);
+}
+
+#else
+static inline void omap_init_spi100k(void)
+{
+}
+#endif
+
+/*-------------------------------------------------------------------------*/
+
 #if defined(CONFIG_OMAP_STI)
 
 #define OMAP1_STI_BASE          0xfffea000
@@ -256,6 +297,7 @@ static int __init omap1_init_devices(void)
 
         omap_init_mbox();
         omap_init_rtc();
+        omap_init_spi100k();
         omap_init_sti();
 
         return 0;
diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c
new file mode 100644
index 000000000000..0b07a78eeaa7
--- /dev/null
+++ b/arch/arm/mach-omap1/flash.c
@@ -0,0 +1,33 @@
+/*
+ * Flash support for OMAP1
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+
+#include <plat/io.h>
+#include <plat/tc.h>
+
+void omap1_set_vpp(struct map_info *map, int enable)
+{
+        static int count;
+        u32 l;
+
+        if (enable) {
+                if (count++ == 0) {
+                        l = omap_readl(EMIFS_CONFIG);
+                        l |= OMAP_EMIFS_CONFIG_WP;
+                        omap_writel(l, EMIFS_CONFIG);
+                }
+        } else {
+                if (count && (--count == 0)) {
+                        l = omap_readl(EMIFS_CONFIG);
+                        l &= ~OMAP_EMIFS_CONFIG_WP;
+                        omap_writel(l, EMIFS_CONFIG);
+                }
+        }
+}
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 4f2b8a7adb19..5cfce1636da0 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -27,7 +27,7 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 
-#include <mach/fpga.h>
+#include <plat/fpga.h>
 #include <mach/gpio.h>
 
 static void fpga_mask_irq(unsigned int irq)
diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
new file mode 100644
index 000000000000..5446c9912641
--- /dev/null
+++ b/arch/arm/mach-omap1/i2c.c
@@ -0,0 +1,35 @@
+/*
+ * Helper module for board specific I2C bus registration
+ *
+ * Copyright (C) 2009 Nokia Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <plat/i2c.h>
+#include <plat/mux.h>
+#include <plat/cpu.h>
+
+void __init omap1_i2c_mux_pins(int bus_id)
+{
+        if (cpu_is_omap7xx()) {
+                omap_cfg_reg(I2C_7XX_SDA);
+                omap_cfg_reg(I2C_7XX_SCL);
+        } else {
+                omap_cfg_reg(I2C_SDA);
+                omap_cfg_reg(I2C_SCL);
+        }
+}
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index e5dcdf764c91..a0e3560b39db 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -15,7 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <mach/cpu.h>
+#include <plat/cpu.h>
 
 #define OMAP_DIE_ID_0           0xfffe1800
 #define OMAP_DIE_ID_1           0xfffe1804
diff --git a/arch/arm/mach-omap1/include/mach/clkdev.h b/arch/arm/mach-omap1/include/mach/clkdev.h
new file mode 100644
index 000000000000..ea8640e4603e
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/clkdev.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/clkdev.h
+ */
+
+#include <plat/clkdev.h>
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S
new file mode 100644
index 000000000000..b6d9584544b4
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -0,0 +1,107 @@
+/* arch/arm/mach-omap1/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#include <linux/serial_reg.h>
+
+#include <plat/serial.h>
+
+                .pushsection .data
+omap_uart_phys: .word   0x0
+omap_uart_virt: .word   0x0
+                .popsection
+
+                /*
+                 * Note that this code won't work if the bootloader passes
+                 * a wrong machine ID number in r1. To debug, just hardcode
+                 * the desired UART phys and virt addresses temporarily into
+                 * the omap_uart_phys and omap_uart_virt above.
+                 */
+                .macro  addruart, rx, tmp
+
+                /* Use omap_uart_phys/virt if already configured */
+9:              mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                 @ MMU enabled?
+                ldreq   \rx, =omap_uart_phys    @ physical base address
+                ldrne   \rx, =omap_uart_virt    @ virtual base
+                ldr     \rx, [\rx, #0]
+                cmp     \rx, #0                 @ is port configured?
+                bne     99f                     @ already configured
+
+                /* Check 7XX UART1 scratchpad register for uart to use */
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                 @ MMU enabled?
+                moveq   \rx, #0xff000000        @ physical base address
+                movne   \rx, #0xfe000000        @ virtual base
+                orr     \rx, \rx, #0x00fb0000   @ OMAP1UART1
+                ldrb    \rx, [\rx, #(UART_SCR << OMAP7XX_PORT_SHIFT)]
+                cmp     \rx, #0                 @ anything in 7XX scratchpad?
+                bne     10f                     @ found 7XX uart
+
+                /* Check 15xx/16xx UART1 scratchpad register for uart to use */
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                 @ MMU enabled?
+                moveq   \rx, #0xff000000        @ physical base address
+                movne   \rx, #0xfe000000        @ virtual base
+                orr     \rx, \rx, #0x00fb0000   @ OMAP1UART1
+                ldrb    \rx, [\rx, #(UART_SCR << OMAP_PORT_SHIFT)]
+
+                /* Select the UART to use based on the UART1 scratchpad value */
+10:             cmp     \rx, #0                 @ no port configured?
+                beq     11f                     @ if none, try to use UART1
+                cmp     \rx, #OMAP1UART1
+                beq     11f                     @ configure OMAP1UART1
+                cmp     \rx, #OMAP1UART2
+                beq     12f                     @ configure OMAP1UART2
+                cmp     \rx, #OMAP1UART3
+                beq     13f                     @ configure OMAP2UART3
+
+                /* Configure the UART offset from the phys/virt base */
+11:             mov     \rx, #0x00fb0000        @ OMAP1UART1
+                b       98f
+12:             mov     \rx, #0x00fb0000        @ OMAP1UART1
+                orr     \rx, \rx, #0x00000800   @ OMAP1UART2
+                b       98f
+13:             mov     \rx, #0x00fb0000        @ OMAP1UART1
+                orr     \rx, \rx, #0x00000800   @ OMAP1UART2
+                orr     \rx, \rx, #0x00009000   @ OMAP1UART3
+
+                /* Store both phys and virt address for the uart */
+98:             add     \rx, \rx, #0xff000000   @ phys base
+                ldr     \tmp, =omap_uart_phys
+                str     \rx, [\tmp, #0]
+                sub     \rx, \rx, #0xff000000   @ phys base
+                add     \rx, \rx, #0xfe000000   @ virt base
+                ldr     \tmp, =omap_uart_virt
+                str     \rx, [\tmp, #0]
+                b       9b
+99:
+                .endm
+
+                .macro  senduart,rd,rx
+                strb    \rd, [\rx]
+                .endm
+
+                .macro  busyuart,rd,rx
+1001:           ldrb    \rd, [\rx, #(UART_LSR << OMAP_PORT_SHIFT)]
+                and     \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
+                teq     \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
+                beq     1002f
+                ldrb    \rd, [\rx, #(UART_LSR << OMAP7XX_PORT_SHIFT)]
+                and     \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
+                teq     \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
+                bne     1001b
+1002:
+                .endm
+
+                .macro  waituart,rd,rx
+                .endm
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
new file mode 100644
index 000000000000..df9060edda28
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -0,0 +1,58 @@
+/*
+ * arch/arm/mach-omap1/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros for OMAP-based platforms
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <mach/hardware.h>
+#include <mach/io.h>
+#include <mach/irqs.h>
+#include <asm/hardware/gic.h>
+
+#if (defined(CONFIG_ARCH_OMAP730)||defined(CONFIG_ARCH_OMAP850)) && \
+        (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
+#error "FIXME: OMAP7XX doesn't support multiple-OMAP"
+#elif defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+#define INT_IH2_IRQ             INT_7XX_IH2_IRQ
+#elif defined(CONFIG_ARCH_OMAP15XX)
+#define INT_IH2_IRQ             INT_1510_IH2_IRQ
+#elif defined(CONFIG_ARCH_OMAP16XX)
+#define INT_IH2_IRQ             INT_1610_IH2_IRQ
+#else
+#warning "IH2 IRQ defaulted"
+#define INT_IH2_IRQ             INT_1510_IH2_IRQ
+#endif
+
+                .macro  disable_fiq
+                .endm
+
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
+
+                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+                ldr     \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
+                ldr     \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
+                ldr     \tmp, [\base, #IRQ_MIR_REG_OFFSET]
+                mov     \irqstat, #0xffffffff
+                bic     \tmp, \irqstat, \tmp
+                tst     \irqnr, \tmp
+                beq     1510f
+
+                ldr     \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
+                cmp     \irqnr, #0
+                ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
+                cmpeq   \irqnr, #INT_IH2_IRQ
+                ldreq   \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
+                ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
+                addeqs  \irqnr, \irqnr, #32
+1510:
+                .endm
+
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
new file mode 100644
index 000000000000..e737706a8fe1
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/gpio.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/gpio.h
+ */
+
+#include <plat/gpio.h>
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
new file mode 100644
index 000000000000..a3f6287b2007
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/hardware.h
+ */
+
+#include <plat/hardware.h>
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h
new file mode 100644
index 000000000000..57bdf74a3e64
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/io.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/io.h
+ */
+
+#include <plat/io.h>
diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/include/mach/irqs.h
new file mode 100644
index 000000000000..9292fdc1cb0b
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/irqs.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/irqs.h
+ */
+
+#include <plat/irqs.h>
diff --git a/arch/arm/mach-omap1/include/mach/lcd_dma.h b/arch/arm/mach-omap1/include/mach/lcd_dma.h
new file mode 100644
index 000000000000..d7a457bbcb7f
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/lcd_dma.h
@@ -0,0 +1,78 @@
+/*
+ *  arch/arm/mach-omap1/include/mach/lcd_dma.h
+ *
+ * Extracted from arch/arm/plat-omap/include/plat/dma.h
+ *  Copyright (C) 2003 Nokia Corporation
+ *  Author: Juha Yrjölä <juha.yrjola@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __MACH_OMAP1_LCD_DMA_H__
+#define __MACH_OMAP1_LCD_DMA_H__
+
+/* Hardware registers for LCD DMA */
+#define OMAP1510_DMA_LCD_BASE           (0xfffedb00)
+#define OMAP1510_DMA_LCD_CTRL           (OMAP1510_DMA_LCD_BASE + 0x00)
+#define OMAP1510_DMA_LCD_TOP_F1_L       (OMAP1510_DMA_LCD_BASE + 0x02)
+#define OMAP1510_DMA_LCD_TOP_F1_U       (OMAP1510_DMA_LCD_BASE + 0x04)
+#define OMAP1510_DMA_LCD_BOT_F1_L       (OMAP1510_DMA_LCD_BASE + 0x06)
+#define OMAP1510_DMA_LCD_BOT_F1_U       (OMAP1510_DMA_LCD_BASE + 0x08)
+
+#define OMAP1610_DMA_LCD_BASE           (0xfffee300)
+#define OMAP1610_DMA_LCD_CSDP           (OMAP1610_DMA_LCD_BASE + 0xc0)
+#define OMAP1610_DMA_LCD_CCR            (OMAP1610_DMA_LCD_BASE + 0xc2)
+#define OMAP1610_DMA_LCD_CTRL           (OMAP1610_DMA_LCD_BASE + 0xc4)
+#define OMAP1610_DMA_LCD_TOP_B1_L       (OMAP1610_DMA_LCD_BASE + 0xc8)
+#define OMAP1610_DMA_LCD_TOP_B1_U       (OMAP1610_DMA_LCD_BASE + 0xca)
+#define OMAP1610_DMA_LCD_BOT_B1_L       (OMAP1610_DMA_LCD_BASE + 0xcc)
+#define OMAP1610_DMA_LCD_BOT_B1_U       (OMAP1610_DMA_LCD_BASE + 0xce)
+#define OMAP1610_DMA_LCD_TOP_B2_L       (OMAP1610_DMA_LCD_BASE + 0xd0)
+#define OMAP1610_DMA_LCD_TOP_B2_U       (OMAP1610_DMA_LCD_BASE + 0xd2)
+#define OMAP1610_DMA_LCD_BOT_B2_L       (OMAP1610_DMA_LCD_BASE + 0xd4)
+#define OMAP1610_DMA_LCD_BOT_B2_U       (OMAP1610_DMA_LCD_BASE + 0xd6)
+#define OMAP1610_DMA_LCD_SRC_EI_B1      (OMAP1610_DMA_LCD_BASE + 0xd8)
+#define OMAP1610_DMA_LCD_SRC_FI_B1_L    (OMAP1610_DMA_LCD_BASE + 0xda)
+#define OMAP1610_DMA_LCD_SRC_EN_B1      (OMAP1610_DMA_LCD_BASE + 0xe0)
+#define OMAP1610_DMA_LCD_SRC_FN_B1      (OMAP1610_DMA_LCD_BASE + 0xe4)
+#define OMAP1610_DMA_LCD_LCH_CTRL       (OMAP1610_DMA_LCD_BASE + 0xea)
+#define OMAP1610_DMA_LCD_SRC_FI_B1_U    (OMAP1610_DMA_LCD_BASE + 0xf4)
+
+/* LCD DMA block numbers */
+enum {
+        OMAP_LCD_DMA_B1_TOP,
+        OMAP_LCD_DMA_B1_BOTTOM,
+        OMAP_LCD_DMA_B2_TOP,
+        OMAP_LCD_DMA_B2_BOTTOM
+};
+
+/* LCD DMA functions */
+extern int omap_request_lcd_dma(void (*callback)(u16 status, void *data),
+                                void *data);
+extern void omap_free_lcd_dma(void);
+extern void omap_setup_lcd_dma(void);
+extern void omap_enable_lcd_dma(void);
+extern void omap_stop_lcd_dma(void);
+extern void omap_set_lcd_dma_ext_controller(int external);
+extern void omap_set_lcd_dma_single_transfer(int single);
+extern void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
+                                int data_type);
+extern void omap_set_lcd_dma_b1_rotation(int rotate);
+extern void omap_set_lcd_dma_b1_vxres(unsigned long vxres);
+extern void omap_set_lcd_dma_b1_mirror(int mirror);
+extern void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale);
+
+extern int omap_lcd_dma_running(void);
+
+#endif /* __MACH_OMAP1_LCD_DMA_H__ */
diff --git a/arch/arm/mach-omap1/include/mach/lcdc.h b/arch/arm/mach-omap1/include/mach/lcdc.h
new file mode 100644
index 000000000000..89bd703adaf6
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/lcdc.h
@@ -0,0 +1,57 @@
+/*
+ * arch/arm/mach-omap1/include/mach/lcdc.h
+ *
+ * Extracted from drivers/video/omap/lcdc.c
+ * Copyright (C) 2004 Nokia Corporation
+ * Author: Imre Deak <imre.deak@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ */
+#ifndef __MACH_LCDC_H__
+#define __MACH_LCDC_H__
+
+#define OMAP_LCDC_BASE                  0xfffec000
+#define OMAP_LCDC_SIZE                  256
+#define OMAP_LCDC_IRQ                   INT_LCD_CTRL
+
+#define OMAP_LCDC_CONTROL               (OMAP_LCDC_BASE + 0x00)
+#define OMAP_LCDC_TIMING0               (OMAP_LCDC_BASE + 0x04)
+#define OMAP_LCDC_TIMING1               (OMAP_LCDC_BASE + 0x08)
+#define OMAP_LCDC_TIMING2               (OMAP_LCDC_BASE + 0x0c)
+#define OMAP_LCDC_STATUS                (OMAP_LCDC_BASE + 0x10)
+#define OMAP_LCDC_SUBPANEL              (OMAP_LCDC_BASE + 0x14)
+#define OMAP_LCDC_LINE_INT              (OMAP_LCDC_BASE + 0x18)
+#define OMAP_LCDC_DISPLAY_STATUS        (OMAP_LCDC_BASE + 0x1c)
+
+#define OMAP_LCDC_STAT_DONE             (1 << 0)
+#define OMAP_LCDC_STAT_VSYNC            (1 << 1)
+#define OMAP_LCDC_STAT_SYNC_LOST        (1 << 2)
+#define OMAP_LCDC_STAT_ABC              (1 << 3)
+#define OMAP_LCDC_STAT_LINE_INT         (1 << 4)
+#define OMAP_LCDC_STAT_FUF              (1 << 5)
+#define OMAP_LCDC_STAT_LOADED_PALETTE   (1 << 6)
+
+#define OMAP_LCDC_CTRL_LCD_EN           (1 << 0)
+#define OMAP_LCDC_CTRL_LCD_TFT          (1 << 7)
+#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10)
+
+#define OMAP_LCDC_IRQ_VSYNC             (1 << 2)
+#define OMAP_LCDC_IRQ_DONE              (1 << 3)
+#define OMAP_LCDC_IRQ_LOADED_PALETTE    (1 << 4)
+#define OMAP_LCDC_IRQ_LINE_NIRQ         (1 << 5)
+#define OMAP_LCDC_IRQ_LINE              (1 << 6)
+#define OMAP_LCDC_IRQ_MASK              (((1 << 5) - 1) << 2)
+
+#endif /* __MACH_LCDC_H__ */
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h
new file mode 100644
index 000000000000..e9b600c113ef
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/memory.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/memory.h
+ */
+
+#include <plat/memory.h>
diff --git a/arch/arm/mach-omap1/include/mach/mtd-xip.h b/arch/arm/mach-omap1/include/mach/mtd-xip.h
new file mode 100644
index 000000000000..f82a8dcaad94
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/mtd-xip.h
@@ -0,0 +1,61 @@
+/*
+ * MTD primitives for XIP support. Architecture specific functions.
+ *
+ * Do not include this file directly. It's included from linux/mtd/xip.h
+ *
+ * Author: Vladimir Barinov <vbarinov@embeddedalley.com>
+ *
+ * (c) 2005 MontaVista Software, Inc.  This file is licensed under the
+ * terms of the GNU General Public License version 2.  This program is
+ * licensed "as is" without any warranty of any kind, whether express or
+ * implied.
+ */
+
+#ifndef __ARCH_OMAP_MTD_XIP_H__
+#define __ARCH_OMAP_MTD_XIP_H__
+
+#include <mach/hardware.h>
+#define OMAP_MPU_TIMER_BASE     (0xfffec500)
+#define OMAP_MPU_TIMER_OFFSET   0x100
+
+typedef struct {
+        u32 cntl;                       /* CNTL_TIMER, R/W */
+        u32 load_tim;                   /* LOAD_TIM,   W */
+        u32 read_tim;                   /* READ_TIM,   R */
+} xip_omap_mpu_timer_regs_t;
+
+#define xip_omap_mpu_timer_base(n)                                      \
+((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +    \
+        (n)*OMAP_MPU_TIMER_OFFSET))
+
+static inline unsigned long xip_omap_mpu_timer_read(int nr)
+{
+        volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr);
+        return timer->read_tim;
+}
+
+#define xip_irqpending()        \
+        (omap_readl(OMAP_IH1_ITR) & ~omap_readl(OMAP_IH1_MIR))
+#define xip_currtime()          (~xip_omap_mpu_timer_read(0))
+
+/*
+ * It's permitted to do approxmation for xip_elapsed_since macro
+ * (see linux/mtd/xip.h)
+ */
+
+#ifdef CONFIG_MACH_OMAP_PERSEUS2
+#define xip_elapsed_since(x)    (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 7)
+#else
+#define xip_elapsed_since(x)    (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 6)
+#endif
+
+/*
+ * xip_cpu_idle() is used when waiting for a delay equal or larger than
+ * the system timer tick period.  This should put the CPU into idle mode
+ * to save power and to be woken up only when some interrupts are pending.
+ * As above, this should not rely upon standard kernel code.
+ */
+
+#define xip_cpu_idle()  asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (1))
+
+#endif /* __ARCH_OMAP_MTD_XIP_H__ */
diff --git a/arch/arm/mach-omap1/include/mach/smp.h b/arch/arm/mach-omap1/include/mach/smp.h
new file mode 100644
index 000000000000..80a371c06e59
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/smp.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/smp.h
+ */
+
+#include <plat/smp.h>
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h
new file mode 100644
index 000000000000..a6c1b3a16dfc
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/system.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/system.h
+ */
+
+#include <plat/system.h>
diff --git a/arch/arm/mach-omap1/include/mach/timex.h b/arch/arm/mach-omap1/include/mach/timex.h
new file mode 100644
index 000000000000..4793790d53cc
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/timex.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/timex.h
+ */
+
+#include <plat/timex.h>
diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h
new file mode 100644
index 000000000000..0ff22dc075c7
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/uncompress.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-omap1/include/mach/uncompress.h
+ */
+
+#include <plat/uncompress.h>
diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h
new file mode 100644
index 000000000000..1b2af14df151
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/vmalloc.h
@@ -0,0 +1,20 @@
+/*
+ *  arch/arm/mach-omap1/include/mach/vmalloc.h
+ *
+ *  Copyright (C) 2000 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#define VMALLOC_END     (PAGE_OFFSET + 0x18000000)
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 7030f9281ea1..d9b8d82530ae 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -15,10 +15,11 @@
 
 #include <asm/tlb.h>
 #include <asm/mach/map.h>
-#include <mach/mux.h>
-#include <mach/tc.h>
+#include <plat/mux.h>
+#include <plat/tc.h>
+
+#include "clock.h"
 
-extern int omap1_clk_init(void);
 extern void omap_check_revision(void);
 extern void omap_sram_init(void);
 extern void omapfb_reserve_sdram(void);
@@ -36,33 +37,17 @@ static struct map_desc omap_io_desc[] __initdata = {
         }
 };
 
-#ifdef CONFIG_ARCH_OMAP730
-static struct map_desc omap730_io_desc[] __initdata = {
+#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
+static struct map_desc omap7xx_io_desc[] __initdata = {
         {
-                .virtual        = OMAP730_DSP_BASE,
-                .pfn            = __phys_to_pfn(OMAP730_DSP_START),
-                .length         = OMAP730_DSP_SIZE,
+                .virtual        = OMAP7XX_DSP_BASE,
+                .pfn            = __phys_to_pfn(OMAP7XX_DSP_START),
+                .length         = OMAP7XX_DSP_SIZE,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = OMAP730_DSPREG_BASE,
-                .pfn            = __phys_to_pfn(OMAP730_DSPREG_START),
-                .length         = OMAP730_DSPREG_SIZE,
-                .type           = MT_DEVICE
-        }
-};
-#endif
-
-#ifdef CONFIG_ARCH_OMAP850
-static struct map_desc omap850_io_desc[] __initdata = {
-        {
-                .virtual        = OMAP850_DSP_BASE,
-                .pfn            = __phys_to_pfn(OMAP850_DSP_START),
-                .length         = OMAP850_DSP_SIZE,
-                .type           = MT_DEVICE
-        }, {
-                .virtual        = OMAP850_DSPREG_BASE,
-                .pfn            = __phys_to_pfn(OMAP850_DSPREG_START),
-                .length         = OMAP850_DSPREG_SIZE,
+                .virtual        = OMAP7XX_DSPREG_BASE,
+                .pfn            = __phys_to_pfn(OMAP7XX_DSPREG_START),
+                .length         = OMAP7XX_DSPREG_SIZE,
                 .type           = MT_DEVICE
         }
 };
@@ -120,18 +105,11 @@ void __init omap1_map_common_io(void)
          */
         omap_check_revision();
 
-#ifdef CONFIG_ARCH_OMAP730
-        if (cpu_is_omap730()) {
-                iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
-        }
-#endif
-
-#ifdef CONFIG_ARCH_OMAP850
-        if (cpu_is_omap850()) {
-                iotable_init(omap850_io_desc, ARRAY_SIZE(omap850_io_desc));
+#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
+        if (cpu_is_omap7xx()) {
+                iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
         }
 #endif
-
 #ifdef CONFIG_ARCH_OMAP15XX
         if (cpu_is_omap15xx()) {
                 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index de03c8448994..db913c34d1fe 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -46,7 +46,7 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <mach/gpio.h>
-#include <mach/cpu.h>
+#include <plat/cpu.h>
 
 #define IRQ_BANK(irq) ((irq) >> 5)
 #define IRQ_BIT(irq)  ((irq) & 0x1f)
@@ -137,16 +137,8 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger)
         irq_bank_writel(val, bank, offset);
 }
 
-#ifdef CONFIG_ARCH_OMAP730
-static struct omap_irq_bank omap730_irq_banks[] = {
-        { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3f8e22f },
-        { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xfdb9c1f2 },
-        { .base_reg = OMAP_IH2_BASE + 0x100,    .trigger_map = 0x800040f3 },
-};
-#endif
-
-#ifdef CONFIG_ARCH_OMAP850
-static struct omap_irq_bank omap850_irq_banks[] = {
+#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
+static struct omap_irq_bank omap7xx_irq_banks[] = {
         { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3f8e22f },
         { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xfdb9c1f2 },
         { .base_reg = OMAP_IH2_BASE + 0x100,    .trigger_map = 0x800040f3 },
@@ -186,16 +178,10 @@ void __init omap_init_irq(void)
 {
         int i, j;
 
-#ifdef CONFIG_ARCH_OMAP730
-        if (cpu_is_omap730()) {
-                irq_banks = omap730_irq_banks;
-                irq_bank_count = ARRAY_SIZE(omap730_irq_banks);
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-        if (cpu_is_omap850()) {
-                irq_banks = omap850_irq_banks;
-                irq_bank_count = ARRAY_SIZE(omap850_irq_banks);
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        if (cpu_is_omap7xx()) {
+                irq_banks = omap7xx_irq_banks;
+                irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks);
         }
 #endif
 #ifdef CONFIG_ARCH_OMAP15XX
@@ -247,10 +233,8 @@ void __init omap_init_irq(void)
 
         /* Unmask level 2 handler */
 
-        if (cpu_is_omap730())
-                omap_unmask_irq(INT_730_IH2_IRQ);
-        else if (cpu_is_omap850())
-                omap_unmask_irq(INT_850_IH2_IRQ);
+        if (cpu_is_omap7xx())
+                omap_unmask_irq(INT_7XX_IH2_IRQ);
         else if (cpu_is_omap15xx())
                 omap_unmask_irq(INT_1510_IH2_IRQ);
         else if (cpu_is_omap16xx())
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
new file mode 100644
index 000000000000..3be11af687bb
--- /dev/null
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -0,0 +1,448 @@
+/*
+ * linux/arch/arm/mach-omap1/lcd_dma.c
+ *
+ * Extracted from arch/arm/plat-omap/dma.c
+ * Copyright (C) 2003 - 2008 Nokia Corporation
+ * Author: Juha Yrjölä <juha.yrjola@nokia.com>
+ * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
+ * Graphics DMA and LCD DMA graphics tranformations
+ * by Imre Deak <imre.deak@nokia.com>
+ * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
+ * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
+ * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
+ *
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * Support functions for the OMAP internal DMA channels.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/lcdc.h>
+#include <plat/dma.h>
+
+int omap_lcd_dma_running(void)
+{
+        /*
+         * On OMAP1510, internal LCD controller will start the transfer
+         * when it gets enabled, so assume DMA running if LCD enabled.
+         */
+        if (cpu_is_omap1510())
+                if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
+                        return 1;
+
+        /* Check if LCD DMA is running */
+        if (cpu_is_omap16xx())
+                if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
+                        return 1;
+
+        return 0;
+}
+
+static struct lcd_dma_info {
+        spinlock_t lock;
+        int reserved;
+        void (*callback)(u16 status, void *data);
+        void *cb_data;
+
+        int active;
+        unsigned long addr, size;
+        int rotate, data_type, xres, yres;
+        int vxres;
+        int mirror;
+        int xscale, yscale;
+        int ext_ctrl;
+        int src_port;
+        int single_transfer;
+} lcd_dma;
+
+void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
+                         int data_type)
+{
+        lcd_dma.addr = addr;
+        lcd_dma.data_type = data_type;
+        lcd_dma.xres = fb_xres;
+        lcd_dma.yres = fb_yres;
+}
+EXPORT_SYMBOL(omap_set_lcd_dma_b1);
+
+void omap_set_lcd_dma_src_port(int port)
+{
+        lcd_dma.src_port = port;
+}
+
+void omap_set_lcd_dma_ext_controller(int external)
+{
+        lcd_dma.ext_ctrl = external;
+}
+EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller);
+
+void omap_set_lcd_dma_single_transfer(int single)
+{
+        lcd_dma.single_transfer = single;
+}
+EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
+
+void omap_set_lcd_dma_b1_rotation(int rotate)
+{
+        if (cpu_is_omap1510()) {
+                printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
+                BUG();
+                return;
+        }
+        lcd_dma.rotate = rotate;
+}
+EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
+
+void omap_set_lcd_dma_b1_mirror(int mirror)
+{
+        if (cpu_is_omap1510()) {
+                printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
+                BUG();
+        }
+        lcd_dma.mirror = mirror;
+}
+EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
+
+void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
+{
+        if (cpu_is_omap1510()) {
+                printk(KERN_ERR "DMA virtual resulotion is not supported "
+                                "in 1510 mode\n");
+                BUG();
+        }
+        lcd_dma.vxres = vxres;
+}
+EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
+
+void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
+{
+        if (cpu_is_omap1510()) {
+                printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
+                BUG();
+        }
+        lcd_dma.xscale = xscale;
+        lcd_dma.yscale = yscale;
+}
+EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale);
+
+static void set_b1_regs(void)
+{
+        unsigned long top, bottom;
+        int es;
+        u16 w;
+        unsigned long en, fn;
+        long ei, fi;
+        unsigned long vxres;
+        unsigned int xscale, yscale;
+
+        switch (lcd_dma.data_type) {
+        case OMAP_DMA_DATA_TYPE_S8:
+                es = 1;
+                break;
+        case OMAP_DMA_DATA_TYPE_S16:
+                es = 2;
+                break;
+        case OMAP_DMA_DATA_TYPE_S32:
+                es = 4;
+                break;
+        default:
+                BUG();
+                return;
+        }
+
+        vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres;
+        xscale = lcd_dma.xscale ? lcd_dma.xscale : 1;
+        yscale = lcd_dma.yscale ? lcd_dma.yscale : 1;
+        BUG_ON(vxres < lcd_dma.xres);
+
+#define PIXADDR(x, y) (lcd_dma.addr +                                   \
+                ((y) * vxres * yscale + (x) * xscale) * es)
+#define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1)
+
+        switch (lcd_dma.rotate) {
+        case 0:
+                if (!lcd_dma.mirror) {
+                        top = PIXADDR(0, 0);
+                        bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
+                        /* 1510 DMA requires the bottom address to be 2 more
+                         * than the actual last memory access location. */
+                        if (cpu_is_omap1510() &&
+                                lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
+                                        bottom += 2;
+                        ei = PIXSTEP(0, 0, 1, 0);
+                        fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1);
+                } else {
+                        top = PIXADDR(lcd_dma.xres - 1, 0);
+                        bottom = PIXADDR(0, lcd_dma.yres - 1);
+                        ei = PIXSTEP(1, 0, 0, 0);
+                        fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1);
+                }
+                en = lcd_dma.xres;
+                fn = lcd_dma.yres;
+                break;
+        case 90:
+                if (!lcd_dma.mirror) {
+                        top = PIXADDR(0, lcd_dma.yres - 1);
+                        bottom = PIXADDR(lcd_dma.xres - 1, 0);
+                        ei = PIXSTEP(0, 1, 0, 0);
+                        fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1);
+                } else {
+                        top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
+                        bottom = PIXADDR(0, 0);
+                        ei = PIXSTEP(0, 1, 0, 0);
+                        fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1);
+                }
+                en = lcd_dma.yres;
+                fn = lcd_dma.xres;
+                break;
+        case 180:
+                if (!lcd_dma.mirror) {
+                        top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
+                        bottom = PIXADDR(0, 0);
+                        ei = PIXSTEP(1, 0, 0, 0);
+                        fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0);
+                } else {
+                        top = PIXADDR(0, lcd_dma.yres - 1);
+                        bottom = PIXADDR(lcd_dma.xres - 1, 0);
+                        ei = PIXSTEP(0, 0, 1, 0);
+                        fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0);
+                }
+                en = lcd_dma.xres;
+                fn = lcd_dma.yres;
+                break;
+        case 270:
+                if (!lcd_dma.mirror) {
+                        top = PIXADDR(lcd_dma.xres - 1, 0);
+                        bottom = PIXADDR(0, lcd_dma.yres - 1);
+                        ei = PIXSTEP(0, 0, 0, 1);
+                        fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0);
+                } else {
+                        top = PIXADDR(0, 0);
+                        bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
+                        ei = PIXSTEP(0, 0, 0, 1);
+                        fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0);
+                }
+                en = lcd_dma.yres;
+                fn = lcd_dma.xres;
+                break;
+        default:
+                BUG();
+                return; /* Suppress warning about uninitialized vars */
+        }
+
+        if (cpu_is_omap1510()) {
+                omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
+                omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
+                omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
+                omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L);
+
+                return;
+        }
+
+        /* 1610 regs */
+        omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U);
+        omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L);
+        omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U);
+        omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L);
+
+        omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1);
+        omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1);
+
+        w = omap_readw(OMAP1610_DMA_LCD_CSDP);
+        w &= ~0x03;
+        w |= lcd_dma.data_type;
+        omap_writew(w, OMAP1610_DMA_LCD_CSDP);
+
+        w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+        /* Always set the source port as SDRAM for now*/
+        w &= ~(0x03 << 6);
+        if (lcd_dma.callback != NULL)
+                w |= 1 << 1;            /* Block interrupt enable */
+        else
+                w &= ~(1 << 1);
+        omap_writew(w, OMAP1610_DMA_LCD_CTRL);
+
+        if (!(lcd_dma.rotate || lcd_dma.mirror ||
+              lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale))
+                return;
+
+        w = omap_readw(OMAP1610_DMA_LCD_CCR);
+        /* Set the double-indexed addressing mode */
+        w |= (0x03 << 12);
+        omap_writew(w, OMAP1610_DMA_LCD_CCR);
+
+        omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1);
+        omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U);
+        omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
+}
+
+static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
+{
+        u16 w;
+
+        w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+        if (unlikely(!(w & (1 << 3)))) {
+                printk(KERN_WARNING "Spurious LCD DMA IRQ\n");
+                return IRQ_NONE;
+        }
+        /* Ack the IRQ */
+        w |= (1 << 3);
+        omap_writew(w, OMAP1610_DMA_LCD_CTRL);
+        lcd_dma.active = 0;
+        if (lcd_dma.callback != NULL)
+                lcd_dma.callback(w, lcd_dma.cb_data);
+
+        return IRQ_HANDLED;
+}
+
+int omap_request_lcd_dma(void (*callback)(u16 status, void *data),
+                         void *data)
+{
+        spin_lock_irq(&lcd_dma.lock);
+        if (lcd_dma.reserved) {
+                spin_unlock_irq(&lcd_dma.lock);
+                printk(KERN_ERR "LCD DMA channel already reserved\n");
+                BUG();
+                return -EBUSY;
+        }
+        lcd_dma.reserved = 1;
+        spin_unlock_irq(&lcd_dma.lock);
+        lcd_dma.callback = callback;
+        lcd_dma.cb_data = data;
+        lcd_dma.active = 0;
+        lcd_dma.single_transfer = 0;
+        lcd_dma.rotate = 0;
+        lcd_dma.vxres = 0;
+        lcd_dma.mirror = 0;
+        lcd_dma.xscale = 0;
+        lcd_dma.yscale = 0;
+        lcd_dma.ext_ctrl = 0;
+        lcd_dma.src_port = 0;
+
+        return 0;
+}
+EXPORT_SYMBOL(omap_request_lcd_dma);
+
+void omap_free_lcd_dma(void)
+{
+        spin_lock(&lcd_dma.lock);
+        if (!lcd_dma.reserved) {
+                spin_unlock(&lcd_dma.lock);
+                printk(KERN_ERR "LCD DMA is not reserved\n");
+                BUG();
+                return;
+        }
+        if (!cpu_is_omap1510())
+                omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
+                            OMAP1610_DMA_LCD_CCR);
+        lcd_dma.reserved = 0;
+        spin_unlock(&lcd_dma.lock);
+}
+EXPORT_SYMBOL(omap_free_lcd_dma);
+
+void omap_enable_lcd_dma(void)
+{
+        u16 w;
+
+        /*
+         * Set the Enable bit only if an external controller is
+         * connected. Otherwise the OMAP internal controller will
+         * start the transfer when it gets enabled.
+         */
+        if (cpu_is_omap1510() || !lcd_dma.ext_ctrl)
+                return;
+
+        w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+        w |= 1 << 8;
+        omap_writew(w, OMAP1610_DMA_LCD_CTRL);
+
+        lcd_dma.active = 1;
+
+        w = omap_readw(OMAP1610_DMA_LCD_CCR);
+        w |= 1 << 7;
+        omap_writew(w, OMAP1610_DMA_LCD_CCR);
+}
+EXPORT_SYMBOL(omap_enable_lcd_dma);
+
+void omap_setup_lcd_dma(void)
+{
+        BUG_ON(lcd_dma.active);
+        if (!cpu_is_omap1510()) {
+                /* Set some reasonable defaults */
+                omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
+                omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
+                omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
+        }
+        set_b1_regs();
+        if (!cpu_is_omap1510()) {
+                u16 w;
+
+                w = omap_readw(OMAP1610_DMA_LCD_CCR);
+                /*
+                 * If DMA was already active set the end_prog bit to have
+                 * the programmed register set loaded into the active
+                 * register set.
+                 */
+                w |= 1 << 11;           /* End_prog */
+                if (!lcd_dma.single_transfer)
+                        w |= (3 << 8);  /* Auto_init, repeat */
+                omap_writew(w, OMAP1610_DMA_LCD_CCR);
+        }
+}
+EXPORT_SYMBOL(omap_setup_lcd_dma);
+
+void omap_stop_lcd_dma(void)
+{
+        u16 w;
+
+        lcd_dma.active = 0;
+        if (cpu_is_omap1510() || !lcd_dma.ext_ctrl)
+                return;
+
+        w = omap_readw(OMAP1610_DMA_LCD_CCR);
+        w &= ~(1 << 7);
+        omap_writew(w, OMAP1610_DMA_LCD_CCR);
+
+        w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+        w &= ~(1 << 8);
+        omap_writew(w, OMAP1610_DMA_LCD_CTRL);
+}
+EXPORT_SYMBOL(omap_stop_lcd_dma);
+
+static int __init omap_init_lcd_dma(void)
+{
+        int r;
+
+        if (cpu_is_omap16xx()) {
+                u16 w;
+
+                /* this would prevent OMAP sleep */
+                w = omap_readw(OMAP1610_DMA_LCD_CTRL);
+                w &= ~(1 << 8);
+                omap_writew(w, OMAP1610_DMA_LCD_CTRL);
+        }
+
+        spin_lock_init(&lcd_dma.lock);
+
+        r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
+                        "LCD DMA", NULL);
+        if (r != 0)
+                printk(KERN_ERR "unable to request IRQ for LCD DMA "
+                               "(error %d)\n", r);
+
+        return r;
+}
+
+arch_initcall(omap_init_lcd_dma);
+
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index 17c9d0e04216..b4f9be52e1e8 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -19,7 +19,7 @@
 #include <asm/system.h>
 #include <asm/mach-types.h>
 
-#include <mach/fpga.h>
+#include <plat/fpga.h>
 #include <mach/gpio.h>
 
 #include "leds.h"
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index 8cbf2562dcaa..277f356d4cd0 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -10,7 +10,7 @@
 #include <asm/mach-types.h>
 
 #include <mach/gpio.h>
-#include <mach/mux.h>
+#include <plat/mux.h>
 
 #include "leds.h"
 
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c
index 6810b4aeb02c..4f5b3da3d559 100644
--- a/arch/arm/mach-omap1/mailbox.c
+++ b/arch/arm/mach-omap1/mailbox.c
@@ -14,7 +14,7 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#include <mach/mailbox.h>
+#include <plat/mailbox.h>
 #include <mach/irqs.h>
 
 #define MAILBOX_ARM2DSP1                0x00
@@ -146,7 +146,6 @@ EXPORT_SYMBOL(mbox_dsp_info);
 static int __devinit omap1_mbox_probe(struct platform_device *pdev)
 {
         struct resource *res;
-        int ret = 0;
 
         if (pdev->num_resources != 2) {
                 dev_err(&pdev->dev, "invalid number of resources: %d\n",
@@ -160,12 +159,18 @@ static int __devinit omap1_mbox_probe(struct platform_device *pdev)
                 dev_err(&pdev->dev, "invalid mem resource\n");
                 return -ENODEV;
         }
-        mbox_base = res->start;
+
+        mbox_base = ioremap(res->start, resource_size(res));
+        if (!mbox_base) {
+                dev_err(&pdev->dev, "ioremap failed\n");
+                return -ENODEV;
+        }
 
         /* DSP IRQ */
         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
         if (unlikely(!res)) {
                 dev_err(&pdev->dev, "invalid irq resource\n");
+                iounmap(mbox_base);
                 return -ENODEV;
         }
         mbox_dsp_info.irq = res->start;
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 505d98cfe508..e9bdff192f82 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -16,13 +16,14 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 
 #include <mach/irqs.h>
-#include <mach/dma.h>
-#include <mach/mux.h>
-#include <mach/cpu.h>
-#include <mach/mcbsp.h>
-#include <mach/dsp_common.h>
+#include <plat/dma.h>
+#include <plat/mux.h>
+#include <plat/cpu.h>
+#include <plat/mcbsp.h>
+#include <plat/dsp_common.h>
 
 #define DPS_RSTCT2_PER_EN       (1 << 0)
 #define DSP_RSTCT2_WD_PER_EN    (1 << 1)
@@ -79,29 +80,31 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
         .free           = omap1_mcbsp_free,
 };
 
-#ifdef CONFIG_ARCH_OMAP730
-static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
         {
-                .phys_base      = OMAP730_MCBSP1_BASE,
+                .phys_base      = OMAP7XX_MCBSP1_BASE,
                 .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
                 .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
-                .rx_irq         = INT_730_McBSP1RX,
-                .tx_irq         = INT_730_McBSP1TX,
+                .rx_irq         = INT_7XX_McBSP1RX,
+                .tx_irq         = INT_7XX_McBSP1TX,
                 .ops            = &omap1_mcbsp_ops,
         },
         {
-                .phys_base      = OMAP730_MCBSP2_BASE,
+                .phys_base      = OMAP7XX_MCBSP2_BASE,
                 .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
                 .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
-                .rx_irq         = INT_730_McBSP2RX,
-                .tx_irq         = INT_730_McBSP2TX,
+                .rx_irq         = INT_7XX_McBSP2RX,
+                .tx_irq         = INT_7XX_McBSP2TX,
                 .ops            = &omap1_mcbsp_ops,
         },
 };
-#define OMAP730_MCBSP_PDATA_SZ          ARRAY_SIZE(omap730_mcbsp_pdata)
+#define OMAP7XX_MCBSP_PDATA_SZ          ARRAY_SIZE(omap7xx_mcbsp_pdata)
+#define OMAP7XX_MCBSP_REG_NUM           (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 #else
-#define omap730_mcbsp_pdata             NULL
-#define OMAP730_MCBSP_PDATA_SZ          0
+#define omap7xx_mcbsp_pdata             NULL
+#define OMAP7XX_MCBSP_PDATA_SZ          0
+#define OMAP7XX_MCBSP_REG_NUM           0
 #endif
 
 #ifdef CONFIG_ARCH_OMAP15XX
@@ -132,9 +135,11 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
         },
 };
 #define OMAP15XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap15xx_mcbsp_pdata)
+#define OMAP15XX_MCBSP_REG_NUM          (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 #else
 #define omap15xx_mcbsp_pdata            NULL
 #define OMAP15XX_MCBSP_PDATA_SZ         0
+#define OMAP15XX_MCBSP_REG_NUM          0
 #endif
 
 #ifdef CONFIG_ARCH_OMAP16XX
@@ -165,28 +170,34 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
         },
 };
 #define OMAP16XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap16xx_mcbsp_pdata)
+#define OMAP16XX_MCBSP_REG_NUM          (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 #else
 #define omap16xx_mcbsp_pdata            NULL
 #define OMAP16XX_MCBSP_PDATA_SZ         0
+#define OMAP16XX_MCBSP_REG_NUM          0
 #endif
 
 int __init omap1_mcbsp_init(void)
 {
-        if (cpu_is_omap730())
-                omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
-        if (cpu_is_omap15xx())
+        if (cpu_is_omap7xx()) {
+                omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ;
+                omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16);
+        } else if (cpu_is_omap15xx()) {
                 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
-        if (cpu_is_omap16xx())
+                omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16);
+        } else if (cpu_is_omap16xx()) {
                 omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
+                omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16);
+        }
 
         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
                                                                 GFP_KERNEL);
         if (!mcbsp_ptr)
                 return -ENOMEM;
 
-        if (cpu_is_omap730())
-                omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata,
-                                                OMAP730_MCBSP_PDATA_SZ);
+        if (cpu_is_omap7xx())
+                omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata,
+                                                OMAP7XX_MCBSP_PDATA_SZ);
 
         if (cpu_is_omap15xx())
                 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata,
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 721e0d9d8b1d..84341377232d 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -29,53 +29,53 @@
 
 #include <asm/system.h>
 
-#include <mach/mux.h>
+#include <plat/mux.h>
 
 #ifdef CONFIG_OMAP_MUX
 
 static struct omap_mux_cfg arch_mux_cfg;
 
-#ifdef CONFIG_ARCH_OMAP730
-static struct pin_config __initdata_or_module omap730_pins[] = {
-MUX_CFG_730("E2_730_KBR0",        12,   21,    0,   20,   1, 0)
-MUX_CFG_730("J7_730_KBR1",        12,   25,    0,   24,   1, 0)
-MUX_CFG_730("E1_730_KBR2",        12,   29,    0,   28,   1, 0)
-MUX_CFG_730("F3_730_KBR3",        13,    1,    0,    0,   1, 0)
-MUX_CFG_730("D2_730_KBR4",        13,    5,    0,    4,   1, 0)
-MUX_CFG_730("C2_730_KBC0",        13,    9,    0,    8,   1, 0)
-MUX_CFG_730("D3_730_KBC1",        13,   13,    0,   12,   1, 0)
-MUX_CFG_730("E4_730_KBC2",        13,   17,    0,   16,   1, 0)
-MUX_CFG_730("F4_730_KBC3",        13,   21,    0,   20,   1, 0)
-MUX_CFG_730("E3_730_KBC4",        13,   25,    0,   24,   1, 0)
-
-MUX_CFG_730("AA17_730_USB_DM",     2,   21,    0,   20,   0, 0)
-MUX_CFG_730("W16_730_USB_PU_EN",   2,   25,    0,   24,   0, 0)
-MUX_CFG_730("W17_730_USB_VBUSI",   2,   29,    0,   28,   0, 0)
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+static struct pin_config __initdata_or_module omap7xx_pins[] = {
+MUX_CFG_7XX("E2_7XX_KBR0",        12,   21,    0,   20,   1, 0)
+MUX_CFG_7XX("J7_7XX_KBR1",        12,   25,    0,   24,   1, 0)
+MUX_CFG_7XX("E1_7XX_KBR2",        12,   29,    0,   28,   1, 0)
+MUX_CFG_7XX("F3_7XX_KBR3",        13,    1,    0,    0,   1, 0)
+MUX_CFG_7XX("D2_7XX_KBR4",        13,    5,    0,    4,   1, 0)
+MUX_CFG_7XX("C2_7XX_KBC0",        13,    9,    0,    8,   1, 0)
+MUX_CFG_7XX("D3_7XX_KBC1",        13,   13,    0,   12,   1, 0)
+MUX_CFG_7XX("E4_7XX_KBC2",        13,   17,    0,   16,   1, 0)
+MUX_CFG_7XX("F4_7XX_KBC3",        13,   21,    0,   20,   1, 0)
+MUX_CFG_7XX("E3_7XX_KBC4",        13,   25,    0,   24,   1, 0)
+
+MUX_CFG_7XX("AA17_7XX_USB_DM",     2,   21,    0,   20,   0, 0)
+MUX_CFG_7XX("W16_7XX_USB_PU_EN",   2,   25,    0,   24,   0, 0)
+MUX_CFG_7XX("W17_7XX_USB_VBUSI",   2,   29,    6,   28,   1, 0)
+MUX_CFG_7XX("W18_7XX_USB_DMCK_OUT",3,    3,    1,    2,   0, 0)
+MUX_CFG_7XX("W19_7XX_USB_DCRST",   3,    7,    1,    6,   0, 0)
+
+/* MMC Pins */
+MUX_CFG_7XX("MMC_7XX_CMD",         2,    9,    0,    8,   1, 0)
+MUX_CFG_7XX("MMC_7XX_CLK",         2,   13,    0,   12,   1, 0)
+MUX_CFG_7XX("MMC_7XX_DAT0",        2,   17,    0,   16,   1, 0)
+
+/* I2C interface */
+MUX_CFG_7XX("I2C_7XX_SCL",         5,    1,    0,    0,   1, 0)
+MUX_CFG_7XX("I2C_7XX_SDA",         5,    5,    0,    0,   1, 0)
+
+/* SPI pins */
+MUX_CFG_7XX("SPI_7XX_1",           6,    5,    4,    4,   1, 0)
+MUX_CFG_7XX("SPI_7XX_2",           6,    9,    4,    8,   1, 0)
+MUX_CFG_7XX("SPI_7XX_3",           6,   13,    4,   12,   1, 0)
+MUX_CFG_7XX("SPI_7XX_4",           6,   17,    4,   16,   1, 0)
+MUX_CFG_7XX("SPI_7XX_5",           8,   25,    0,   24,   0, 0)
+MUX_CFG_7XX("SPI_7XX_6",           9,    5,    0,    4,   0, 0)
 };
-#define OMAP730_PINS_SZ         ARRAY_SIZE(omap730_pins)
+#define OMAP7XX_PINS_SZ         ARRAY_SIZE(omap7xx_pins)
 #else
-#define omap730_pins            NULL
-#define OMAP730_PINS_SZ         0
-#endif  /* CONFIG_ARCH_OMAP730 */
-
-#ifdef CONFIG_ARCH_OMAP850
-struct pin_config __initdata_or_module omap850_pins[] = {
-MUX_CFG_850("E2_850_KBR0",        12,   21,    0,   20,   1, 0)
-MUX_CFG_850("J7_850_KBR1",        12,   25,    0,   24,   1, 0)
-MUX_CFG_850("E1_850_KBR2",        12,   29,    0,   28,   1, 0)
-MUX_CFG_850("F3_850_KBR3",        13,    1,    0,    0,   1, 0)
-MUX_CFG_850("D2_850_KBR4",        13,    5,    0,    4,   1, 0)
-MUX_CFG_850("C2_850_KBC0",        13,    9,    0,    8,   1, 0)
-MUX_CFG_850("D3_850_KBC1",        13,   13,    0,   12,   1, 0)
-MUX_CFG_850("E4_850_KBC2",        13,   17,    0,   16,   1, 0)
-MUX_CFG_850("F4_850_KBC3",        13,   21,    0,   20,   1, 0)
-MUX_CFG_850("E3_850_KBC4",        13,   25,    0,   24,   1, 0)
-
-MUX_CFG_850("AA17_850_USB_DM",     2,   21,    0,   20,   0, 0)
-MUX_CFG_850("W16_850_USB_PU_EN",   2,   25,    0,   24,   0, 0)
-MUX_CFG_850("W17_850_USB_VBUSI",   2,   29,    0,   28,   0, 0)
-};
-#endif
+#define omap7xx_pins            NULL
+#define OMAP7XX_PINS_SZ         0
+#endif  /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */
 
 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
 static struct pin_config __initdata_or_module omap1xxx_pins[] = {
@@ -438,11 +438,6 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
                         printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
                                cfg->pull_name, cfg->pull_reg, pull_orig, pull);
         }
-
-#ifdef CONFIG_ARCH_OMAP850
-        omap_mux_register(omap850_pins, ARRAY_SIZE(omap850_pins));
-#endif
-
 #endif
 
 #ifdef CONFIG_OMAP_MUX_ERRORS
@@ -454,9 +449,9 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
 
 int __init omap1_mux_init(void)
 {
-        if (cpu_is_omap730()) {
-                arch_mux_cfg.pins       = omap730_pins;
-                arch_mux_cfg.size       = OMAP730_PINS_SZ;
+        if (cpu_is_omap7xx()) {
+                arch_mux_cfg.pins       = omap7xx_pins;
+                arch_mux_cfg.size       = OMAP7XX_PINS_SZ;
                 arch_mux_cfg.cfg_reg    = omap1_cfg_reg;
         }
 
diff --git a/arch/arm/mach-omap1/opp.h b/arch/arm/mach-omap1/opp.h
new file mode 100644
index 000000000000..07074d79adce
--- /dev/null
+++ b/arch/arm/mach-omap1/opp.h
@@ -0,0 +1,28 @@
+/*
+ *  linux/arch/arm/mach-omap1/opp.h
+ *
+ *  Copyright (C) 2004 - 2005 Nokia corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP1_OPP_H
+#define __ARCH_ARM_MACH_OMAP1_OPP_H
+
+#include <linux/types.h>
+
+struct mpu_rate {
+        unsigned long           rate;
+        unsigned long           xtal;
+        unsigned long           pll_rate;
+        __u16                   ckctl_val;
+        __u16                   dpllctl_val;
+};
+
+extern struct mpu_rate omap1_rate_table[];
+
+#endif
diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c
new file mode 100644
index 000000000000..75a546514994
--- /dev/null
+++ b/arch/arm/mach-omap1/opp_data.c
@@ -0,0 +1,59 @@
+/*
+ *  linux/arch/arm/mach-omap1/opp_data.c
+ *
+ *  Copyright (C) 2004 - 2005 Nokia corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "opp.h"
+
+/*-------------------------------------------------------------------------
+ * Omap1 MPU rate table
+ *-------------------------------------------------------------------------*/
+struct mpu_rate omap1_rate_table[] = {
+        /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
+         * NOTE: Comment order here is different from bits in CKCTL value:
+         * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
+         */
+#if defined(CONFIG_OMAP_ARM_216MHZ)
+        { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_195MHZ)
+        { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_192MHZ)
+        { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
+        { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
+        {  96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
+        {  48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */
+        {  24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_182MHZ)
+        { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_168MHZ)
+        { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_150MHZ)
+        { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
+#endif
+#if defined(CONFIG_OMAP_ARM_120MHZ)
+        { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
+#endif
+#if defined(CONFIG_OMAP_ARM_96MHZ)
+        {  96000000, 12000000,  96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */
+#endif
+#if defined(CONFIG_OMAP_ARM_60MHZ)
+        {  60000000, 12000000,  60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
+#endif
+#if defined(CONFIG_OMAP_ARM_30MHZ)
+        {  30000000, 12000000,  60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
+#endif
+        { 0, 0, 0, 0, 0 },
+};
+
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 5218943c91c0..b1d3f9fade23 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -48,21 +48,21 @@
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 
-#include <mach/cpu.h>
+#include <plat/cpu.h>
 #include <mach/irqs.h>
-#include <mach/clock.h>
-#include <mach/sram.h>
-#include <mach/tc.h>
-#include <mach/mux.h>
-#include <mach/dma.h>
-#include <mach/dmtimer.h>
+#include <plat/clock.h>
+#include <plat/sram.h>
+#include <plat/tc.h>
+#include <plat/mux.h>
+#include <plat/dma.h>
+#include <plat/dmtimer.h>
 
 #include "pm.h"
 
 static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
 static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
 static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE];
-static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE];
+static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE];
 static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE];
 static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE];
 
@@ -183,9 +183,9 @@ static void omap_pm_wakeup_setup(void)
          * drivers must still separately call omap_set_gpio_wakeup() to
          * wake up to a GPIO interrupt.
          */
-        if (cpu_is_omap730())
-                level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) |
-                        OMAP_IRQ_BIT(INT_730_IH2_IRQ);
+        if (cpu_is_omap7xx())
+                level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) |
+                        OMAP_IRQ_BIT(INT_7XX_IH2_IRQ);
         else if (cpu_is_omap15xx())
                 level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
                         OMAP_IRQ_BIT(INT_1510_IH2_IRQ);
@@ -195,10 +195,10 @@ static void omap_pm_wakeup_setup(void)
 
         omap_writel(~level1_wake, OMAP_IH1_MIR);
 
-        if (cpu_is_omap730()) {
+        if (cpu_is_omap7xx()) {
                 omap_writel(~level2_wake, OMAP_IH2_0_MIR);
-                omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) |
-                                OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)),
+                omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) |
+                                OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)),
                                 OMAP_IH2_1_MIR);
         } else if (cpu_is_omap15xx()) {
                 level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
@@ -253,15 +253,15 @@ void omap1_pm_suspend(void)
          * Save interrupt, MPUI, ARM and UPLD control registers.
          */
 
-        if (cpu_is_omap730()) {
-                MPUI730_SAVE(OMAP_IH1_MIR);
-                MPUI730_SAVE(OMAP_IH2_0_MIR);
-                MPUI730_SAVE(OMAP_IH2_1_MIR);
-                MPUI730_SAVE(MPUI_CTRL);
-                MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG);
-                MPUI730_SAVE(MPUI_DSP_API_CONFIG);
-                MPUI730_SAVE(EMIFS_CONFIG);
-                MPUI730_SAVE(EMIFF_SDRAM_CONFIG);
+        if (cpu_is_omap7xx()) {
+                MPUI7XX_SAVE(OMAP_IH1_MIR);
+                MPUI7XX_SAVE(OMAP_IH2_0_MIR);
+                MPUI7XX_SAVE(OMAP_IH2_1_MIR);
+                MPUI7XX_SAVE(MPUI_CTRL);
+                MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG);
+                MPUI7XX_SAVE(MPUI_DSP_API_CONFIG);
+                MPUI7XX_SAVE(EMIFS_CONFIG);
+                MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG);
 
         } else if (cpu_is_omap15xx()) {
                 MPUI1510_SAVE(OMAP_IH1_MIR);
@@ -306,7 +306,7 @@ void omap1_pm_suspend(void)
         omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1);
 
                 /* shut down dsp_ck */
-        if (!cpu_is_omap730())
+        if (!cpu_is_omap7xx())
                 omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
 
         /* temporarily enabling api_ck to access DSP registers */
@@ -383,12 +383,12 @@ void omap1_pm_suspend(void)
         ULPD_RESTORE(ULPD_CLOCK_CTRL);
         ULPD_RESTORE(ULPD_STATUS_REQ);
 
-        if (cpu_is_omap730()) {
-                MPUI730_RESTORE(EMIFS_CONFIG);
-                MPUI730_RESTORE(EMIFF_SDRAM_CONFIG);
-                MPUI730_RESTORE(OMAP_IH1_MIR);
-                MPUI730_RESTORE(OMAP_IH2_0_MIR);
-                MPUI730_RESTORE(OMAP_IH2_1_MIR);
+        if (cpu_is_omap7xx()) {
+                MPUI7XX_RESTORE(EMIFS_CONFIG);
+                MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG);
+                MPUI7XX_RESTORE(OMAP_IH1_MIR);
+                MPUI7XX_RESTORE(OMAP_IH2_0_MIR);
+                MPUI7XX_RESTORE(OMAP_IH2_1_MIR);
         } else if (cpu_is_omap15xx()) {
                 MPUI1510_RESTORE(MPUI_CTRL);
                 MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG);
@@ -461,13 +461,13 @@ static int omap_pm_read_proc(
         ULPD_SAVE(ULPD_DPLL_CTRL);
         ULPD_SAVE(ULPD_POWER_CTRL);
 
-        if (cpu_is_omap730()) {
-                MPUI730_SAVE(MPUI_CTRL);
-                MPUI730_SAVE(MPUI_DSP_STATUS);
-                MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG);
-                MPUI730_SAVE(MPUI_DSP_API_CONFIG);
-                MPUI730_SAVE(EMIFF_SDRAM_CONFIG);
-                MPUI730_SAVE(EMIFS_CONFIG);
+        if (cpu_is_omap7xx()) {
+                MPUI7XX_SAVE(MPUI_CTRL);
+                MPUI7XX_SAVE(MPUI_DSP_STATUS);
+                MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG);
+                MPUI7XX_SAVE(MPUI_DSP_API_CONFIG);
+                MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG);
+                MPUI7XX_SAVE(EMIFS_CONFIG);
         } else if (cpu_is_omap15xx()) {
                 MPUI1510_SAVE(MPUI_CTRL);
                 MPUI1510_SAVE(MPUI_DSP_STATUS);
@@ -517,20 +517,20 @@ static int omap_pm_read_proc(
                    ULPD_SHOW(ULPD_STATUS_REQ),
                    ULPD_SHOW(ULPD_POWER_CTRL));
 
-                if (cpu_is_omap730()) {
+                if (cpu_is_omap7xx()) {
                         my_buffer_offset += sprintf(my_base + my_buffer_offset,
-                           "MPUI730_CTRL_REG         0x%-8x \n"
-                           "MPUI730_DSP_STATUS_REG:      0x%-8x \n"
-                           "MPUI730_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
-                           "MPUI730_DSP_API_CONFIG_REG:  0x%-8x \n"
-                           "MPUI730_SDRAM_CONFIG_REG:    0x%-8x \n"
-                           "MPUI730_EMIFS_CONFIG_REG:    0x%-8x \n",
-                           MPUI730_SHOW(MPUI_CTRL),
-                           MPUI730_SHOW(MPUI_DSP_STATUS),
-                           MPUI730_SHOW(MPUI_DSP_BOOT_CONFIG),
-                           MPUI730_SHOW(MPUI_DSP_API_CONFIG),
-                           MPUI730_SHOW(EMIFF_SDRAM_CONFIG),
-                           MPUI730_SHOW(EMIFS_CONFIG));
+                           "MPUI7XX_CTRL_REG         0x%-8x \n"
+                           "MPUI7XX_DSP_STATUS_REG:      0x%-8x \n"
+                           "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
+                           "MPUI7XX_DSP_API_CONFIG_REG:  0x%-8x \n"
+                           "MPUI7XX_SDRAM_CONFIG_REG:    0x%-8x \n"
+                           "MPUI7XX_EMIFS_CONFIG_REG:    0x%-8x \n",
+                           MPUI7XX_SHOW(MPUI_CTRL),
+                           MPUI7XX_SHOW(MPUI_DSP_STATUS),
+                           MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG),
+                           MPUI7XX_SHOW(MPUI_DSP_API_CONFIG),
+                           MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG),
+                           MPUI7XX_SHOW(EMIFS_CONFIG));
                 } else if (cpu_is_omap15xx()) {
                         my_buffer_offset += sprintf(my_base + my_buffer_offset,
                            "MPUI1510_CTRL_REG             0x%-8x \n"
@@ -668,9 +668,9 @@ static int __init omap_pm_init(void)
          * These routines need to be in SRAM as that's the only
          * memory the MPU can see when it wakes up.
          */
-        if (cpu_is_omap730()) {
-                omap_sram_suspend = omap_sram_push(omap730_cpu_suspend,
-                                                   omap730_cpu_suspend_sz);
+        if (cpu_is_omap7xx()) {
+                omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend,
+                                                   omap7xx_cpu_suspend_sz);
         } else if (cpu_is_omap15xx()) {
                 omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend,
                                                    omap1510_cpu_suspend_sz);
@@ -686,8 +686,8 @@ static int __init omap_pm_init(void)
 
         pm_idle = omap1_pm_idle;
 
-        if (cpu_is_omap730())
-                setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq);
+        if (cpu_is_omap7xx())
+                setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq);
         else if (cpu_is_omap16xx())
                 setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq);
 
@@ -700,8 +700,8 @@ static int __init omap_pm_init(void)
         omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL);
 
         /* Configure IDLECT3 */
-        if (cpu_is_omap730())
-                omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3);
+        if (cpu_is_omap7xx())
+                omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3);
         else if (cpu_is_omap16xx())
                 omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3);
 
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h
index c4f05bdcf8a6..56a647986ae9 100644
--- a/arch/arm/mach-omap1/pm.h
+++ b/arch/arm/mach-omap1/pm.h
@@ -98,13 +98,14 @@
 #define OMAP1610_IDLECT3                0xfffece24
 #define OMAP1610_IDLE_LOOP_REQUEST      0x0400
 
-#define OMAP730_IDLECT1_SLEEP_VAL       0x16c7
-#define OMAP730_IDLECT2_SLEEP_VAL       0x09c7
-#define OMAP730_IDLECT3_VAL             0x3f
-#define OMAP730_IDLECT3         0xfffece24
-#define OMAP730_IDLE_LOOP_REQUEST       0x0C00
+#define OMAP7XX_IDLECT1_SLEEP_VAL       0x16c7
+#define OMAP7XX_IDLECT2_SLEEP_VAL       0x09c7
+#define OMAP7XX_IDLECT3_VAL             0x3f
+#define OMAP7XX_IDLECT3         0xfffece24
+#define OMAP7XX_IDLE_LOOP_REQUEST       0x0C00
 
 #if     !defined(CONFIG_ARCH_OMAP730) && \
+        !defined(CONFIG_ARCH_OMAP850) && \
         !defined(CONFIG_ARCH_OMAP15XX) && \
         !defined(CONFIG_ARCH_OMAP16XX)
 #warning "Power management for this processor not implemented yet"
@@ -122,17 +123,17 @@ extern void allow_idle_sleep(void);
 extern void omap1_pm_idle(void);
 extern void omap1_pm_suspend(void);
 
-extern void omap730_cpu_suspend(unsigned short, unsigned short);
+extern void omap7xx_cpu_suspend(unsigned short, unsigned short);
 extern void omap1510_cpu_suspend(unsigned short, unsigned short);
 extern void omap1610_cpu_suspend(unsigned short, unsigned short);
-extern void omap730_idle_loop_suspend(void);
+extern void omap7xx_idle_loop_suspend(void);
 extern void omap1510_idle_loop_suspend(void);
 extern void omap1610_idle_loop_suspend(void);
 
-extern unsigned int omap730_cpu_suspend_sz;
+extern unsigned int omap7xx_cpu_suspend_sz;
 extern unsigned int omap1510_cpu_suspend_sz;
 extern unsigned int omap1610_cpu_suspend_sz;
-extern unsigned int omap730_idle_loop_suspend_sz;
+extern unsigned int omap7xx_idle_loop_suspend_sz;
 extern unsigned int omap1510_idle_loop_suspend_sz;
 extern unsigned int omap1610_idle_loop_suspend_sz;
 
@@ -155,9 +156,9 @@ extern void omap_serial_wake_trigger(int enable);
 #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x))
 #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]
 
-#define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x)
-#define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x))
-#define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]
+#define MPUI7XX_SAVE(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] = omap_readl(x)
+#define MPUI7XX_RESTORE(x) omap_writel((mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x]), (x))
+#define MPUI7XX_SHOW(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x]
 
 #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x)
 #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x))
@@ -232,24 +233,24 @@ enum mpui1510_save_state {
 #endif
 };
 
-enum mpui730_save_state {
-        MPUI730_SLEEP_SAVE_START = 0,
+enum mpui7xx_save_state {
+        MPUI7XX_SLEEP_SAVE_START = 0,
         /*
          * MPUI registers 32 bits
          */
-        MPUI730_SLEEP_SAVE_MPUI_CTRL,
-        MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG,
-        MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG,
-        MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS,
-        MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG,
-        MPUI730_SLEEP_SAVE_EMIFS_CONFIG,
-        MPUI730_SLEEP_SAVE_OMAP_IH1_MIR,
-        MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR,
-        MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR,
-#if defined(CONFIG_ARCH_OMAP730)
-        MPUI730_SLEEP_SAVE_SIZE
+        MPUI7XX_SLEEP_SAVE_MPUI_CTRL,
+        MPUI7XX_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG,
+        MPUI7XX_SLEEP_SAVE_MPUI_DSP_API_CONFIG,
+        MPUI7XX_SLEEP_SAVE_MPUI_DSP_STATUS,
+        MPUI7XX_SLEEP_SAVE_EMIFF_SDRAM_CONFIG,
+        MPUI7XX_SLEEP_SAVE_EMIFS_CONFIG,
+        MPUI7XX_SLEEP_SAVE_OMAP_IH1_MIR,
+        MPUI7XX_SLEEP_SAVE_OMAP_IH2_0_MIR,
+        MPUI7XX_SLEEP_SAVE_OMAP_IH2_1_MIR,
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        MPUI7XX_SLEEP_SAVE_SIZE
 #else
-        MPUI730_SLEEP_SAVE_SIZE = 0
+        MPUI7XX_SLEEP_SAVE_SIZE = 0
 #endif
 };
 
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index d23979bc0fd5..349de90194e3 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -22,10 +22,10 @@
 
 #include <asm/mach-types.h>
 
-#include <mach/board.h>
-#include <mach/mux.h>
+#include <plat/board.h>
+#include <plat/mux.h>
 #include <mach/gpio.h>
-#include <mach/fpga.h>
+#include <plat/fpga.h>
 
 static struct clk * uart1_ck;
 static struct clk * uart2_ck;
@@ -64,8 +64,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
 
 static struct plat_serial8250_port serial_platform_data[] = {
         {
-                .membase        = OMAP1_IO_ADDRESS(OMAP_UART1_BASE),
-                .mapbase        = OMAP_UART1_BASE,
+                .mapbase        = OMAP1_UART1_BASE,
                 .irq            = INT_UART1,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .iotype         = UPIO_MEM,
@@ -73,8 +72,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
         },
         {
-                .membase        = OMAP1_IO_ADDRESS(OMAP_UART2_BASE),
-                .mapbase        = OMAP_UART2_BASE,
+                .mapbase        = OMAP1_UART2_BASE,
                 .irq            = INT_UART2,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .iotype         = UPIO_MEM,
@@ -82,8 +80,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
         },
         {
-                .membase        = OMAP1_IO_ADDRESS(OMAP_UART3_BASE),
-                .mapbase        = OMAP_UART3_BASE,
+                .mapbase        = OMAP1_UART3_BASE,
                 .irq            = INT_UART3,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .iotype         = UPIO_MEM,
@@ -110,18 +107,11 @@ void __init omap_serial_init(void)
 {
         int i;
 
-        if (cpu_is_omap730()) {
+        if (cpu_is_omap7xx()) {
                 serial_platform_data[0].regshift = 0;
                 serial_platform_data[1].regshift = 0;
-                serial_platform_data[0].irq = INT_730_UART_MODEM_1;
-                serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
-        }
-
-        if (cpu_is_omap850()) {
-                serial_platform_data[0].regshift = 0;
-                serial_platform_data[1].regshift = 0;
-                serial_platform_data[0].irq = INT_850_UART_MODEM_1;
-                serial_platform_data[1].irq = INT_850_UART_MODEM_IRDA_2;
+                serial_platform_data[0].irq = INT_7XX_UART_MODEM_1;
+                serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2;
         }
 
         if (cpu_is_omap15xx()) {
@@ -130,7 +120,15 @@ void __init omap_serial_init(void)
                 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
         }
 
-        for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
+        for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
+
+                /* Static mapping, never released */
+                serial_platform_data[i].membase =
+                        ioremap(serial_platform_data[i].mapbase, SZ_2K);
+                if (!serial_platform_data[i].membase) {
+                        printk(KERN_ERR "Could not ioremap uart%i\n", i);
+                        continue;
+                }
                 switch (i) {
                 case 0:
                         uart1_ck = clk_get(NULL, "uart1_ck");
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 22e8568339b0..ef771ce8b030 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-omap1/sleep.S
  *
- * Low-level OMAP730/1510/1610 sleep/wakeUp support
+ * Low-level OMAP7XX/1510/1610 sleep/wakeUp support
  *
  * Initial SA1110 code:
  * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
@@ -57,8 +57,8 @@
  *
  */
 
-#if defined(CONFIG_ARCH_OMAP730)
-ENTRY(omap730_cpu_suspend)
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+ENTRY(omap7xx_cpu_suspend)
 
         @ save registers on stack
         stmfd   sp!, {r0 - r12, lr}
@@ -91,13 +91,13 @@ ENTRY(omap730_cpu_suspend)
 
         @ turn off clock domains
         @ do not disable PERCK (0x04)
-        mov     r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff
-        orr     r5, r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff00
+        mov     r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff
+        orr     r5, r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff00
         strh    r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
 
         @ request ARM idle
-        mov     r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff
-        orr     r3, r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff00
+        mov     r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff
+        orr     r3, r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff00
         strh    r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
 
         @ disable instruction cache
@@ -113,7 +113,7 @@ ENTRY(omap730_cpu_suspend)
         mov     r2, #0
         mcr     p15, 0, r2, c7, c0, 4           @ wait for interrupt
 /*
- * omap730_cpu_suspend()'s resume point.
+ * omap7xx_cpu_suspend()'s resume point.
  *
  * It will just start executing here, so we'll restore stuff from the
  * stack.
@@ -132,9 +132,9 @@ ENTRY(omap730_cpu_suspend)
         @ restore regs and return
         ldmfd   sp!, {r0 - r12, pc}
 
-ENTRY(omap730_cpu_suspend_sz)
-        .word   . - omap730_cpu_suspend
-#endif /* CONFIG_ARCH_OMAP730 */
+ENTRY(omap7xx_cpu_suspend_sz)
+        .word   . - omap7xx_cpu_suspend
+#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */
 
 #ifdef CONFIG_ARCH_OMAP15XX
 ENTRY(omap1510_cpu_suspend)
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index fd3f7396e162..20cfbcc6c60c 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,7 +52,7 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
-#include <mach/dmtimer.h>
+#include <plat/dmtimer.h>
 
 struct sys_timer omap_timer;
 
@@ -68,12 +68,6 @@ struct sys_timer omap_timer;
  * ---------------------------------------------------------------------------
  */
 
-#if defined(CONFIG_ARCH_OMAP16XX)
-#define TIMER_32K_SYNCHRONIZED          0xfffbc410
-#else
-#error OMAP 32KHz timer does not currently work on 15XX!
-#endif
-
 /* 16xx specific defines */
 #define OMAP1_32K_TIMER_BASE            0xfffb9000
 #define OMAP1_32K_TIMER_CR              0x08
@@ -150,15 +144,6 @@ static struct clock_event_device clockevent_32k_timer = {
         .set_mode       = omap_32k_timer_set_mode,
 };
 
-/*
- * The 32KHz synchronized timer is an additional timer on 16xx.
- * It is always running.
- */
-static inline unsigned long omap_32k_sync_timer_read(void)
-{
-        return omap_readl(TIMER_32K_SYNCHRONIZED);
-}
-
 static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
 {
         struct clock_event_device *evt = &clockevent_32k_timer;