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authorKishon Vijay Abraham I <kishon@ti.com>2011-02-24 15:51:45 -0500
committerTony Lindgren <tony@atomide.com>2011-02-24 15:51:45 -0500
commit3cf32bba8ca0e0052ca41d74d455a5805b7fea85 (patch)
treef985fb7169d528e40fa94c475d64b03dbfdc6c92 /arch/arm/mach-omap1/mcbsp.c
parentcd5038024d6c92fbe4bf67af91eea5c6fb24a192 (diff)
OMAP: McBSP: Convert McBSP to platform device model
Implement McBSP as platform device and add support for registering through platform device layer using resource structures. Later in this patch series, OMAP2+ McBSP driver would be modified to use hwmod framework after populating the omap2+ hwmod database. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap1/mcbsp.c')
-rw-r--r--arch/arm/mach-omap1/mcbsp.c327
1 files changed, 259 insertions, 68 deletions
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 820973666f34..e68f6c012fde 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -10,6 +10,7 @@
10 * 10 *
11 * Multichannel mode not supported. 11 * Multichannel mode not supported.
12 */ 12 */
13#include <linux/ioport.h>
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/init.h> 15#include <linux/init.h>
15#include <linux/clk.h> 16#include <linux/clk.h>
@@ -78,100 +79,288 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
78}; 79};
79 80
80#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 81#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
82struct resource omap7xx_mcbsp_res[][6] = {
83 {
84 {
85 .start = OMAP7XX_MCBSP1_BASE,
86 .end = OMAP7XX_MCBSP1_BASE + SZ_256,
87 .flags = IORESOURCE_MEM,
88 },
89 {
90 .name = "rx",
91 .start = INT_7XX_McBSP1RX,
92 .flags = IORESOURCE_IRQ,
93 },
94 {
95 .name = "tx",
96 .start = INT_7XX_McBSP1TX,
97 .flags = IORESOURCE_IRQ,
98 },
99 {
100 .name = "rx",
101 .start = OMAP_DMA_MCBSP1_RX,
102 .flags = IORESOURCE_DMA,
103 },
104 {
105 .name = "tx",
106 .start = OMAP_DMA_MCBSP1_TX,
107 .flags = IORESOURCE_DMA,
108 },
109 },
110 {
111 {
112 .start = OMAP7XX_MCBSP2_BASE,
113 .end = OMAP7XX_MCBSP2_BASE + SZ_256,
114 .flags = IORESOURCE_MEM,
115 },
116 {
117 .name = "rx",
118 .start = INT_7XX_McBSP2RX,
119 .flags = IORESOURCE_IRQ,
120 },
121 {
122 .name = "tx",
123 .start = INT_7XX_McBSP2TX,
124 .flags = IORESOURCE_IRQ,
125 },
126 {
127 .name = "rx",
128 .start = OMAP_DMA_MCBSP3_RX,
129 .flags = IORESOURCE_DMA,
130 },
131 {
132 .name = "tx",
133 .start = OMAP_DMA_MCBSP3_TX,
134 .flags = IORESOURCE_DMA,
135 },
136 },
137};
138
81static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = { 139static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
82 { 140 {
83 .phys_base = OMAP7XX_MCBSP1_BASE,
84 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
85 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
86 .rx_irq = INT_7XX_McBSP1RX,
87 .tx_irq = INT_7XX_McBSP1TX,
88 .ops = &omap1_mcbsp_ops, 141 .ops = &omap1_mcbsp_ops,
89 }, 142 },
90 { 143 {
91 .phys_base = OMAP7XX_MCBSP2_BASE,
92 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
93 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
94 .rx_irq = INT_7XX_McBSP2RX,
95 .tx_irq = INT_7XX_McBSP2TX,
96 .ops = &omap1_mcbsp_ops, 144 .ops = &omap1_mcbsp_ops,
97 }, 145 },
98}; 146};
99#define OMAP7XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap7xx_mcbsp_pdata) 147#define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1])
100#define OMAP7XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) 148#define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res)
101#else 149#else
150#define omap7xx_mcbsp_res NULL
102#define omap7xx_mcbsp_pdata NULL 151#define omap7xx_mcbsp_pdata NULL
103#define OMAP7XX_MCBSP_PDATA_SZ 0 152#define OMAP7XX_MCBSP_RES_SZ 0
104#define OMAP7XX_MCBSP_REG_NUM 0 153#define OMAP7XX_MCBSP_COUNT 0
105#endif 154#endif
106 155
107#ifdef CONFIG_ARCH_OMAP15XX 156#ifdef CONFIG_ARCH_OMAP15XX
157struct resource omap15xx_mcbsp_res[][6] = {
158 {
159 {
160 .start = OMAP1510_MCBSP1_BASE,
161 .end = OMAP1510_MCBSP1_BASE + SZ_256,
162 .flags = IORESOURCE_MEM,
163 },
164 {
165 .name = "rx",
166 .start = INT_McBSP1RX,
167 .flags = IORESOURCE_IRQ,
168 },
169 {
170 .name = "tx",
171 .start = INT_McBSP1TX,
172 .flags = IORESOURCE_IRQ,
173 },
174 {
175 .name = "rx",
176 .start = OMAP_DMA_MCBSP1_RX,
177 .flags = IORESOURCE_DMA,
178 },
179 {
180 .name = "tx",
181 .start = OMAP_DMA_MCBSP1_TX,
182 .flags = IORESOURCE_DMA,
183 },
184 },
185 {
186 {
187 .start = OMAP1510_MCBSP2_BASE,
188 .end = OMAP1510_MCBSP2_BASE + SZ_256,
189 .flags = IORESOURCE_MEM,
190 },
191 {
192 .name = "rx",
193 .start = INT_1510_SPI_RX,
194 .flags = IORESOURCE_IRQ,
195 },
196 {
197 .name = "tx",
198 .start = INT_1510_SPI_TX,
199 .flags = IORESOURCE_IRQ,
200 },
201 {
202 .name = "rx",
203 .start = OMAP_DMA_MCBSP2_RX,
204 .flags = IORESOURCE_DMA,
205 },
206 {
207 .name = "tx",
208 .start = OMAP_DMA_MCBSP2_TX,
209 .flags = IORESOURCE_DMA,
210 },
211 },
212 {
213 {
214 .start = OMAP1510_MCBSP3_BASE,
215 .end = OMAP1510_MCBSP3_BASE + SZ_256,
216 .flags = IORESOURCE_MEM,
217 },
218 {
219 .name = "rx",
220 .start = INT_McBSP3RX,
221 .flags = IORESOURCE_IRQ,
222 },
223 {
224 .name = "tx",
225 .start = INT_McBSP3TX,
226 .flags = IORESOURCE_IRQ,
227 },
228 {
229 .name = "rx",
230 .start = OMAP_DMA_MCBSP3_RX,
231 .flags = IORESOURCE_DMA,
232 },
233 {
234 .name = "tx",
235 .start = OMAP_DMA_MCBSP3_TX,
236 .flags = IORESOURCE_DMA,
237 },
238 },
239};
240
108static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { 241static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
109 { 242 {
110 .phys_base = OMAP1510_MCBSP1_BASE,
111 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
112 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
113 .rx_irq = INT_McBSP1RX,
114 .tx_irq = INT_McBSP1TX,
115 .ops = &omap1_mcbsp_ops, 243 .ops = &omap1_mcbsp_ops,
116 }, 244 },
117 { 245 {
118 .phys_base = OMAP1510_MCBSP2_BASE,
119 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
120 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
121 .rx_irq = INT_1510_SPI_RX,
122 .tx_irq = INT_1510_SPI_TX,
123 .ops = &omap1_mcbsp_ops, 246 .ops = &omap1_mcbsp_ops,
124 }, 247 },
125 { 248 {
126 .phys_base = OMAP1510_MCBSP3_BASE,
127 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
128 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
129 .rx_irq = INT_McBSP3RX,
130 .tx_irq = INT_McBSP3TX,
131 .ops = &omap1_mcbsp_ops, 249 .ops = &omap1_mcbsp_ops,
132 }, 250 },
133}; 251};
134#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) 252#define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1])
135#define OMAP15XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) 253#define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res)
136#else 254#else
255#define omap15xx_mcbsp_res NULL
137#define omap15xx_mcbsp_pdata NULL 256#define omap15xx_mcbsp_pdata NULL
138#define OMAP15XX_MCBSP_PDATA_SZ 0 257#define OMAP15XX_MCBSP_RES_SZ 0
139#define OMAP15XX_MCBSP_REG_NUM 0 258#define OMAP15XX_MCBSP_COUNT 0
140#endif 259#endif
141 260
142#ifdef CONFIG_ARCH_OMAP16XX 261#ifdef CONFIG_ARCH_OMAP16XX
262struct resource omap16xx_mcbsp_res[][6] = {
263 {
264 {
265 .start = OMAP1610_MCBSP1_BASE,
266 .end = OMAP1610_MCBSP1_BASE + SZ_256,
267 .flags = IORESOURCE_MEM,
268 },
269 {
270 .name = "rx",
271 .start = INT_McBSP1RX,
272 .flags = IORESOURCE_IRQ,
273 },
274 {
275 .name = "tx",
276 .start = INT_McBSP1TX,
277 .flags = IORESOURCE_IRQ,
278 },
279 {
280 .name = "rx",
281 .start = OMAP_DMA_MCBSP1_RX,
282 .flags = IORESOURCE_DMA,
283 },
284 {
285 .name = "tx",
286 .start = OMAP_DMA_MCBSP1_TX,
287 .flags = IORESOURCE_DMA,
288 },
289 },
290 {
291 {
292 .start = OMAP1610_MCBSP2_BASE,
293 .end = OMAP1610_MCBSP2_BASE + SZ_256,
294 .flags = IORESOURCE_MEM,
295 },
296 {
297 .name = "rx",
298 .start = INT_1610_McBSP2_RX,
299 .flags = IORESOURCE_IRQ,
300 },
301 {
302 .name = "tx",
303 .start = INT_1610_McBSP2_TX,
304 .flags = IORESOURCE_IRQ,
305 },
306 {
307 .name = "rx",
308 .start = OMAP_DMA_MCBSP2_RX,
309 .flags = IORESOURCE_DMA,
310 },
311 {
312 .name = "tx",
313 .start = OMAP_DMA_MCBSP2_TX,
314 .flags = IORESOURCE_DMA,
315 },
316 },
317 {
318 {
319 .start = OMAP1610_MCBSP3_BASE,
320 .end = OMAP1610_MCBSP3_BASE + SZ_256,
321 .flags = IORESOURCE_MEM,
322 },
323 {
324 .name = "rx",
325 .start = INT_McBSP3RX,
326 .flags = IORESOURCE_IRQ,
327 },
328 {
329 .name = "tx",
330 .start = INT_McBSP3TX,
331 .flags = IORESOURCE_IRQ,
332 },
333 {
334 .name = "rx",
335 .start = OMAP_DMA_MCBSP3_RX,
336 .flags = IORESOURCE_DMA,
337 },
338 {
339 .name = "tx",
340 .start = OMAP_DMA_MCBSP3_TX,
341 .flags = IORESOURCE_DMA,
342 },
343 },
344};
345
143static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { 346static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
144 { 347 {
145 .phys_base = OMAP1610_MCBSP1_BASE,
146 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
147 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
148 .rx_irq = INT_McBSP1RX,
149 .tx_irq = INT_McBSP1TX,
150 .ops = &omap1_mcbsp_ops, 348 .ops = &omap1_mcbsp_ops,
151 }, 349 },
152 { 350 {
153 .phys_base = OMAP1610_MCBSP2_BASE,
154 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
155 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
156 .rx_irq = INT_1610_McBSP2_RX,
157 .tx_irq = INT_1610_McBSP2_TX,
158 .ops = &omap1_mcbsp_ops, 351 .ops = &omap1_mcbsp_ops,
159 }, 352 },
160 { 353 {
161 .phys_base = OMAP1610_MCBSP3_BASE,
162 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
163 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
164 .rx_irq = INT_McBSP3RX,
165 .tx_irq = INT_McBSP3TX,
166 .ops = &omap1_mcbsp_ops, 354 .ops = &omap1_mcbsp_ops,
167 }, 355 },
168}; 356};
169#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) 357#define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1])
170#define OMAP16XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) 358#define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res)
171#else 359#else
360#define omap16xx_mcbsp_res NULL
172#define omap16xx_mcbsp_pdata NULL 361#define omap16xx_mcbsp_pdata NULL
173#define OMAP16XX_MCBSP_PDATA_SZ 0 362#define OMAP16XX_MCBSP_RES_SZ 0
174#define OMAP16XX_MCBSP_REG_NUM 0 363#define OMAP16XX_MCBSP_COUNT 0
175#endif 364#endif
176 365
177static int __init omap1_mcbsp_init(void) 366static int __init omap1_mcbsp_init(void)
@@ -179,16 +368,12 @@ static int __init omap1_mcbsp_init(void)
179 if (!cpu_class_is_omap1()) 368 if (!cpu_class_is_omap1())
180 return -ENODEV; 369 return -ENODEV;
181 370
182 if (cpu_is_omap7xx()) { 371 if (cpu_is_omap7xx())
183 omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ; 372 omap_mcbsp_count = OMAP7XX_MCBSP_COUNT;
184 omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16); 373 else if (cpu_is_omap15xx())
185 } else if (cpu_is_omap15xx()) { 374 omap_mcbsp_count = OMAP15XX_MCBSP_COUNT;
186 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; 375 else if (cpu_is_omap16xx())
187 omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16); 376 omap_mcbsp_count = OMAP16XX_MCBSP_COUNT;
188 } else if (cpu_is_omap16xx()) {
189 omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
190 omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16);
191 }
192 377
193 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), 378 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
194 GFP_KERNEL); 379 GFP_KERNEL);
@@ -196,16 +381,22 @@ static int __init omap1_mcbsp_init(void)
196 return -ENOMEM; 381 return -ENOMEM;
197 382
198 if (cpu_is_omap7xx()) 383 if (cpu_is_omap7xx())
199 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata, 384 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res[0],
200 OMAP7XX_MCBSP_PDATA_SZ); 385 OMAP7XX_MCBSP_RES_SZ,
386 omap7xx_mcbsp_pdata,
387 OMAP7XX_MCBSP_COUNT);
201 388
202 if (cpu_is_omap15xx()) 389 if (cpu_is_omap15xx())
203 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata, 390 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res[0],
204 OMAP15XX_MCBSP_PDATA_SZ); 391 OMAP15XX_MCBSP_RES_SZ,
392 omap15xx_mcbsp_pdata,
393 OMAP15XX_MCBSP_COUNT);
205 394
206 if (cpu_is_omap16xx()) 395 if (cpu_is_omap16xx())
207 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata, 396 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res[0],
208 OMAP16XX_MCBSP_PDATA_SZ); 397 OMAP16XX_MCBSP_RES_SZ,
398 omap16xx_mcbsp_pdata,
399 OMAP16XX_MCBSP_COUNT);
209 400
210 return omap_mcbsp_init(); 401 return omap_mcbsp_init();
211} 402}
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-22 23:13:43 -0400