diff options
author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-09-11 08:27:20 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2012-09-21 14:03:44 -0400 |
commit | 383b99610e6084878930d4e4682dfc5e9141b038 (patch) | |
tree | 1a35c3cac8cbb8335ec6dcb632db4ccd7a21dc68 /arch/arm/mach-mv78xx0/include/mach | |
parent | 060f3d191b1d80312d7c90de2f3c3356db413f40 (diff) |
arm: mach-mv78xx0: use IOMEM() for base address definitions
We now define all virtual base address constants using IOMEM() so that
those are naturally typed as void __iomem pointers, and we do the
necessary adjustements in the mach-mv78xx0 code.
Note that we introduce a few temporary additional "unsigned long"
casts when calling into plat-orion functions. Those are removed by
followup patches converting plat-orion functions to void __iomem
pointers as well.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mv78xx0/include/mach')
-rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h index a86e79ecfeaf..62405e8dda0e 100644 --- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | |||
@@ -41,16 +41,16 @@ | |||
41 | */ | 41 | */ |
42 | #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 | 42 | #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 |
43 | #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 | 43 | #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 |
44 | #define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 | 44 | #define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000) |
45 | #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000 | 45 | #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000 |
46 | #define MV78XX0_CORE_REGS_SIZE SZ_16K | 46 | #define MV78XX0_CORE_REGS_SIZE SZ_16K |
47 | 47 | ||
48 | #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) | 48 | #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) |
49 | #define MV78XX0_PCIE_IO_VIRT_BASE(i) (0xfe700000 + ((i) << 20)) | 49 | #define MV78XX0_PCIE_IO_VIRT_BASE(i) IOMEM(0xfe700000 + ((i) << 20)) |
50 | #define MV78XX0_PCIE_IO_SIZE SZ_1M | 50 | #define MV78XX0_PCIE_IO_SIZE SZ_1M |
51 | 51 | ||
52 | #define MV78XX0_REGS_PHYS_BASE 0xf1000000 | 52 | #define MV78XX0_REGS_PHYS_BASE 0xf1000000 |
53 | #define MV78XX0_REGS_VIRT_BASE 0xfef00000 | 53 | #define MV78XX0_REGS_VIRT_BASE IOMEM(0xfef00000) |
54 | #define MV78XX0_REGS_SIZE SZ_1M | 54 | #define MV78XX0_REGS_SIZE SZ_1M |
55 | 55 | ||
56 | #define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000 | 56 | #define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000 |