diff options
author | Jens Axboe <jens.axboe@oracle.com> | 2010-03-19 03:05:10 -0400 |
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committer | Jens Axboe <jens.axboe@oracle.com> | 2010-03-19 03:05:10 -0400 |
commit | b4b7a4ef097f288f724420b473dbf92a89c0ab7e (patch) | |
tree | 23ad8101e3e77c32a8d1e1b95a9c1cd7f7a475b7 /arch/arm/mach-mmp/time.c | |
parent | e9ce335df51ff782035a15c261a3c0c9892a1767 (diff) | |
parent | a3d3203e4bb40f253b1541e310dc0f9305be7c84 (diff) |
Merge branch 'master' into for-linus
Conflicts:
block/Kconfig
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Diffstat (limited to 'arch/arm/mach-mmp/time.c')
-rw-r--r-- | arch/arm/mach-mmp/time.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index a8400bb891e7..cf75694e9687 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c | |||
@@ -30,7 +30,10 @@ | |||
30 | 30 | ||
31 | #include <mach/addr-map.h> | 31 | #include <mach/addr-map.h> |
32 | #include <mach/regs-timers.h> | 32 | #include <mach/regs-timers.h> |
33 | #include <mach/regs-apbc.h> | ||
33 | #include <mach/irqs.h> | 34 | #include <mach/irqs.h> |
35 | #include <mach/cputype.h> | ||
36 | #include <asm/mach/time.h> | ||
34 | 37 | ||
35 | #include "clock.h" | 38 | #include "clock.h" |
36 | 39 | ||
@@ -158,7 +161,7 @@ static void __init timer_config(void) | |||
158 | 161 | ||
159 | __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */ | 162 | __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */ |
160 | 163 | ||
161 | ccr &= TMR_CCR_CS_0(0x3); | 164 | ccr &= (cpu_is_mmp2()) ? TMR_CCR_CS_0(0) : TMR_CCR_CS_0(3); |
162 | __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR); | 165 | __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR); |
163 | 166 | ||
164 | /* free-running mode */ | 167 | /* free-running mode */ |
@@ -197,3 +200,24 @@ void __init timer_init(int irq) | |||
197 | clocksource_register(&cksrc); | 200 | clocksource_register(&cksrc); |
198 | clockevents_register_device(&ckevt); | 201 | clockevents_register_device(&ckevt); |
199 | } | 202 | } |
203 | |||
204 | static void __init mmp2_timer_init(void) | ||
205 | { | ||
206 | unsigned long clk_rst; | ||
207 | |||
208 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); | ||
209 | |||
210 | /* | ||
211 | * enable bus/functional clock, enable 6.5MHz (divider 4), | ||
212 | * release reset | ||
213 | */ | ||
214 | clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); | ||
215 | __raw_writel(clk_rst, APBC_MMP2_TIMERS); | ||
216 | |||
217 | timer_init(IRQ_MMP2_TIMER1); | ||
218 | } | ||
219 | |||
220 | struct sys_timer mmp2_timer = { | ||
221 | .init = mmp2_timer_init, | ||
222 | }; | ||
223 | |||