Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC updates from Olof Johansson:
 "This contains the bulk of new SoC development for this merge window.

  Two new platforms have been added, the sunxi platforms (Allwinner A1x
  SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
  series of ARMv7 platforms from them, where the hope is that we can
  keep the platform code generic enough to have them all share one mach
  directory.  The new Broadcom platform is contributed by Christian
  Daudt.

  Highbank has grown support for Calxeda's next generation of hardware,
  ECX-2000.

  clps711x has seen a lot of cleanup from Alexander Shiyan, and he's
  also taken on maintainership of the platform.

  Beyond this there has been a bunch of work from a number of people on
  converting more platforms to IRQ domains, pinctrl conversion, cleanup
  and general feature enablement across most of the active platforms."

Fix up trivial conflicts as per Olof.

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits)
  mfd: vexpress-sysreg: Remove LEDs code
  irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids
  clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids
  irq: versatile: delete dangling variable
  ARM: sunxi: add missing include for mdelay()
  ARM: EXYNOS: Avoid early use of of_machine_is_compatible()
  ARM: dts: add node for PL330 MDMA1 controller for exynos4
  ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
  ARM: EXYNOS: add UART3 to DEBUG_LL ports
  ARM: S3C24XX: Add clkdev entry for camif-upll clock
  ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
  ARM: sunxi: Add missing sun4i.dtsi file
  pinctrl: samsung: Do not initialise statics to 0
  ARM i.MX6: remove gate_mask from pllv3
  ARM i.MX6: Fix ethernet PLL clocks
  ARM i.MX6: rename PLLs according to datasheet
  ARM i.MX6: Add pwm support
  ARM i.MX51: Add pwm support
  ARM i.MX53: Add pwm support
  ARM: mx5: Replace clk_register_clkdev with clock DT lookup
  ...

3 files changed, 57 insertions, 63 deletions

diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h
index 7371018455d2..eff0adad9ae3 100644
--- a/arch/arm/mach-integrator/include/mach/irqs.h
+++ b/arch/arm/mach-integrator/include/mach/irqs.h
@@ -19,64 +19,63 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-/* 
- *  Interrupt numbers
+/*
+ * Interrupt numbers, all of the above are just static reservations
+ * used so they can be encoded into device resources. They will finally
+ * be done away with when switching to device tree.
  */
-#define IRQ_PIC_START                   1
-#define IRQ_SOFTINT                     1
-#define IRQ_UARTINT0                    2
-#define IRQ_UARTINT1                    3
-#define IRQ_KMIINT0                     4
-#define IRQ_KMIINT1                     5
-#define IRQ_TIMERINT0                   6
-#define IRQ_TIMERINT1                   7
-#define IRQ_TIMERINT2                   8
-#define IRQ_RTCINT                      9
-#define IRQ_AP_EXPINT0                  10
-#define IRQ_AP_EXPINT1                  11
-#define IRQ_AP_EXPINT2                  12
-#define IRQ_AP_EXPINT3                  13
-#define IRQ_AP_PCIINT0                  14
-#define IRQ_AP_PCIINT1                  15
-#define IRQ_AP_PCIINT2                  16
-#define IRQ_AP_PCIINT3                  17
-#define IRQ_AP_V3INT                    18
-#define IRQ_AP_CPINT0                   19
-#define IRQ_AP_CPINT1                   20
-#define IRQ_AP_LBUSTIMEOUT              21
-#define IRQ_AP_APCINT                   22
-#define IRQ_CP_CLCDCINT                 23
-#define IRQ_CP_MMCIINT0                 24
-#define IRQ_CP_MMCIINT1                 25
-#define IRQ_CP_AACIINT                  26
-#define IRQ_CP_CPPLDINT                 27
-#define IRQ_CP_ETHINT                   28
-#define IRQ_CP_TSPENINT                 29
-#define IRQ_PIC_END                     29
+#define IRQ_PIC_START                   64
+#define IRQ_SOFTINT                     (IRQ_PIC_START+0)
+#define IRQ_UARTINT0                    (IRQ_PIC_START+1)
+#define IRQ_UARTINT1                    (IRQ_PIC_START+2)
+#define IRQ_KMIINT0                     (IRQ_PIC_START+3)
+#define IRQ_KMIINT1                     (IRQ_PIC_START+4)
+#define IRQ_TIMERINT0                   (IRQ_PIC_START+5)
+#define IRQ_TIMERINT1                   (IRQ_PIC_START+6)
+#define IRQ_TIMERINT2                   (IRQ_PIC_START+7)
+#define IRQ_RTCINT                      (IRQ_PIC_START+8)
+#define IRQ_AP_EXPINT0                  (IRQ_PIC_START+9)
+#define IRQ_AP_EXPINT1                  (IRQ_PIC_START+10)
+#define IRQ_AP_EXPINT2                  (IRQ_PIC_START+11)
+#define IRQ_AP_EXPINT3                  (IRQ_PIC_START+12)
+#define IRQ_AP_PCIINT0                  (IRQ_PIC_START+13)
+#define IRQ_AP_PCIINT1                  (IRQ_PIC_START+14)
+#define IRQ_AP_PCIINT2                  (IRQ_PIC_START+15)
+#define IRQ_AP_PCIINT3                  (IRQ_PIC_START+16)
+#define IRQ_AP_V3INT                    (IRQ_PIC_START+17)
+#define IRQ_AP_CPINT0                   (IRQ_PIC_START+18)
+#define IRQ_AP_CPINT1                   (IRQ_PIC_START+19)
+#define IRQ_AP_LBUSTIMEOUT              (IRQ_PIC_START+20)
+#define IRQ_AP_APCINT                   (IRQ_PIC_START+21)
+#define IRQ_CP_CLCDCINT                 (IRQ_PIC_START+22)
+#define IRQ_CP_MMCIINT0                 (IRQ_PIC_START+23)
+#define IRQ_CP_MMCIINT1                 (IRQ_PIC_START+24)
+#define IRQ_CP_AACIINT                  (IRQ_PIC_START+25)
+#define IRQ_CP_CPPLDINT                 (IRQ_PIC_START+26)
+#define IRQ_CP_ETHINT                   (IRQ_PIC_START+27)
+#define IRQ_CP_TSPENINT                 (IRQ_PIC_START+28)
+#define IRQ_PIC_END                     (IRQ_PIC_START+28)
 
-#define IRQ_CIC_START                   32
-#define IRQ_CM_SOFTINT                  32
-#define IRQ_CM_COMMRX                   33
-#define IRQ_CM_COMMTX                   34
-#define IRQ_CIC_END                     34
+#define IRQ_CIC_START                   (IRQ_PIC_END+1)
+#define IRQ_CM_SOFTINT                  (IRQ_CIC_START+0)
+#define IRQ_CM_COMMRX                   (IRQ_CIC_START+1)
+#define IRQ_CM_COMMTX                   (IRQ_CIC_START+2)
+#define IRQ_CIC_END                     (IRQ_CIC_START+2)
 
 /*
  * IntegratorCP only
  */
-#define IRQ_SIC_START                   35
-#define IRQ_SIC_CP_SOFTINT              35
-#define IRQ_SIC_CP_RI0                  36
-#define IRQ_SIC_CP_RI1                  37
-#define IRQ_SIC_CP_CARDIN               38
-#define IRQ_SIC_CP_LMINT0               39
-#define IRQ_SIC_CP_LMINT1               40
-#define IRQ_SIC_CP_LMINT2               41
-#define IRQ_SIC_CP_LMINT3               42
-#define IRQ_SIC_CP_LMINT4               43
-#define IRQ_SIC_CP_LMINT5               44
-#define IRQ_SIC_CP_LMINT6               45
-#define IRQ_SIC_CP_LMINT7               46
-#define IRQ_SIC_END                     46
-
-#define NR_IRQS_INTEGRATOR_AP           34
-#define NR_IRQS_INTEGRATOR_CP           47
+#define IRQ_SIC_START                   (IRQ_CIC_END+1)
+#define IRQ_SIC_CP_SOFTINT              (IRQ_SIC_START+0)
+#define IRQ_SIC_CP_RI0                  (IRQ_SIC_START+1)
+#define IRQ_SIC_CP_RI1                  (IRQ_SIC_START+2)
+#define IRQ_SIC_CP_CARDIN               (IRQ_SIC_START+3)
+#define IRQ_SIC_CP_LMINT0               (IRQ_SIC_START+4)
+#define IRQ_SIC_CP_LMINT1               (IRQ_SIC_START+5)
+#define IRQ_SIC_CP_LMINT2               (IRQ_SIC_START+6)
+#define IRQ_SIC_CP_LMINT3               (IRQ_SIC_START+7)
+#define IRQ_SIC_CP_LMINT4               (IRQ_SIC_START+8)
+#define IRQ_SIC_CP_LMINT5               (IRQ_SIC_START+9)
+#define IRQ_SIC_CP_LMINT6               (IRQ_SIC_START+10)
+#define IRQ_SIC_CP_LMINT7               (IRQ_SIC_START+11)
+#define IRQ_SIC_END                     (IRQ_SIC_START+11)
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index a0a7cbbb7a70..11e2a4145807 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -31,6 +31,7 @@
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/irqchip/versatile-fpga.h>
 #include <linux/mtd/physmap.h>
 #include <linux/clk.h>
 #include <linux/platform_data/clk-integrator.h>
@@ -59,8 +60,6 @@
 #include <asm/mach/pci.h>
 #include <asm/mach/time.h>
 
-#include <plat/fpga-irq.h>
-
 #include "common.h"
 
 /* Base address to the AP system controller */
@@ -584,7 +583,6 @@ static const char * ap_dt_board_compat[] = {
 DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
         .reserve        = integrator_reserve,
         .map_io         = ap_map_io,
-        .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
         .init_early     = ap_init_early,
         .init_irq       = ap_init_irq_of,
         .handle_irq     = fpga_handle_irq,
@@ -715,7 +713,6 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
         .map_io         = ap_map_io_atag,
-        .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
         .init_early     = ap_init_early,
         .init_irq       = ap_init_irq,
         .handle_irq     = fpga_handle_irq,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 29df06b35d0d..7322838c0447 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -20,6 +20,7 @@
 #include <linux/amba/clcd.h>
 #include <linux/amba/mmci.h>
 #include <linux/io.h>
+#include <linux/irqchip/versatile-fpga.h>
 #include <linux/gfp.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_data/clk-integrator.h>
@@ -47,7 +48,6 @@
 #include <asm/hardware/timer-sp.h>
 
 #include <plat/clcd.h>
-#include <plat/fpga-irq.h>
 #include <plat/sched_clock.h>
 
 #include "common.h"
@@ -387,7 +387,6 @@ static const char * intcp_dt_board_compat[] = {
 DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
         .reserve        = integrator_reserve,
         .map_io         = intcp_map_io,
-        .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
         .init_early     = intcp_init_early,
         .init_irq       = intcp_init_irq_of,
         .handle_irq     = fpga_handle_irq,
@@ -482,7 +481,7 @@ static void __init intcp_init_irq(void)
         u32 pic_mask, cic_mask, sic_mask;
 
         /* These masks are for the HW IRQ registers */
-        pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
+        pic_mask = ~((~0u) << (11 - 0));
         pic_mask |= (~((~0u) << (29 - 22))) << 22;
         cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
         sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
@@ -563,7 +562,6 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
         .map_io         = intcp_map_io_atag,
-        .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
         .init_early     = intcp_init_early,
         .init_irq       = intcp_init_irq,
         .handle_irq     = fpga_handle_irq,