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authorKukjin Kim <kgene.kim@samsung.com>2011-08-20 00:41:21 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-08-24 07:26:03 -0400
commit56b209227a87b718450e917df904e627ddfca146 (patch)
tree4a271174ecec8bf1fb13e90a2bbca00918a4def8 /arch/arm/mach-exynos4/platsmp.c
parente6d1cb9f1fffd7e300af6d8f6731a486d6255e3f (diff)
ARM: EXYNOS4: Use samsung_rev() to distinguish silicon revision
This patch uses samsung_rev() to support variable silicon revision of EXYNOS4210 so that can support for EXYNOS4210 REV0, REV1.0 and REV1.1. Note: Need to change timer setting on REV0. Acked-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/platsmp.c')
-rw-r--r--arch/arm/mach-exynos4/platsmp.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index 7c2282c6ba81..96cc6513b128 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -30,9 +30,12 @@
30#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
31#include <mach/regs-pmu.h> 31#include <mach/regs-pmu.h>
32 32
33#include <plat/cpu.h>
34
33extern void exynos4_secondary_startup(void); 35extern void exynos4_secondary_startup(void);
34 36
35#define CPU1_BOOT_REG S5P_VA_SYSRAM 37#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
38 S5P_INFORM5 : S5P_VA_SYSRAM)
36 39
37/* 40/*
38 * control for which core is the next to come out of the secondary 41 * control for which core is the next to come out of the secondary
@@ -216,5 +219,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
216 * until it receives a soft interrupt, and then the 219 * until it receives a soft interrupt, and then the
217 * secondary CPU branches to this address. 220 * secondary CPU branches to this address.
218 */ 221 */
219 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM); 222 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
223 CPU1_BOOT_REG);
220} 224}