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authorKukjin Kim <kgene.kim@samsung.com>2011-08-20 00:41:21 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-08-24 07:26:03 -0400
commit56b209227a87b718450e917df904e627ddfca146 (patch)
tree4a271174ecec8bf1fb13e90a2bbca00918a4def8
parente6d1cb9f1fffd7e300af6d8f6731a486d6255e3f (diff)
ARM: EXYNOS4: Use samsung_rev() to distinguish silicon revision
This patch uses samsung_rev() to support variable silicon revision of EXYNOS4210 so that can support for EXYNOS4210 REV0, REV1.0 and REV1.1. Note: Need to change timer setting on REV0. Acked-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-exynos4/cpu.c28
-rw-r--r--arch/arm/mach-exynos4/include/mach/map.h3
-rw-r--r--arch/arm/mach-exynos4/platsmp.c8
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h6
4 files changed, 37 insertions, 8 deletions
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 2d8a40c9e6e5..dbc358d75547 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -43,11 +43,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
43 .length = SZ_4K, 43 .length = SZ_4K,
44 .type = MT_DEVICE, 44 .type = MT_DEVICE,
45 }, { 45 }, {
46 .virtual = (unsigned long)S5P_VA_SYSRAM,
47 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM),
48 .length = SZ_4K,
49 .type = MT_DEVICE,
50 }, {
51 .virtual = (unsigned long)S5P_VA_CMU, 46 .virtual = (unsigned long)S5P_VA_CMU,
52 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), 47 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
53 .length = SZ_128K, 48 .length = SZ_128K,
@@ -120,6 +115,24 @@ static struct map_desc exynos4_iodesc[] __initdata = {
120 }, 115 },
121}; 116};
122 117
118static struct map_desc exynos4_iodesc0[] __initdata = {
119 {
120 .virtual = (unsigned long)S5P_VA_SYSRAM,
121 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
122 .length = SZ_4K,
123 .type = MT_DEVICE,
124 },
125};
126
127static struct map_desc exynos4_iodesc1[] __initdata = {
128 {
129 .virtual = (unsigned long)S5P_VA_SYSRAM,
130 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
131 .length = SZ_4K,
132 .type = MT_DEVICE,
133 },
134};
135
123static void exynos4_idle(void) 136static void exynos4_idle(void)
124{ 137{
125 if (!need_resched()) 138 if (!need_resched())
@@ -137,6 +150,11 @@ void __init exynos4_map_io(void)
137{ 150{
138 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); 151 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
139 152
153 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
154 iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
155 else
156 iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
157
140 /* initialize device information early */ 158 /* initialize device information early */
141 exynos4_default_sdhci0(); 159 exynos4_default_sdhci0();
142 exynos4_default_sdhci1(); 160 exynos4_default_sdhci1();
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h
index d32296dc65e2..7073ac730855 100644
--- a/arch/arm/mach-exynos4/include/mach/map.h
+++ b/arch/arm/mach-exynos4/include/mach/map.h
@@ -23,7 +23,8 @@
23 23
24#include <plat/map-s5p.h> 24#include <plat/map-s5p.h>
25 25
26#define EXYNOS4_PA_SYSRAM 0x02020000 26#define EXYNOS4_PA_SYSRAM0 0x02025000
27#define EXYNOS4_PA_SYSRAM1 0x02020000
27 28
28#define EXYNOS4_PA_FIMC0 0x11800000 29#define EXYNOS4_PA_FIMC0 0x11800000
29#define EXYNOS4_PA_FIMC1 0x11810000 30#define EXYNOS4_PA_FIMC1 0x11810000
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index 7c2282c6ba81..96cc6513b128 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -30,9 +30,12 @@
30#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
31#include <mach/regs-pmu.h> 31#include <mach/regs-pmu.h>
32 32
33#include <plat/cpu.h>
34
33extern void exynos4_secondary_startup(void); 35extern void exynos4_secondary_startup(void);
34 36
35#define CPU1_BOOT_REG S5P_VA_SYSRAM 37#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
38 S5P_INFORM5 : S5P_VA_SYSRAM)
36 39
37/* 40/*
38 * control for which core is the next to come out of the secondary 41 * control for which core is the next to come out of the secondary
@@ -216,5 +219,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
216 * until it receives a soft interrupt, and then the 219 * until it receives a soft interrupt, and then the
217 * secondary CPU branches to this address. 220 * secondary CPU branches to this address.
218 */ 221 */
219 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM); 222 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
223 CPU1_BOOT_REG);
220} 224}
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index c22d110a1965..6fdd5ef5e7b1 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -100,6 +100,10 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
100# define soc_is_exynos4210() 0 100# define soc_is_exynos4210() 0
101#endif 101#endif
102 102
103#define EXYNOS4210_REV_0 (0x0)
104#define EXYNOS4210_REV_1_0 (0x10)
105#define EXYNOS4210_REV_1_1 (0x11)
106
103#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } 107#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
104 108
105#ifndef MHZ 109#ifndef MHZ
@@ -144,6 +148,8 @@ extern void s3c24xx_init_cpu(void);
144extern void s3c64xx_init_cpu(void); 148extern void s3c64xx_init_cpu(void);
145extern void s5p_init_cpu(void __iomem *cpuid_addr); 149extern void s5p_init_cpu(void __iomem *cpuid_addr);
146 150
151extern unsigned int samsung_rev(void);
152
147extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); 153extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
148 154
149extern void s3c24xx_init_clocks(int xtal); 155extern void s3c24xx_init_clocks(int xtal);