diff options
author | Olof Johansson <olof@lixom.net> | 2012-12-12 19:10:45 -0500 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-12-12 19:10:45 -0500 |
commit | 9c7466b217af784280d9fc841bbd559ef3bf33e9 (patch) | |
tree | c21ee243e48912201b4041fbf3f9bd9165603bd8 /arch/arm/mach-exynos/common.c | |
parent | 4a76411ea3f1da9032e031f8fff8894b97d141b2 (diff) | |
parent | 48d224d1efec98b0b78e511150b4f5752beceb7c (diff) |
ARM: arm-soc: Merge branch 'next/pm2' into next/pm
Another smaller branch merged into next/pm before pull request.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-exynos/common.c')
-rw-r--r-- | arch/arm/mach-exynos/common.c | 65 |
1 files changed, 13 insertions, 52 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 8dd19c696a60..454bc6ed9a8d 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -63,7 +63,7 @@ static void exynos4_map_io(void); | |||
63 | static void exynos5_map_io(void); | 63 | static void exynos5_map_io(void); |
64 | static void exynos4_init_clocks(int xtal); | 64 | static void exynos4_init_clocks(int xtal); |
65 | static void exynos5_init_clocks(int xtal); | 65 | static void exynos5_init_clocks(int xtal); |
66 | static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no); | 66 | static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
67 | static int exynos_init(void); | 67 | static int exynos_init(void); |
68 | 68 | ||
69 | static struct cpu_table cpu_ids[] __initdata = { | 69 | static struct cpu_table cpu_ids[] __initdata = { |
@@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
72 | .idmask = EXYNOS4_CPU_MASK, | 72 | .idmask = EXYNOS4_CPU_MASK, |
73 | .map_io = exynos4_map_io, | 73 | .map_io = exynos4_map_io, |
74 | .init_clocks = exynos4_init_clocks, | 74 | .init_clocks = exynos4_init_clocks, |
75 | .init_uarts = exynos_init_uarts, | 75 | .init_uarts = exynos4_init_uarts, |
76 | .init = exynos_init, | 76 | .init = exynos_init, |
77 | .name = name_exynos4210, | 77 | .name = name_exynos4210, |
78 | }, { | 78 | }, { |
@@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
80 | .idmask = EXYNOS4_CPU_MASK, | 80 | .idmask = EXYNOS4_CPU_MASK, |
81 | .map_io = exynos4_map_io, | 81 | .map_io = exynos4_map_io, |
82 | .init_clocks = exynos4_init_clocks, | 82 | .init_clocks = exynos4_init_clocks, |
83 | .init_uarts = exynos_init_uarts, | 83 | .init_uarts = exynos4_init_uarts, |
84 | .init = exynos_init, | 84 | .init = exynos_init, |
85 | .name = name_exynos4212, | 85 | .name = name_exynos4212, |
86 | }, { | 86 | }, { |
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
88 | .idmask = EXYNOS4_CPU_MASK, | 88 | .idmask = EXYNOS4_CPU_MASK, |
89 | .map_io = exynos4_map_io, | 89 | .map_io = exynos4_map_io, |
90 | .init_clocks = exynos4_init_clocks, | 90 | .init_clocks = exynos4_init_clocks, |
91 | .init_uarts = exynos_init_uarts, | 91 | .init_uarts = exynos4_init_uarts, |
92 | .init = exynos_init, | 92 | .init = exynos_init, |
93 | .name = name_exynos4412, | 93 | .name = name_exynos4412, |
94 | }, { | 94 | }, { |
@@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
96 | .idmask = EXYNOS5_SOC_MASK, | 96 | .idmask = EXYNOS5_SOC_MASK, |
97 | .map_io = exynos5_map_io, | 97 | .map_io = exynos5_map_io, |
98 | .init_clocks = exynos5_init_clocks, | 98 | .init_clocks = exynos5_init_clocks, |
99 | .init_uarts = exynos_init_uarts, | ||
100 | .init = exynos_init, | 99 | .init = exynos_init, |
101 | .name = name_exynos5250, | 100 | .name = name_exynos5250, |
102 | }, | 101 | }, |
@@ -257,25 +256,10 @@ static struct map_desc exynos5_iodesc[] __initdata = { | |||
257 | .length = SZ_64K, | 256 | .length = SZ_64K, |
258 | .type = MT_DEVICE, | 257 | .type = MT_DEVICE, |
259 | }, { | 258 | }, { |
260 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, | ||
261 | .pfn = __phys_to_pfn(EXYNOS5_PA_COMBINER), | ||
262 | .length = SZ_4K, | ||
263 | .type = MT_DEVICE, | ||
264 | }, { | ||
265 | .virtual = (unsigned long)S3C_VA_UART, | 259 | .virtual = (unsigned long)S3C_VA_UART, |
266 | .pfn = __phys_to_pfn(EXYNOS5_PA_UART), | 260 | .pfn = __phys_to_pfn(EXYNOS5_PA_UART), |
267 | .length = SZ_512K, | 261 | .length = SZ_512K, |
268 | .type = MT_DEVICE, | 262 | .type = MT_DEVICE, |
269 | }, { | ||
270 | .virtual = (unsigned long)S5P_VA_GIC_CPU, | ||
271 | .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_CPU), | ||
272 | .length = SZ_8K, | ||
273 | .type = MT_DEVICE, | ||
274 | }, { | ||
275 | .virtual = (unsigned long)S5P_VA_GIC_DIST, | ||
276 | .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_DIST), | ||
277 | .length = SZ_4K, | ||
278 | .type = MT_DEVICE, | ||
279 | }, | 263 | }, |
280 | }; | 264 | }; |
281 | 265 | ||
@@ -354,23 +338,6 @@ static void __init exynos4_map_io(void) | |||
354 | static void __init exynos5_map_io(void) | 338 | static void __init exynos5_map_io(void) |
355 | { | 339 | { |
356 | iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); | 340 | iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); |
357 | |||
358 | s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0); | ||
359 | s3c_device_i2c0.resource[0].end = EXYNOS5_PA_IIC(0) + SZ_4K - 1; | ||
360 | s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC; | ||
361 | s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC; | ||
362 | |||
363 | s3c_sdhci_setname(0, "exynos4-sdhci"); | ||
364 | s3c_sdhci_setname(1, "exynos4-sdhci"); | ||
365 | s3c_sdhci_setname(2, "exynos4-sdhci"); | ||
366 | s3c_sdhci_setname(3, "exynos4-sdhci"); | ||
367 | |||
368 | /* The I2C bus controllers are directly compatible with s3c2440 */ | ||
369 | s3c_i2c0_setname("s3c2440-i2c"); | ||
370 | s3c_i2c1_setname("s3c2440-i2c"); | ||
371 | s3c_i2c2_setname("s3c2440-i2c"); | ||
372 | |||
373 | s3c64xx_spi_setname("exynos4210-spi"); | ||
374 | } | 341 | } |
375 | 342 | ||
376 | static void __init exynos4_init_clocks(int xtal) | 343 | static void __init exynos4_init_clocks(int xtal) |
@@ -589,7 +556,8 @@ static void __init combiner_init(void __iomem *combiner_base, | |||
589 | } | 556 | } |
590 | 557 | ||
591 | #ifdef CONFIG_OF | 558 | #ifdef CONFIG_OF |
592 | int __init combiner_of_init(struct device_node *np, struct device_node *parent) | 559 | static int __init combiner_of_init(struct device_node *np, |
560 | struct device_node *parent) | ||
593 | { | 561 | { |
594 | void __iomem *combiner_base; | 562 | void __iomem *combiner_base; |
595 | 563 | ||
@@ -729,7 +697,7 @@ static int __init exynos_init(void) | |||
729 | 697 | ||
730 | /* uart registration process */ | 698 | /* uart registration process */ |
731 | 699 | ||
732 | static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) | 700 | static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) |
733 | { | 701 | { |
734 | struct s3c2410_uartcfg *tcfg = cfg; | 702 | struct s3c2410_uartcfg *tcfg = cfg; |
735 | u32 ucnt; | 703 | u32 ucnt; |
@@ -737,10 +705,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
737 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) | 705 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) |
738 | tcfg->has_fracval = 1; | 706 | tcfg->has_fracval = 1; |
739 | 707 | ||
740 | if (soc_is_exynos5250()) | 708 | s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); |
741 | s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no); | ||
742 | else | ||
743 | s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); | ||
744 | } | 709 | } |
745 | 710 | ||
746 | static void __iomem *exynos_eint_base; | 711 | static void __iomem *exynos_eint_base; |
@@ -972,14 +937,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc) | |||
972 | struct irq_chip *chip = irq_get_chip(irq); | 937 | struct irq_chip *chip = irq_get_chip(irq); |
973 | 938 | ||
974 | chained_irq_enter(chip, desc); | 939 | chained_irq_enter(chip, desc); |
975 | chip->irq_mask(&desc->irq_data); | ||
976 | |||
977 | if (chip->irq_ack) | ||
978 | chip->irq_ack(&desc->irq_data); | ||
979 | |||
980 | generic_handle_irq(*irq_data); | 940 | generic_handle_irq(*irq_data); |
981 | |||
982 | chip->irq_unmask(&desc->irq_data); | ||
983 | chained_irq_exit(chip, desc); | 941 | chained_irq_exit(chip, desc); |
984 | } | 942 | } |
985 | 943 | ||
@@ -999,11 +957,14 @@ static int __init exynos_init_irq_eint(void) | |||
999 | * platforms switch over to using the pinctrl driver, the wakeup | 957 | * platforms switch over to using the pinctrl driver, the wakeup |
1000 | * interrupt support code here can be completely removed. | 958 | * interrupt support code here can be completely removed. |
1001 | */ | 959 | */ |
960 | static const struct of_device_id exynos_pinctrl_ids[] = { | ||
961 | { .compatible = "samsung,pinctrl-exynos4210", }, | ||
962 | { .compatible = "samsung,pinctrl-exynos4x12", }, | ||
963 | }; | ||
1002 | struct device_node *pctrl_np, *wkup_np; | 964 | struct device_node *pctrl_np, *wkup_np; |
1003 | const char *pctrl_compat = "samsung,pinctrl-exynos4210"; | ||
1004 | const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; | 965 | const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; |
1005 | 966 | ||
1006 | for_each_compatible_node(pctrl_np, NULL, pctrl_compat) { | 967 | for_each_matching_node(pctrl_np, exynos_pinctrl_ids) { |
1007 | if (of_device_is_available(pctrl_np)) { | 968 | if (of_device_is_available(pctrl_np)) { |
1008 | wkup_np = of_find_compatible_node(pctrl_np, NULL, | 969 | wkup_np = of_find_compatible_node(pctrl_np, NULL, |
1009 | wkup_compat); | 970 | wkup_compat); |