diff options
author | Andrew Victor <andrew@sanpeople.com> | 2006-09-27 04:44:11 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-28 06:52:05 -0400 |
commit | 72729910c38ca5b4736032c15dc3f9d48fe4f68a (patch) | |
tree | e7461ec8e0ff07d1634d7d7a467cb8454135a5c8 /arch/arm/mach-at91rm9200/devices.c | |
parent | 26f908186f923291999833e9d563259834bdca06 (diff) |
[ARM] 3865/1: AT91RM9200 header updates
This is more preparation for adding support for the new Atmel AT91SAM9
processors.
Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91rm9200/devices.c')
-rw-r--r-- | arch/arm/mach-at91rm9200/devices.c | 72 |
1 files changed, 36 insertions, 36 deletions
diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/devices.c index 4352acb88178..db7c684cdb63 100644 --- a/arch/arm/mach-at91rm9200/devices.c +++ b/arch/arm/mach-at91rm9200/devices.c | |||
@@ -35,13 +35,13 @@ static struct at91_usbh_data usbh_data; | |||
35 | 35 | ||
36 | static struct resource at91_usbh_resources[] = { | 36 | static struct resource at91_usbh_resources[] = { |
37 | [0] = { | 37 | [0] = { |
38 | .start = AT91_UHP_BASE, | 38 | .start = AT91RM9200_UHP_BASE, |
39 | .end = AT91_UHP_BASE + SZ_1M - 1, | 39 | .end = AT91RM9200_UHP_BASE + SZ_1M - 1, |
40 | .flags = IORESOURCE_MEM, | 40 | .flags = IORESOURCE_MEM, |
41 | }, | 41 | }, |
42 | [1] = { | 42 | [1] = { |
43 | .start = AT91_ID_UHP, | 43 | .start = AT91RM9200_ID_UHP, |
44 | .end = AT91_ID_UHP, | 44 | .end = AT91RM9200_ID_UHP, |
45 | .flags = IORESOURCE_IRQ, | 45 | .flags = IORESOURCE_IRQ, |
46 | }, | 46 | }, |
47 | }; | 47 | }; |
@@ -80,13 +80,13 @@ static struct at91_udc_data udc_data; | |||
80 | 80 | ||
81 | static struct resource at91_udc_resources[] = { | 81 | static struct resource at91_udc_resources[] = { |
82 | [0] = { | 82 | [0] = { |
83 | .start = AT91_BASE_UDP, | 83 | .start = AT91RM9200_BASE_UDP, |
84 | .end = AT91_BASE_UDP + SZ_16K - 1, | 84 | .end = AT91RM9200_BASE_UDP + SZ_16K - 1, |
85 | .flags = IORESOURCE_MEM, | 85 | .flags = IORESOURCE_MEM, |
86 | }, | 86 | }, |
87 | [1] = { | 87 | [1] = { |
88 | .start = AT91_ID_UDP, | 88 | .start = AT91RM9200_ID_UDP, |
89 | .end = AT91_ID_UDP, | 89 | .end = AT91RM9200_ID_UDP, |
90 | .flags = IORESOURCE_IRQ, | 90 | .flags = IORESOURCE_IRQ, |
91 | }, | 91 | }, |
92 | }; | 92 | }; |
@@ -131,13 +131,13 @@ static struct at91_eth_data eth_data; | |||
131 | 131 | ||
132 | static struct resource at91_eth_resources[] = { | 132 | static struct resource at91_eth_resources[] = { |
133 | [0] = { | 133 | [0] = { |
134 | .start = AT91_BASE_EMAC, | 134 | .start = AT91RM9200_BASE_EMAC, |
135 | .end = AT91_BASE_EMAC + SZ_16K - 1, | 135 | .end = AT91RM9200_BASE_EMAC + SZ_16K - 1, |
136 | .flags = IORESOURCE_MEM, | 136 | .flags = IORESOURCE_MEM, |
137 | }, | 137 | }, |
138 | [1] = { | 138 | [1] = { |
139 | .start = AT91_ID_EMAC, | 139 | .start = AT91RM9200_ID_EMAC, |
140 | .end = AT91_ID_EMAC, | 140 | .end = AT91RM9200_ID_EMAC, |
141 | .flags = IORESOURCE_IRQ, | 141 | .flags = IORESOURCE_IRQ, |
142 | }, | 142 | }, |
143 | }; | 143 | }; |
@@ -263,13 +263,13 @@ static struct at91_mmc_data mmc_data; | |||
263 | 263 | ||
264 | static struct resource at91_mmc_resources[] = { | 264 | static struct resource at91_mmc_resources[] = { |
265 | [0] = { | 265 | [0] = { |
266 | .start = AT91_BASE_MCI, | 266 | .start = AT91RM9200_BASE_MCI, |
267 | .end = AT91_BASE_MCI + SZ_16K - 1, | 267 | .end = AT91RM9200_BASE_MCI + SZ_16K - 1, |
268 | .flags = IORESOURCE_MEM, | 268 | .flags = IORESOURCE_MEM, |
269 | }, | 269 | }, |
270 | [1] = { | 270 | [1] = { |
271 | .start = AT91_ID_MCI, | 271 | .start = AT91RM9200_ID_MCI, |
272 | .end = AT91_ID_MCI, | 272 | .end = AT91RM9200_ID_MCI, |
273 | .flags = IORESOURCE_IRQ, | 273 | .flags = IORESOURCE_IRQ, |
274 | }, | 274 | }, |
275 | }; | 275 | }; |
@@ -423,13 +423,13 @@ static u64 spi_dmamask = 0xffffffffUL; | |||
423 | 423 | ||
424 | static struct resource at91_spi_resources[] = { | 424 | static struct resource at91_spi_resources[] = { |
425 | [0] = { | 425 | [0] = { |
426 | .start = AT91_BASE_SPI, | 426 | .start = AT91RM9200_BASE_SPI, |
427 | .end = AT91_BASE_SPI + SZ_16K - 1, | 427 | .end = AT91RM9200_BASE_SPI + SZ_16K - 1, |
428 | .flags = IORESOURCE_MEM, | 428 | .flags = IORESOURCE_MEM, |
429 | }, | 429 | }, |
430 | [1] = { | 430 | [1] = { |
431 | .start = AT91_ID_SPI, | 431 | .start = AT91RM9200_ID_SPI, |
432 | .end = AT91_ID_SPI, | 432 | .end = AT91RM9200_ID_SPI, |
433 | .flags = IORESOURCE_IRQ, | 433 | .flags = IORESOURCE_IRQ, |
434 | }, | 434 | }, |
435 | }; | 435 | }; |
@@ -582,13 +582,13 @@ static inline void configure_dbgu_pins(void) | |||
582 | 582 | ||
583 | static struct resource uart0_resources[] = { | 583 | static struct resource uart0_resources[] = { |
584 | [0] = { | 584 | [0] = { |
585 | .start = AT91_BASE_US0, | 585 | .start = AT91RM9200_BASE_US0, |
586 | .end = AT91_BASE_US0 + SZ_16K - 1, | 586 | .end = AT91RM9200_BASE_US0 + SZ_16K - 1, |
587 | .flags = IORESOURCE_MEM, | 587 | .flags = IORESOURCE_MEM, |
588 | }, | 588 | }, |
589 | [1] = { | 589 | [1] = { |
590 | .start = AT91_ID_US0, | 590 | .start = AT91RM9200_ID_US0, |
591 | .end = AT91_ID_US0, | 591 | .end = AT91RM9200_ID_US0, |
592 | .flags = IORESOURCE_IRQ, | 592 | .flags = IORESOURCE_IRQ, |
593 | }, | 593 | }, |
594 | }; | 594 | }; |
@@ -624,13 +624,13 @@ static inline void configure_usart0_pins(void) | |||
624 | 624 | ||
625 | static struct resource uart1_resources[] = { | 625 | static struct resource uart1_resources[] = { |
626 | [0] = { | 626 | [0] = { |
627 | .start = AT91_BASE_US1, | 627 | .start = AT91RM9200_BASE_US1, |
628 | .end = AT91_BASE_US1 + SZ_16K - 1, | 628 | .end = AT91RM9200_BASE_US1 + SZ_16K - 1, |
629 | .flags = IORESOURCE_MEM, | 629 | .flags = IORESOURCE_MEM, |
630 | }, | 630 | }, |
631 | [1] = { | 631 | [1] = { |
632 | .start = AT91_ID_US1, | 632 | .start = AT91RM9200_ID_US1, |
633 | .end = AT91_ID_US1, | 633 | .end = AT91RM9200_ID_US1, |
634 | .flags = IORESOURCE_IRQ, | 634 | .flags = IORESOURCE_IRQ, |
635 | }, | 635 | }, |
636 | }; | 636 | }; |
@@ -665,13 +665,13 @@ static inline void configure_usart1_pins(void) | |||
665 | 665 | ||
666 | static struct resource uart2_resources[] = { | 666 | static struct resource uart2_resources[] = { |
667 | [0] = { | 667 | [0] = { |
668 | .start = AT91_BASE_US2, | 668 | .start = AT91RM9200_BASE_US2, |
669 | .end = AT91_BASE_US2 + SZ_16K - 1, | 669 | .end = AT91RM9200_BASE_US2 + SZ_16K - 1, |
670 | .flags = IORESOURCE_MEM, | 670 | .flags = IORESOURCE_MEM, |
671 | }, | 671 | }, |
672 | [1] = { | 672 | [1] = { |
673 | .start = AT91_ID_US2, | 673 | .start = AT91RM9200_ID_US2, |
674 | .end = AT91_ID_US2, | 674 | .end = AT91RM9200_ID_US2, |
675 | .flags = IORESOURCE_IRQ, | 675 | .flags = IORESOURCE_IRQ, |
676 | }, | 676 | }, |
677 | }; | 677 | }; |
@@ -700,13 +700,13 @@ static inline void configure_usart2_pins(void) | |||
700 | 700 | ||
701 | static struct resource uart3_resources[] = { | 701 | static struct resource uart3_resources[] = { |
702 | [0] = { | 702 | [0] = { |
703 | .start = AT91_BASE_US3, | 703 | .start = AT91RM9200_BASE_US3, |
704 | .end = AT91_BASE_US3 + SZ_16K - 1, | 704 | .end = AT91RM9200_BASE_US3 + SZ_16K - 1, |
705 | .flags = IORESOURCE_MEM, | 705 | .flags = IORESOURCE_MEM, |
706 | }, | 706 | }, |
707 | [1] = { | 707 | [1] = { |
708 | .start = AT91_ID_US3, | 708 | .start = AT91RM9200_ID_US3, |
709 | .end = AT91_ID_US3, | 709 | .end = AT91RM9200_ID_US3, |
710 | .flags = IORESOURCE_IRQ, | 710 | .flags = IORESOURCE_IRQ, |
711 | }, | 711 | }, |
712 | }; | 712 | }; |