diff options
author | Andrew Victor <andrew@sanpeople.com> | 2006-09-27 04:44:11 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-28 06:52:05 -0400 |
commit | 72729910c38ca5b4736032c15dc3f9d48fe4f68a (patch) | |
tree | e7461ec8e0ff07d1634d7d7a467cb8454135a5c8 /arch/arm | |
parent | 26f908186f923291999833e9d563259834bdca06 (diff) |
[ARM] 3865/1: AT91RM9200 header updates
This is more preparation for adding support for the new Atmel AT91SAM9
processors.
Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-at91rm9200/at91rm9200.c | 32 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/clock.c | 28 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/devices.c | 72 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/gpio.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/irq.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/pm.c | 14 |
6 files changed, 83 insertions, 83 deletions
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c index 0985b1c42c7c..e21cb845d112 100644 --- a/arch/arm/mach-at91rm9200/at91rm9200.c +++ b/arch/arm/mach-at91rm9200/at91rm9200.c | |||
@@ -26,78 +26,78 @@ static struct map_desc at91rm9200_io_desc[] __initdata = { | |||
26 | .type = MT_DEVICE, | 26 | .type = MT_DEVICE, |
27 | }, { | 27 | }, { |
28 | .virtual = AT91_VA_BASE_SPI, | 28 | .virtual = AT91_VA_BASE_SPI, |
29 | .pfn = __phys_to_pfn(AT91_BASE_SPI), | 29 | .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI), |
30 | .length = SZ_16K, | 30 | .length = SZ_16K, |
31 | .type = MT_DEVICE, | 31 | .type = MT_DEVICE, |
32 | }, { | 32 | }, { |
33 | .virtual = AT91_VA_BASE_SSC2, | 33 | .virtual = AT91_VA_BASE_SSC2, |
34 | .pfn = __phys_to_pfn(AT91_BASE_SSC2), | 34 | .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC2), |
35 | .length = SZ_16K, | 35 | .length = SZ_16K, |
36 | .type = MT_DEVICE, | 36 | .type = MT_DEVICE, |
37 | }, { | 37 | }, { |
38 | .virtual = AT91_VA_BASE_SSC1, | 38 | .virtual = AT91_VA_BASE_SSC1, |
39 | .pfn = __phys_to_pfn(AT91_BASE_SSC1), | 39 | .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC1), |
40 | .length = SZ_16K, | 40 | .length = SZ_16K, |
41 | .type = MT_DEVICE, | 41 | .type = MT_DEVICE, |
42 | }, { | 42 | }, { |
43 | .virtual = AT91_VA_BASE_SSC0, | 43 | .virtual = AT91_VA_BASE_SSC0, |
44 | .pfn = __phys_to_pfn(AT91_BASE_SSC0), | 44 | .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC0), |
45 | .length = SZ_16K, | 45 | .length = SZ_16K, |
46 | .type = MT_DEVICE, | 46 | .type = MT_DEVICE, |
47 | }, { | 47 | }, { |
48 | .virtual = AT91_VA_BASE_US3, | 48 | .virtual = AT91_VA_BASE_US3, |
49 | .pfn = __phys_to_pfn(AT91_BASE_US3), | 49 | .pfn = __phys_to_pfn(AT91RM9200_BASE_US3), |
50 | .length = SZ_16K, | 50 | .length = SZ_16K, |
51 | .type = MT_DEVICE, | 51 | .type = MT_DEVICE, |
52 | }, { | 52 | }, { |
53 | .virtual = AT91_VA_BASE_US2, | 53 | .virtual = AT91_VA_BASE_US2, |
54 | .pfn = __phys_to_pfn(AT91_BASE_US2), | 54 | .pfn = __phys_to_pfn(AT91RM9200_BASE_US2), |
55 | .length = SZ_16K, | 55 | .length = SZ_16K, |
56 | .type = MT_DEVICE, | 56 | .type = MT_DEVICE, |
57 | }, { | 57 | }, { |
58 | .virtual = AT91_VA_BASE_US1, | 58 | .virtual = AT91_VA_BASE_US1, |
59 | .pfn = __phys_to_pfn(AT91_BASE_US1), | 59 | .pfn = __phys_to_pfn(AT91RM9200_BASE_US1), |
60 | .length = SZ_16K, | 60 | .length = SZ_16K, |
61 | .type = MT_DEVICE, | 61 | .type = MT_DEVICE, |
62 | }, { | 62 | }, { |
63 | .virtual = AT91_VA_BASE_US0, | 63 | .virtual = AT91_VA_BASE_US0, |
64 | .pfn = __phys_to_pfn(AT91_BASE_US0), | 64 | .pfn = __phys_to_pfn(AT91RM9200_BASE_US0), |
65 | .length = SZ_16K, | 65 | .length = SZ_16K, |
66 | .type = MT_DEVICE, | 66 | .type = MT_DEVICE, |
67 | }, { | 67 | }, { |
68 | .virtual = AT91_VA_BASE_EMAC, | 68 | .virtual = AT91_VA_BASE_EMAC, |
69 | .pfn = __phys_to_pfn(AT91_BASE_EMAC), | 69 | .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), |
70 | .length = SZ_16K, | 70 | .length = SZ_16K, |
71 | .type = MT_DEVICE, | 71 | .type = MT_DEVICE, |
72 | }, { | 72 | }, { |
73 | .virtual = AT91_VA_BASE_TWI, | 73 | .virtual = AT91_VA_BASE_TWI, |
74 | .pfn = __phys_to_pfn(AT91_BASE_TWI), | 74 | .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI), |
75 | .length = SZ_16K, | 75 | .length = SZ_16K, |
76 | .type = MT_DEVICE, | 76 | .type = MT_DEVICE, |
77 | }, { | 77 | }, { |
78 | .virtual = AT91_VA_BASE_MCI, | 78 | .virtual = AT91_VA_BASE_MCI, |
79 | .pfn = __phys_to_pfn(AT91_BASE_MCI), | 79 | .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI), |
80 | .length = SZ_16K, | 80 | .length = SZ_16K, |
81 | .type = MT_DEVICE, | 81 | .type = MT_DEVICE, |
82 | }, { | 82 | }, { |
83 | .virtual = AT91_VA_BASE_UDP, | 83 | .virtual = AT91_VA_BASE_UDP, |
84 | .pfn = __phys_to_pfn(AT91_BASE_UDP), | 84 | .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP), |
85 | .length = SZ_16K, | 85 | .length = SZ_16K, |
86 | .type = MT_DEVICE, | 86 | .type = MT_DEVICE, |
87 | }, { | 87 | }, { |
88 | .virtual = AT91_VA_BASE_TCB1, | 88 | .virtual = AT91_VA_BASE_TCB1, |
89 | .pfn = __phys_to_pfn(AT91_BASE_TCB1), | 89 | .pfn = __phys_to_pfn(AT91RM9200_BASE_TCB1), |
90 | .length = SZ_16K, | 90 | .length = SZ_16K, |
91 | .type = MT_DEVICE, | 91 | .type = MT_DEVICE, |
92 | }, { | 92 | }, { |
93 | .virtual = AT91_VA_BASE_TCB0, | 93 | .virtual = AT91_VA_BASE_TCB0, |
94 | .pfn = __phys_to_pfn(AT91_BASE_TCB0), | 94 | .pfn = __phys_to_pfn(AT91RM9200_BASE_TCB0), |
95 | .length = SZ_16K, | 95 | .length = SZ_16K, |
96 | .type = MT_DEVICE, | 96 | .type = MT_DEVICE, |
97 | }, { | 97 | }, { |
98 | .virtual = AT91_SRAM_VIRT_BASE, | 98 | .virtual = AT91_SRAM_VIRT_BASE, |
99 | .pfn = __phys_to_pfn(AT91_SRAM_BASE), | 99 | .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE), |
100 | .length = AT91_SRAM_SIZE, | 100 | .length = AT91RM9200_SRAM_SIZE, |
101 | .type = MT_DEVICE, | 101 | .type = MT_DEVICE, |
102 | }, | 102 | }, |
103 | }; | 103 | }; |
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c index edc2cc837ae6..5b7892277bee 100644 --- a/arch/arm/mach-at91rm9200/clock.c +++ b/arch/arm/mach-at91rm9200/clock.c | |||
@@ -190,85 +190,85 @@ static void pmc_periph_mode(struct clk *clk, int is_on) | |||
190 | static struct clk udc_clk = { | 190 | static struct clk udc_clk = { |
191 | .name = "udc_clk", | 191 | .name = "udc_clk", |
192 | .parent = &mck, | 192 | .parent = &mck, |
193 | .pmc_mask = 1 << AT91_ID_UDP, | 193 | .pmc_mask = 1 << AT91RM9200_ID_UDP, |
194 | .mode = pmc_periph_mode, | 194 | .mode = pmc_periph_mode, |
195 | }; | 195 | }; |
196 | static struct clk ohci_clk = { | 196 | static struct clk ohci_clk = { |
197 | .name = "ohci_clk", | 197 | .name = "ohci_clk", |
198 | .parent = &mck, | 198 | .parent = &mck, |
199 | .pmc_mask = 1 << AT91_ID_UHP, | 199 | .pmc_mask = 1 << AT91RM9200_ID_UHP, |
200 | .mode = pmc_periph_mode, | 200 | .mode = pmc_periph_mode, |
201 | }; | 201 | }; |
202 | static struct clk ether_clk = { | 202 | static struct clk ether_clk = { |
203 | .name = "ether_clk", | 203 | .name = "ether_clk", |
204 | .parent = &mck, | 204 | .parent = &mck, |
205 | .pmc_mask = 1 << AT91_ID_EMAC, | 205 | .pmc_mask = 1 << AT91RM9200_ID_EMAC, |
206 | .mode = pmc_periph_mode, | 206 | .mode = pmc_periph_mode, |
207 | }; | 207 | }; |
208 | static struct clk mmc_clk = { | 208 | static struct clk mmc_clk = { |
209 | .name = "mci_clk", | 209 | .name = "mci_clk", |
210 | .parent = &mck, | 210 | .parent = &mck, |
211 | .pmc_mask = 1 << AT91_ID_MCI, | 211 | .pmc_mask = 1 << AT91RM9200_ID_MCI, |
212 | .mode = pmc_periph_mode, | 212 | .mode = pmc_periph_mode, |
213 | }; | 213 | }; |
214 | static struct clk twi_clk = { | 214 | static struct clk twi_clk = { |
215 | .name = "twi_clk", | 215 | .name = "twi_clk", |
216 | .parent = &mck, | 216 | .parent = &mck, |
217 | .pmc_mask = 1 << AT91_ID_TWI, | 217 | .pmc_mask = 1 << AT91RM9200_ID_TWI, |
218 | .mode = pmc_periph_mode, | 218 | .mode = pmc_periph_mode, |
219 | }; | 219 | }; |
220 | static struct clk usart0_clk = { | 220 | static struct clk usart0_clk = { |
221 | .name = "usart0_clk", | 221 | .name = "usart0_clk", |
222 | .parent = &mck, | 222 | .parent = &mck, |
223 | .pmc_mask = 1 << AT91_ID_US0, | 223 | .pmc_mask = 1 << AT91RM9200_ID_US0, |
224 | .mode = pmc_periph_mode, | 224 | .mode = pmc_periph_mode, |
225 | }; | 225 | }; |
226 | static struct clk usart1_clk = { | 226 | static struct clk usart1_clk = { |
227 | .name = "usart1_clk", | 227 | .name = "usart1_clk", |
228 | .parent = &mck, | 228 | .parent = &mck, |
229 | .pmc_mask = 1 << AT91_ID_US1, | 229 | .pmc_mask = 1 << AT91RM9200_ID_US1, |
230 | .mode = pmc_periph_mode, | 230 | .mode = pmc_periph_mode, |
231 | }; | 231 | }; |
232 | static struct clk usart2_clk = { | 232 | static struct clk usart2_clk = { |
233 | .name = "usart2_clk", | 233 | .name = "usart2_clk", |
234 | .parent = &mck, | 234 | .parent = &mck, |
235 | .pmc_mask = 1 << AT91_ID_US2, | 235 | .pmc_mask = 1 << AT91RM9200_ID_US2, |
236 | .mode = pmc_periph_mode, | 236 | .mode = pmc_periph_mode, |
237 | }; | 237 | }; |
238 | static struct clk usart3_clk = { | 238 | static struct clk usart3_clk = { |
239 | .name = "usart3_clk", | 239 | .name = "usart3_clk", |
240 | .parent = &mck, | 240 | .parent = &mck, |
241 | .pmc_mask = 1 << AT91_ID_US3, | 241 | .pmc_mask = 1 << AT91RM9200_ID_US3, |
242 | .mode = pmc_periph_mode, | 242 | .mode = pmc_periph_mode, |
243 | }; | 243 | }; |
244 | static struct clk spi_clk = { | 244 | static struct clk spi_clk = { |
245 | .name = "spi0_clk", | 245 | .name = "spi0_clk", |
246 | .parent = &mck, | 246 | .parent = &mck, |
247 | .pmc_mask = 1 << AT91_ID_SPI, | 247 | .pmc_mask = 1 << AT91RM9200_ID_SPI, |
248 | .mode = pmc_periph_mode, | 248 | .mode = pmc_periph_mode, |
249 | }; | 249 | }; |
250 | static struct clk pioA_clk = { | 250 | static struct clk pioA_clk = { |
251 | .name = "pioA_clk", | 251 | .name = "pioA_clk", |
252 | .parent = &mck, | 252 | .parent = &mck, |
253 | .pmc_mask = 1 << AT91_ID_PIOA, | 253 | .pmc_mask = 1 << AT91RM9200_ID_PIOA, |
254 | .mode = pmc_periph_mode, | 254 | .mode = pmc_periph_mode, |
255 | }; | 255 | }; |
256 | static struct clk pioB_clk = { | 256 | static struct clk pioB_clk = { |
257 | .name = "pioB_clk", | 257 | .name = "pioB_clk", |
258 | .parent = &mck, | 258 | .parent = &mck, |
259 | .pmc_mask = 1 << AT91_ID_PIOB, | 259 | .pmc_mask = 1 << AT91RM9200_ID_PIOB, |
260 | .mode = pmc_periph_mode, | 260 | .mode = pmc_periph_mode, |
261 | }; | 261 | }; |
262 | static struct clk pioC_clk = { | 262 | static struct clk pioC_clk = { |
263 | .name = "pioC_clk", | 263 | .name = "pioC_clk", |
264 | .parent = &mck, | 264 | .parent = &mck, |
265 | .pmc_mask = 1 << AT91_ID_PIOC, | 265 | .pmc_mask = 1 << AT91RM9200_ID_PIOC, |
266 | .mode = pmc_periph_mode, | 266 | .mode = pmc_periph_mode, |
267 | }; | 267 | }; |
268 | static struct clk pioD_clk = { | 268 | static struct clk pioD_clk = { |
269 | .name = "pioD_clk", | 269 | .name = "pioD_clk", |
270 | .parent = &mck, | 270 | .parent = &mck, |
271 | .pmc_mask = 1 << AT91_ID_PIOD, | 271 | .pmc_mask = 1 << AT91RM9200_ID_PIOD, |
272 | .mode = pmc_periph_mode, | 272 | .mode = pmc_periph_mode, |
273 | }; | 273 | }; |
274 | 274 | ||
diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/devices.c index 4352acb88178..db7c684cdb63 100644 --- a/arch/arm/mach-at91rm9200/devices.c +++ b/arch/arm/mach-at91rm9200/devices.c | |||
@@ -35,13 +35,13 @@ static struct at91_usbh_data usbh_data; | |||
35 | 35 | ||
36 | static struct resource at91_usbh_resources[] = { | 36 | static struct resource at91_usbh_resources[] = { |
37 | [0] = { | 37 | [0] = { |
38 | .start = AT91_UHP_BASE, | 38 | .start = AT91RM9200_UHP_BASE, |
39 | .end = AT91_UHP_BASE + SZ_1M - 1, | 39 | .end = AT91RM9200_UHP_BASE + SZ_1M - 1, |
40 | .flags = IORESOURCE_MEM, | 40 | .flags = IORESOURCE_MEM, |
41 | }, | 41 | }, |
42 | [1] = { | 42 | [1] = { |
43 | .start = AT91_ID_UHP, | 43 | .start = AT91RM9200_ID_UHP, |
44 | .end = AT91_ID_UHP, | 44 | .end = AT91RM9200_ID_UHP, |
45 | .flags = IORESOURCE_IRQ, | 45 | .flags = IORESOURCE_IRQ, |
46 | }, | 46 | }, |
47 | }; | 47 | }; |
@@ -80,13 +80,13 @@ static struct at91_udc_data udc_data; | |||
80 | 80 | ||
81 | static struct resource at91_udc_resources[] = { | 81 | static struct resource at91_udc_resources[] = { |
82 | [0] = { | 82 | [0] = { |
83 | .start = AT91_BASE_UDP, | 83 | .start = AT91RM9200_BASE_UDP, |
84 | .end = AT91_BASE_UDP + SZ_16K - 1, | 84 | .end = AT91RM9200_BASE_UDP + SZ_16K - 1, |
85 | .flags = IORESOURCE_MEM, | 85 | .flags = IORESOURCE_MEM, |
86 | }, | 86 | }, |
87 | [1] = { | 87 | [1] = { |
88 | .start = AT91_ID_UDP, | 88 | .start = AT91RM9200_ID_UDP, |
89 | .end = AT91_ID_UDP, | 89 | .end = AT91RM9200_ID_UDP, |
90 | .flags = IORESOURCE_IRQ, | 90 | .flags = IORESOURCE_IRQ, |
91 | }, | 91 | }, |
92 | }; | 92 | }; |
@@ -131,13 +131,13 @@ static struct at91_eth_data eth_data; | |||
131 | 131 | ||
132 | static struct resource at91_eth_resources[] = { | 132 | static struct resource at91_eth_resources[] = { |
133 | [0] = { | 133 | [0] = { |
134 | .start = AT91_BASE_EMAC, | 134 | .start = AT91RM9200_BASE_EMAC, |
135 | .end = AT91_BASE_EMAC + SZ_16K - 1, | 135 | .end = AT91RM9200_BASE_EMAC + SZ_16K - 1, |
136 | .flags = IORESOURCE_MEM, | 136 | .flags = IORESOURCE_MEM, |
137 | }, | 137 | }, |
138 | [1] = { | 138 | [1] = { |
139 | .start = AT91_ID_EMAC, | 139 | .start = AT91RM9200_ID_EMAC, |
140 | .end = AT91_ID_EMAC, | 140 | .end = AT91RM9200_ID_EMAC, |
141 | .flags = IORESOURCE_IRQ, | 141 | .flags = IORESOURCE_IRQ, |
142 | }, | 142 | }, |
143 | }; | 143 | }; |
@@ -263,13 +263,13 @@ static struct at91_mmc_data mmc_data; | |||
263 | 263 | ||
264 | static struct resource at91_mmc_resources[] = { | 264 | static struct resource at91_mmc_resources[] = { |
265 | [0] = { | 265 | [0] = { |
266 | .start = AT91_BASE_MCI, | 266 | .start = AT91RM9200_BASE_MCI, |
267 | .end = AT91_BASE_MCI + SZ_16K - 1, | 267 | .end = AT91RM9200_BASE_MCI + SZ_16K - 1, |
268 | .flags = IORESOURCE_MEM, | 268 | .flags = IORESOURCE_MEM, |
269 | }, | 269 | }, |
270 | [1] = { | 270 | [1] = { |
271 | .start = AT91_ID_MCI, | 271 | .start = AT91RM9200_ID_MCI, |
272 | .end = AT91_ID_MCI, | 272 | .end = AT91RM9200_ID_MCI, |
273 | .flags = IORESOURCE_IRQ, | 273 | .flags = IORESOURCE_IRQ, |
274 | }, | 274 | }, |
275 | }; | 275 | }; |
@@ -423,13 +423,13 @@ static u64 spi_dmamask = 0xffffffffUL; | |||
423 | 423 | ||
424 | static struct resource at91_spi_resources[] = { | 424 | static struct resource at91_spi_resources[] = { |
425 | [0] = { | 425 | [0] = { |
426 | .start = AT91_BASE_SPI, | 426 | .start = AT91RM9200_BASE_SPI, |
427 | .end = AT91_BASE_SPI + SZ_16K - 1, | 427 | .end = AT91RM9200_BASE_SPI + SZ_16K - 1, |
428 | .flags = IORESOURCE_MEM, | 428 | .flags = IORESOURCE_MEM, |
429 | }, | 429 | }, |
430 | [1] = { | 430 | [1] = { |
431 | .start = AT91_ID_SPI, | 431 | .start = AT91RM9200_ID_SPI, |
432 | .end = AT91_ID_SPI, | 432 | .end = AT91RM9200_ID_SPI, |
433 | .flags = IORESOURCE_IRQ, | 433 | .flags = IORESOURCE_IRQ, |
434 | }, | 434 | }, |
435 | }; | 435 | }; |
@@ -582,13 +582,13 @@ static inline void configure_dbgu_pins(void) | |||
582 | 582 | ||
583 | static struct resource uart0_resources[] = { | 583 | static struct resource uart0_resources[] = { |
584 | [0] = { | 584 | [0] = { |
585 | .start = AT91_BASE_US0, | 585 | .start = AT91RM9200_BASE_US0, |
586 | .end = AT91_BASE_US0 + SZ_16K - 1, | 586 | .end = AT91RM9200_BASE_US0 + SZ_16K - 1, |
587 | .flags = IORESOURCE_MEM, | 587 | .flags = IORESOURCE_MEM, |
588 | }, | 588 | }, |
589 | [1] = { | 589 | [1] = { |
590 | .start = AT91_ID_US0, | 590 | .start = AT91RM9200_ID_US0, |
591 | .end = AT91_ID_US0, | 591 | .end = AT91RM9200_ID_US0, |
592 | .flags = IORESOURCE_IRQ, | 592 | .flags = IORESOURCE_IRQ, |
593 | }, | 593 | }, |
594 | }; | 594 | }; |
@@ -624,13 +624,13 @@ static inline void configure_usart0_pins(void) | |||
624 | 624 | ||
625 | static struct resource uart1_resources[] = { | 625 | static struct resource uart1_resources[] = { |
626 | [0] = { | 626 | [0] = { |
627 | .start = AT91_BASE_US1, | 627 | .start = AT91RM9200_BASE_US1, |
628 | .end = AT91_BASE_US1 + SZ_16K - 1, | 628 | .end = AT91RM9200_BASE_US1 + SZ_16K - 1, |
629 | .flags = IORESOURCE_MEM, | 629 | .flags = IORESOURCE_MEM, |
630 | }, | 630 | }, |
631 | [1] = { | 631 | [1] = { |
632 | .start = AT91_ID_US1, | 632 | .start = AT91RM9200_ID_US1, |
633 | .end = AT91_ID_US1, | 633 | .end = AT91RM9200_ID_US1, |
634 | .flags = IORESOURCE_IRQ, | 634 | .flags = IORESOURCE_IRQ, |
635 | }, | 635 | }, |
636 | }; | 636 | }; |
@@ -665,13 +665,13 @@ static inline void configure_usart1_pins(void) | |||
665 | 665 | ||
666 | static struct resource uart2_resources[] = { | 666 | static struct resource uart2_resources[] = { |
667 | [0] = { | 667 | [0] = { |
668 | .start = AT91_BASE_US2, | 668 | .start = AT91RM9200_BASE_US2, |
669 | .end = AT91_BASE_US2 + SZ_16K - 1, | 669 | .end = AT91RM9200_BASE_US2 + SZ_16K - 1, |
670 | .flags = IORESOURCE_MEM, | 670 | .flags = IORESOURCE_MEM, |
671 | }, | 671 | }, |
672 | [1] = { | 672 | [1] = { |
673 | .start = AT91_ID_US2, | 673 | .start = AT91RM9200_ID_US2, |
674 | .end = AT91_ID_US2, | 674 | .end = AT91RM9200_ID_US2, |
675 | .flags = IORESOURCE_IRQ, | 675 | .flags = IORESOURCE_IRQ, |
676 | }, | 676 | }, |
677 | }; | 677 | }; |
@@ -700,13 +700,13 @@ static inline void configure_usart2_pins(void) | |||
700 | 700 | ||
701 | static struct resource uart3_resources[] = { | 701 | static struct resource uart3_resources[] = { |
702 | [0] = { | 702 | [0] = { |
703 | .start = AT91_BASE_US3, | 703 | .start = AT91RM9200_BASE_US3, |
704 | .end = AT91_BASE_US3 + SZ_16K - 1, | 704 | .end = AT91RM9200_BASE_US3 + SZ_16K - 1, |
705 | .flags = IORESOURCE_MEM, | 705 | .flags = IORESOURCE_MEM, |
706 | }, | 706 | }, |
707 | [1] = { | 707 | [1] = { |
708 | .start = AT91_ID_US3, | 708 | .start = AT91RM9200_ID_US3, |
709 | .end = AT91_ID_US3, | 709 | .end = AT91RM9200_ID_US3, |
710 | .flags = IORESOURCE_IRQ, | 710 | .flags = IORESOURCE_IRQ, |
711 | }, | 711 | }, |
712 | }; | 712 | }; |
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index cec199fd6721..8476cb8856c9 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c | |||
@@ -261,10 +261,10 @@ void at91_gpio_suspend(void) | |||
261 | at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]); | 261 | at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]); |
262 | 262 | ||
263 | if (!wakeups[i]) { | 263 | if (!wakeups[i]) { |
264 | disable_irq_wake(AT91_ID_PIOA + i); | 264 | disable_irq_wake(AT91RM9200_ID_PIOA + i); |
265 | at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i)); | 265 | at91_sys_write(AT91_PMC_PCDR, 1 << (AT91RM9200_ID_PIOA + i)); |
266 | } else { | 266 | } else { |
267 | enable_irq_wake(AT91_ID_PIOA + i); | 267 | enable_irq_wake(AT91RM9200_ID_PIOA + i); |
268 | #ifdef CONFIG_PM_DEBUG | 268 | #ifdef CONFIG_PM_DEBUG |
269 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]); | 269 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]); |
270 | #endif | 270 | #endif |
@@ -282,10 +282,10 @@ void at91_gpio_resume(void) | |||
282 | } | 282 | } |
283 | 283 | ||
284 | at91_sys_write(AT91_PMC_PCER, | 284 | at91_sys_write(AT91_PMC_PCER, |
285 | (1 << AT91_ID_PIOA) | 285 | (1 << AT91RM9200_ID_PIOA) |
286 | | (1 << AT91_ID_PIOB) | 286 | | (1 << AT91RM9200_ID_PIOB) |
287 | | (1 << AT91_ID_PIOC) | 287 | | (1 << AT91RM9200_ID_PIOC) |
288 | | (1 << AT91_ID_PIOD)); | 288 | | (1 << AT91RM9200_ID_PIOD)); |
289 | } | 289 | } |
290 | 290 | ||
291 | #else | 291 | #else |
@@ -384,7 +384,7 @@ void __init at91_gpio_irq_setup(unsigned banks) | |||
384 | 384 | ||
385 | if (banks > 4) | 385 | if (banks > 4) |
386 | banks = 4; | 386 | banks = 4; |
387 | for (pioc = 0, pin = PIN_BASE, id = AT91_ID_PIOA; | 387 | for (pioc = 0, pin = PIN_BASE, id = AT91RM9200_ID_PIOA; |
388 | pioc < banks; | 388 | pioc < banks; |
389 | pioc++, id++) { | 389 | pioc++, id++) { |
390 | void __iomem *controller; | 390 | void __iomem *controller; |
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c index c3a5e777f9f8..8cd60a99c5b8 100644 --- a/arch/arm/mach-at91rm9200/irq.c +++ b/arch/arm/mach-at91rm9200/irq.c | |||
@@ -61,12 +61,12 @@ static int at91_aic_set_type(unsigned irq, unsigned type) | |||
61 | srctype = AT91_AIC_SRCTYPE_RISING; | 61 | srctype = AT91_AIC_SRCTYPE_RISING; |
62 | break; | 62 | break; |
63 | case IRQT_LOW: | 63 | case IRQT_LOW: |
64 | if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */ | 64 | if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ |
65 | return -EINVAL; | 65 | return -EINVAL; |
66 | srctype = AT91_AIC_SRCTYPE_LOW; | 66 | srctype = AT91_AIC_SRCTYPE_LOW; |
67 | break; | 67 | break; |
68 | case IRQT_FALLING: | 68 | case IRQT_FALLING: |
69 | if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */ | 69 | if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ |
70 | return -EINVAL; | 70 | return -EINVAL; |
71 | srctype = AT91_AIC_SRCTYPE_FALLING; | 71 | srctype = AT91_AIC_SRCTYPE_FALLING; |
72 | break; | 72 | break; |
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c index 47e5480feb7e..32c95d8eaacf 100644 --- a/arch/arm/mach-at91rm9200/pm.c +++ b/arch/arm/mach-at91rm9200/pm.c | |||
@@ -123,13 +123,13 @@ static int at91_pm_enter(suspend_state_t state) | |||
123 | (at91_sys_read(AT91_PMC_PCSR) | 123 | (at91_sys_read(AT91_PMC_PCSR) |
124 | | (1 << AT91_ID_FIQ) | 124 | | (1 << AT91_ID_FIQ) |
125 | | (1 << AT91_ID_SYS) | 125 | | (1 << AT91_ID_SYS) |
126 | | (1 << AT91_ID_IRQ0) | 126 | | (1 << AT91RM9200_ID_IRQ0) |
127 | | (1 << AT91_ID_IRQ1) | 127 | | (1 << AT91RM9200_ID_IRQ1) |
128 | | (1 << AT91_ID_IRQ2) | 128 | | (1 << AT91RM9200_ID_IRQ2) |
129 | | (1 << AT91_ID_IRQ3) | 129 | | (1 << AT91RM9200_ID_IRQ3) |
130 | | (1 << AT91_ID_IRQ4) | 130 | | (1 << AT91RM9200_ID_IRQ4) |
131 | | (1 << AT91_ID_IRQ5) | 131 | | (1 << AT91RM9200_ID_IRQ5) |
132 | | (1 << AT91_ID_IRQ6)) | 132 | | (1 << AT91RM9200_ID_IRQ6)) |
133 | & at91_sys_read(AT91_AIC_IMR), | 133 | & at91_sys_read(AT91_AIC_IMR), |
134 | state); | 134 | state); |
135 | 135 | ||