diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 17:58:40 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 17:58:40 -0500 |
commit | b274776c54c320763bc12eb035c0e244f76ccb43 (patch) | |
tree | c75b70d0824a7ae029229b19d61884039abf2127 /arch/arm/include/asm/hardware | |
parent | b24174b0cbbe383c5bb6097aeb24480b8fd2d338 (diff) | |
parent | 3b1209e7994c4d31ff9932a7f566ae1c96b3c443 (diff) |
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Arnd Bergmann:
"A large number of cleanups, all over the platforms. This is dominated
largely by the Samsung platforms (s3c, s5p, exynos) and a few of the
others moving code out of arch/arm into more appropriate subsystems.
The clocksource and irqchip drivers are now abstracted to the point
where platforms that are already cleaned up do not need to even
specify the driver they use, it can all get configured from the device
tree as we do for normal device drivers. The clocksource changes
basically touch every single platform in the process.
We further clean up the use of platform specific header files here,
with the goal of turning more of the platforms over to being
"multiplatform" enabled, which implies that they cannot expose their
headers to architecture independent code any more.
It is expected that no functional changes are part of the cleanup.
The overall reduction in total code lines is mostly the result of
removing broken and obsolete code."
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits)
ARM: mvebu: correct gated clock documentation
ARM: kirkwood: add missing include for nsa310
ARM: exynos: move exynos4210-combiner to drivers/irqchip
mfd: db8500-prcmu: update resource passing
drivers/db8500-cpufreq: delete dangling include
ARM: at91: remove NEOCORE 926 board
sunxi: Cleanup the reset code and add meaningful registers defines
ARM: S3C24XX: header mach/regs-mem.h local
ARM: S3C24XX: header mach/regs-power.h local
ARM: S3C24XX: header mach/regs-s3c2412-mem.h local
ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/
ARM: S3C24XX: transform s3c2443 subirqs into new structure
ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs
ARM: S3C24XX: move s3c2443 irq code to irq.c
ARM: S3C24XX: transform s3c2416 irqs into new structure
ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs
ARM: S3C24XX: move s3c2416 irq init to common irq code
ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property
ARM: S3C24XX: Move irq syscore-ops to irq-pm
clocksource: always define CLOCKSOURCE_OF_DECLARE
...
Diffstat (limited to 'arch/arm/include/asm/hardware')
-rw-r--r-- | arch/arm/include/asm/hardware/gic.h | 57 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/vic.h | 57 |
2 files changed, 0 insertions, 114 deletions
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h deleted file mode 100644 index 4b1ce6cd477f..000000000000 --- a/arch/arm/include/asm/hardware/gic.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/hardware/gic.h | ||
3 | * | ||
4 | * Copyright (C) 2002 ARM Limited, All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_ARM_HARDWARE_GIC_H | ||
11 | #define __ASM_ARM_HARDWARE_GIC_H | ||
12 | |||
13 | #include <linux/compiler.h> | ||
14 | |||
15 | #define GIC_CPU_CTRL 0x00 | ||
16 | #define GIC_CPU_PRIMASK 0x04 | ||
17 | #define GIC_CPU_BINPOINT 0x08 | ||
18 | #define GIC_CPU_INTACK 0x0c | ||
19 | #define GIC_CPU_EOI 0x10 | ||
20 | #define GIC_CPU_RUNNINGPRI 0x14 | ||
21 | #define GIC_CPU_HIGHPRI 0x18 | ||
22 | |||
23 | #define GIC_DIST_CTRL 0x000 | ||
24 | #define GIC_DIST_CTR 0x004 | ||
25 | #define GIC_DIST_ENABLE_SET 0x100 | ||
26 | #define GIC_DIST_ENABLE_CLEAR 0x180 | ||
27 | #define GIC_DIST_PENDING_SET 0x200 | ||
28 | #define GIC_DIST_PENDING_CLEAR 0x280 | ||
29 | #define GIC_DIST_ACTIVE_BIT 0x300 | ||
30 | #define GIC_DIST_PRI 0x400 | ||
31 | #define GIC_DIST_TARGET 0x800 | ||
32 | #define GIC_DIST_CONFIG 0xc00 | ||
33 | #define GIC_DIST_SOFTINT 0xf00 | ||
34 | |||
35 | #ifndef __ASSEMBLY__ | ||
36 | #include <linux/irqdomain.h> | ||
37 | struct device_node; | ||
38 | |||
39 | extern struct irq_chip gic_arch_extn; | ||
40 | |||
41 | void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, | ||
42 | u32 offset, struct device_node *); | ||
43 | int gic_of_init(struct device_node *node, struct device_node *parent); | ||
44 | void gic_secondary_init(unsigned int); | ||
45 | void gic_handle_irq(struct pt_regs *regs); | ||
46 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); | ||
47 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); | ||
48 | |||
49 | static inline void gic_init(unsigned int nr, int start, | ||
50 | void __iomem *dist , void __iomem *cpu) | ||
51 | { | ||
52 | gic_init_bases(nr, start, dist, cpu, 0, NULL); | ||
53 | } | ||
54 | |||
55 | #endif | ||
56 | |||
57 | #endif | ||
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h deleted file mode 100644 index 2bebad36fc83..000000000000 --- a/arch/arm/include/asm/hardware/vic.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/hardware/vic.h | ||
3 | * | ||
4 | * Copyright (c) ARM Limited 2003. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARM_HARDWARE_VIC_H | ||
21 | #define __ASM_ARM_HARDWARE_VIC_H | ||
22 | |||
23 | #define VIC_IRQ_STATUS 0x00 | ||
24 | #define VIC_FIQ_STATUS 0x04 | ||
25 | #define VIC_RAW_STATUS 0x08 | ||
26 | #define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */ | ||
27 | #define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ | ||
28 | #define VIC_INT_ENABLE_CLEAR 0x14 | ||
29 | #define VIC_INT_SOFT 0x18 | ||
30 | #define VIC_INT_SOFT_CLEAR 0x1c | ||
31 | #define VIC_PROTECT 0x20 | ||
32 | #define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */ | ||
33 | #define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */ | ||
34 | |||
35 | #define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */ | ||
36 | #define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */ | ||
37 | #define VIC_ITCR 0x300 /* VIC test control register */ | ||
38 | |||
39 | #define VIC_VECT_CNTL_ENABLE (1 << 5) | ||
40 | |||
41 | #define VIC_PL192_VECT_ADDR 0xF00 | ||
42 | |||
43 | #ifndef __ASSEMBLY__ | ||
44 | #include <linux/compiler.h> | ||
45 | #include <linux/types.h> | ||
46 | |||
47 | struct device_node; | ||
48 | struct pt_regs; | ||
49 | |||
50 | void __vic_init(void __iomem *base, int irq_start, u32 vic_sources, | ||
51 | u32 resume_sources, struct device_node *node); | ||
52 | void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); | ||
53 | int vic_of_init(struct device_node *node, struct device_node *parent); | ||
54 | void vic_handle_irq(struct pt_regs *regs); | ||
55 | |||
56 | #endif /* __ASSEMBLY__ */ | ||
57 | #endif | ||