aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2013-01-09 08:44:24 -0500
committerShawn Guo <shawn.guo@linaro.org>2013-02-10 10:25:44 -0500
commitb17d5169d52bde2c619fc254234ae3e3a6feb206 (patch)
tree3f3f8f567fca2270a2996cb335a11f88af7674c5 /arch/arm/boot
parent11ab21e90a4aa3e9bb33b345a12e63ceff742655 (diff)
ARM i.MX53: add dts for the TQ tqma53 module
The tqma53 is an embedded module that has some features on board (e.g. emmc), but mostly just provides access to them on its interface. Going along with the imx53.dtsi, the tqma53.dtsi specifies the existing devices and their pinctrl for this module. All devices that are not on the module are disabled by default and need to be enabled in a baseboard DT. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx53-tqma53.dtsi172
1 files changed, 172 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx53-tqma53.dtsi b/arch/arm/boot/dts/imx53-tqma53.dtsi
new file mode 100644
index 000000000000..8278ec5ec222
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-tqma53.dtsi
@@ -0,0 +1,172 @@
1/*
2 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
3 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/include/ "imx53.dtsi"
14
15/ {
16 model = "TQ TQMa53";
17 compatible = "tq,tqma53", "fsl,imx53";
18
19 memory {
20 reg = <0x70000000 0x40000000>; /* Up to 1GiB */
21 };
22
23 regulators {
24 compatible = "simple-bus";
25
26 reg_3p3v: 3p3v {
27 compatible = "regulator-fixed";
28 regulator-name = "3P3V";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 regulator-always-on;
32 };
33 };
34};
35
36&esdhc2 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_esdhc2_1>;
39 wp-gpios = <&gpio1 2 0>;
40 cd-gpios = <&gpio1 4 0>;
41 status = "disabled";
42};
43
44&uart3 {
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_uart3_2>;
47 status = "disabled";
48};
49
50&ecspi1 {
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_ecspi1_1>;
53 fsl,spi-num-chipselects = <4>;
54 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>,
55 <&gpio3 24 0>, <&gpio3 25 0>;
56 status = "disabled";
57};
58
59&esdhc3 { /* EMMC */
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_esdhc3_1>;
62 vmmc-supply = <&reg_3p3v>;
63 non-removable;
64 bus-width = <8>;
65 status = "okay";
66};
67
68&iomuxc {
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_hog>;
71
72 i2s {
73 pinctrl_i2s_1: i2s-grp1 {
74 fsl,pins = <
75 1 0x10000 /* I2S_MCLK */
76 10 0x10000 /* I2S_SCLK */
77 17 0x10000 /* I2S_DOUT */
78 23 0x10000 /* I2S_LRCLK*/
79 30 0x10000 /* I2S_DIN */
80 >;
81 };
82 };
83
84 hog {
85 pinctrl_hog: hoggrp {
86 fsl,pins = <
87 610 0x10000 /* MX53_PAD_EIM_CS1__IPU_DI1_PIN6 (VSYNC)*/
88 711 0x10000 /* MX53_PAD_EIM_DA15__IPU_DI1_PIN4 (HSYNC)*/
89 873 0x10000 /* MX53_PAD_PATA_DA_1__GPIO7_7 (LCD_BLT_EN)*/
90 878 0x10000 /* MX53_PAD_PATA_DA_2__GPIO7_8 (LCD_RESET)*/
91 922 0x10000 /* MX53_PAD_PATA_DATA5__GPIO2_5 (LCD_POWER)*/
92 928 0x10000 /* MX53_PAD_PATA_DATA6__GPIO2_6 (PMIC_INT)*/
93 982 0x10000 /* MX53_PAD_PATA_DATA14__GPIO2_14 (CSI_RST)*/
94 989 0x10000 /* MX53_PAD_PATA_DATA15__GPIO2_15 (CSI_PWDN)*/
95 1069 0x10000 /* MX53_PAD_GPIO_0__GPIO1_0 (SYSTEM_DOWN)*/
96 1093 0x10000 /* MX53_PAD_GPIO_3__GPIO1_3 */
97 >;
98 };
99 };
100};
101
102&uart1 {
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_uart1_2>;
105 fsl,uart-has-rtscts;
106 status = "disabled";
107};
108
109&uart2 {
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_uart2_1>;
112 status = "disabled";
113};
114
115&can1 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_can1_2>;
118 status = "disabled";
119};
120
121&can2 {
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_can2_1>;
124 status = "disabled";
125};
126
127&i2c3 {
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_i2c3_1>;
130 status = "disabled";
131};
132
133&cspi {
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_cspi_1>;
136 fsl,spi-num-chipselects = <3>;
137 cs-gpios = <&gpio1 18 0>, <&gpio1 19 0>,
138 <&gpio1 21 0>;
139 status = "disabled";
140};
141
142&i2c2 {
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_i2c2_1>;
145 status = "okay";
146
147 pmic: mc34708@8 {
148 compatible = "fsl,mc34708";
149 reg = <0x8>;
150 fsl,mc13xxx-uses-rtc;
151 interrupt-parent = <&gpio2>;
152 interrupts = <6 8>; /* PDATA_DATA6, low active */
153 };
154
155 sensor1: lm75@48 {
156 compatible = "lm75";
157 reg = <0x48>;
158 };
159
160 eeprom: 24c64@50 {
161 compatible = "at,24c64";
162 pagesize = <32>;
163 reg = <0x50>;
164 };
165};
166
167&fec {
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_fec_1>;
170 phy-mode = "rmii";
171 status = "disabled";
172};