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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2013-04-23 20:34:25 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2013-05-17 06:11:39 -0400
commitc9d0f317c6dc45f84888bc11947bc10e6c547dc3 (patch)
treeef4d865a48a66b378917b101c85eb011f5ca624b /arch/arm/boot/dts
parent0e4686e6e662205b87e64af7c0ba9ef81e2c8791 (diff)
ARM: at91: dt: switch to pinctrl to pre-processor
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi151
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi155
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi149
-rw-r--r--arch/arm/boot/dts/at91sam9263ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek_2mmc.dts2
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek_common.dtsi18
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi153
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts6
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi89
-rw-r--r--arch/arm/boot/dts/at91sam9n12ek.dts2
-rw-r--r--arch/arm/boot/dts/at91sam9x25.dtsi20
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi205
-rw-r--r--arch/arm/boot/dts/at91sam9x5cm.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9x5ek.dtsi4
-rw-r--r--arch/arm/boot/dts/pm9g45.dts6
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi448
-rw-r--r--arch/arm/boot/dts/sama5d3xdm.dtsi2
-rw-r--r--arch/arm/boot/dts/sama5d3xmb.dtsi12
18 files changed, 716 insertions, 712 deletions
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 7ebfe6c6c360..361a957767c4 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include "skeleton.dtsi" 13#include "skeleton.dtsi"
14#include <dt-bindings/pinctrl/at91.h>
14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/gpio/gpio.h>
15 16
16/ { 17/ {
@@ -168,227 +169,227 @@
168 dbgu { 169 dbgu {
169 pinctrl_dbgu: dbgu-0 { 170 pinctrl_dbgu: dbgu-0 {
170 atmel,pins = 171 atmel,pins =
171 <0 30 0x1 0x0 /* PA30 periph A */ 172 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
172 0 31 0x1 0x1>; /* PA31 periph with pullup */ 173 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
173 }; 174 };
174 }; 175 };
175 176
176 uart0 { 177 uart0 {
177 pinctrl_uart0: uart0-0 { 178 pinctrl_uart0: uart0-0 {
178 atmel,pins = 179 atmel,pins =
179 <0 17 0x1 0x0 /* PA17 periph A */ 180 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
180 0 18 0x1 0x0>; /* PA18 periph A */ 181 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
181 }; 182 };
182 183
183 pinctrl_uart0_rts: uart0_rts-0 { 184 pinctrl_uart0_rts: uart0_rts-0 {
184 atmel,pins = 185 atmel,pins =
185 <0 20 0x1 0x0>; /* PA20 periph A */ 186 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
186 }; 187 };
187 188
188 pinctrl_uart0_cts: uart0_cts-0 { 189 pinctrl_uart0_cts: uart0_cts-0 {
189 atmel,pins = 190 atmel,pins =
190 <0 21 0x1 0x0>; /* PA21 periph A */ 191 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
191 }; 192 };
192 }; 193 };
193 194
194 uart1 { 195 uart1 {
195 pinctrl_uart1: uart1-0 { 196 pinctrl_uart1: uart1-0 {
196 atmel,pins = 197 atmel,pins =
197 <1 20 0x1 0x1 /* PB20 periph A with pullup */ 198 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
198 1 21 0x1 0x0>; /* PB21 periph A */ 199 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
199 }; 200 };
200 201
201 pinctrl_uart1_rts: uart1_rts-0 { 202 pinctrl_uart1_rts: uart1_rts-0 {
202 atmel,pins = 203 atmel,pins =
203 <1 24 0x1 0x0>; /* PB24 periph A */ 204 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
204 }; 205 };
205 206
206 pinctrl_uart1_cts: uart1_cts-0 { 207 pinctrl_uart1_cts: uart1_cts-0 {
207 atmel,pins = 208 atmel,pins =
208 <1 26 0x1 0x0>; /* PB26 periph A */ 209 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
209 }; 210 };
210 211
211 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 { 212 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
212 atmel,pins = 213 atmel,pins =
213 <1 19 0x1 0x0 /* PB19 periph A */ 214 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
214 1 25 0x1 0x0>; /* PB25 periph A */ 215 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
215 }; 216 };
216 217
217 pinctrl_uart1_dcd: uart1_dcd-0 { 218 pinctrl_uart1_dcd: uart1_dcd-0 {
218 atmel,pins = 219 atmel,pins =
219 <1 23 0x1 0x0>; /* PB23 periph A */ 220 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
220 }; 221 };
221 222
222 pinctrl_uart1_ri: uart1_ri-0 { 223 pinctrl_uart1_ri: uart1_ri-0 {
223 atmel,pins = 224 atmel,pins =
224 <1 18 0x1 0x0>; /* PB18 periph A */ 225 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
225 }; 226 };
226 }; 227 };
227 228
228 uart2 { 229 uart2 {
229 pinctrl_uart2: uart2-0 { 230 pinctrl_uart2: uart2-0 {
230 atmel,pins = 231 atmel,pins =
231 <0 22 0x1 0x0 /* PA22 periph A */ 232 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
232 0 23 0x1 0x1>; /* PA23 periph A with pullup */ 233 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
233 }; 234 };
234 235
235 pinctrl_uart2_rts: uart2_rts-0 { 236 pinctrl_uart2_rts: uart2_rts-0 {
236 atmel,pins = 237 atmel,pins =
237 <0 30 0x2 0x0>; /* PA30 periph B */ 238 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
238 }; 239 };
239 240
240 pinctrl_uart2_cts: uart2_cts-0 { 241 pinctrl_uart2_cts: uart2_cts-0 {
241 atmel,pins = 242 atmel,pins =
242 <0 31 0x2 0x0>; /* PA31 periph B */ 243 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
243 }; 244 };
244 }; 245 };
245 246
246 uart3 { 247 uart3 {
247 pinctrl_uart3: uart3-0 { 248 pinctrl_uart3: uart3-0 {
248 atmel,pins = 249 atmel,pins =
249 <0 5 0x2 0x1 /* PA5 periph B with pullup */ 250 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
250 0 6 0x2 0x0>; /* PA6 periph B */ 251 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
251 }; 252 };
252 253
253 pinctrl_uart3_rts: uart3_rts-0 { 254 pinctrl_uart3_rts: uart3_rts-0 {
254 atmel,pins = 255 atmel,pins =
255 <1 0 0x2 0x0>; /* PB0 periph B */ 256 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
256 }; 257 };
257 258
258 pinctrl_uart3_cts: uart3_cts-0 { 259 pinctrl_uart3_cts: uart3_cts-0 {
259 atmel,pins = 260 atmel,pins =
260 <1 1 0x2 0x0>; /* PB1 periph B */ 261 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
261 }; 262 };
262 }; 263 };
263 264
264 nand { 265 nand {
265 pinctrl_nand: nand-0 { 266 pinctrl_nand: nand-0 {
266 atmel,pins = 267 atmel,pins =
267 <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */ 268 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
268 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */ 269 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
269 }; 270 };
270 }; 271 };
271 272
272 macb { 273 macb {
273 pinctrl_macb_rmii: macb_rmii-0 { 274 pinctrl_macb_rmii: macb_rmii-0 {
274 atmel,pins = 275 atmel,pins =
275 <0 7 0x1 0x0 /* PA7 periph A */ 276 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
276 0 8 0x1 0x0 /* PA8 periph A */ 277 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
277 0 9 0x1 0x0 /* PA9 periph A */ 278 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
278 0 10 0x1 0x0 /* PA10 periph A */ 279 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
279 0 11 0x1 0x0 /* PA11 periph A */ 280 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
280 0 12 0x1 0x0 /* PA12 periph A */ 281 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
281 0 13 0x1 0x0 /* PA13 periph A */ 282 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
282 0 14 0x1 0x0 /* PA14 periph A */ 283 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
283 0 15 0x1 0x0 /* PA15 periph A */ 284 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
284 0 16 0x1 0x0>; /* PA16 periph A */ 285 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
285 }; 286 };
286 287
287 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 288 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
288 atmel,pins = 289 atmel,pins =
289 <1 12 0x2 0x0 /* PB12 periph B */ 290 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
290 1 13 0x2 0x0 /* PB13 periph B */ 291 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
291 1 14 0x2 0x0 /* PB14 periph B */ 292 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
292 1 15 0x2 0x0 /* PB15 periph B */ 293 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
293 1 16 0x2 0x0 /* PB16 periph B */ 294 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
294 1 17 0x2 0x0 /* PB17 periph B */ 295 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
295 1 18 0x2 0x0 /* PB18 periph B */ 296 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
296 1 19 0x2 0x0>; /* PB19 periph B */ 297 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
297 }; 298 };
298 }; 299 };
299 300
300 mmc0 { 301 mmc0 {
301 pinctrl_mmc0_clk: mmc0_clk-0 { 302 pinctrl_mmc0_clk: mmc0_clk-0 {
302 atmel,pins = 303 atmel,pins =
303 <0 27 0x1 0x0>; /* PA27 periph A */ 304 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
304 }; 305 };
305 306
306 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 307 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
307 atmel,pins = 308 atmel,pins =
308 <0 28 0x1 0x1 /* PA28 periph A with pullup */ 309 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
309 0 29 0x1 0x1>; /* PA29 periph A with pullup */ 310 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
310 }; 311 };
311 312
312 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 313 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
313 atmel,pins = 314 atmel,pins =
314 <1 3 0x2 0x1 /* PB3 periph B with pullup */ 315 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
315 1 4 0x2 0x1 /* PB4 periph B with pullup */ 316 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
316 1 5 0x2 0x1>; /* PB5 periph B with pullup */ 317 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
317 }; 318 };
318 319
319 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 320 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
320 atmel,pins = 321 atmel,pins =
321 <0 8 0x2 0x1 /* PA8 periph B with pullup */ 322 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
322 0 9 0x2 0x1>; /* PA9 periph B with pullup */ 323 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
323 }; 324 };
324 325
325 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 326 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
326 atmel,pins = 327 atmel,pins =
327 <0 10 0x2 0x1 /* PA10 periph B with pullup */ 328 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
328 0 11 0x2 0x1 /* PA11 periph B with pullup */ 329 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
329 0 12 0x2 0x1>; /* PA12 periph B with pullup */ 330 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
330 }; 331 };
331 }; 332 };
332 333
333 ssc0 { 334 ssc0 {
334 pinctrl_ssc0_tx: ssc0_tx-0 { 335 pinctrl_ssc0_tx: ssc0_tx-0 {
335 atmel,pins = 336 atmel,pins =
336 <1 0 0x1 0x0 /* PB0 periph A */ 337 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
337 1 1 0x1 0x0 /* PB1 periph A */ 338 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
338 1 2 0x1 0x0>; /* PB2 periph A */ 339 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
339 }; 340 };
340 341
341 pinctrl_ssc0_rx: ssc0_rx-0 { 342 pinctrl_ssc0_rx: ssc0_rx-0 {
342 atmel,pins = 343 atmel,pins =
343 <1 3 0x1 0x0 /* PB3 periph A */ 344 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
344 1 4 0x1 0x0 /* PB4 periph A */ 345 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
345 1 5 0x1 0x0>; /* PB5 periph A */ 346 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
346 }; 347 };
347 }; 348 };
348 349
349 ssc1 { 350 ssc1 {
350 pinctrl_ssc1_tx: ssc1_tx-0 { 351 pinctrl_ssc1_tx: ssc1_tx-0 {
351 atmel,pins = 352 atmel,pins =
352 <1 6 0x1 0x0 /* PB6 periph A */ 353 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
353 1 7 0x1 0x0 /* PB7 periph A */ 354 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
354 1 8 0x1 0x0>; /* PB8 periph A */ 355 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
355 }; 356 };
356 357
357 pinctrl_ssc1_rx: ssc1_rx-0 { 358 pinctrl_ssc1_rx: ssc1_rx-0 {
358 atmel,pins = 359 atmel,pins =
359 <1 9 0x1 0x0 /* PB9 periph A */ 360 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
360 1 10 0x1 0x0 /* PB10 periph A */ 361 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
361 1 11 0x1 0x0>; /* PB11 periph A */ 362 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
362 }; 363 };
363 }; 364 };
364 365
365 ssc2 { 366 ssc2 {
366 pinctrl_ssc2_tx: ssc2_tx-0 { 367 pinctrl_ssc2_tx: ssc2_tx-0 {
367 atmel,pins = 368 atmel,pins =
368 <1 12 0x1 0x0 /* PB12 periph A */ 369 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
369 1 13 0x1 0x0 /* PB13 periph A */ 370 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
370 1 14 0x1 0x0>; /* PB14 periph A */ 371 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
371 }; 372 };
372 373
373 pinctrl_ssc2_rx: ssc2_rx-0 { 374 pinctrl_ssc2_rx: ssc2_rx-0 {
374 atmel,pins = 375 atmel,pins =
375 <1 15 0x1 0x0 /* PB15 periph A */ 376 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
376 1 16 0x1 0x0 /* PB16 periph A */ 377 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
377 1 17 0x1 0x0>; /* PB17 periph A */ 378 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
378 }; 379 };
379 }; 380 };
380 381
381 twi { 382 twi {
382 pinctrl_twi: twi-0 { 383 pinctrl_twi: twi-0 {
383 atmel,pins = 384 atmel,pins =
384 <0 25 0x1 0x2 /* PA25 periph A with multi drive */ 385 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
385 0 26 0x1 0x2>; /* PA26 periph A with multi drive */ 386 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
386 }; 387 };
387 388
388 pinctrl_twi_gpio: twi_gpio-0 { 389 pinctrl_twi_gpio: twi_gpio-0 {
389 atmel,pins = 390 atmel,pins =
390 <0 25 0x0 0x2 /* PA25 GPIO with multi drive */ 391 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
391 0 26 0x0 0x2>; /* PA26 GPIO with multi drive */ 392 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
392 }; 393 };
393 }; 394 };
394 395
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 717625d003ef..7edadf348915 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#include "skeleton.dtsi" 11#include "skeleton.dtsi"
12#include <dt-bindings/pinctrl/at91.h>
12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/gpio/gpio.h>
13 14
14/ { 15/ {
@@ -117,227 +118,227 @@
117 dbgu { 118 dbgu {
118 pinctrl_dbgu: dbgu-0 { 119 pinctrl_dbgu: dbgu-0 {
119 atmel,pins = 120 atmel,pins =
120 <1 14 0x1 0x0 /* PB14 periph A */ 121 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
121 1 15 0x1 0x1>; /* PB15 periph with pullup */ 122 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
122 }; 123 };
123 }; 124 };
124 125
125 usart0 { 126 usart0 {
126 pinctrl_usart0: usart0-0 { 127 pinctrl_usart0: usart0-0 {
127 atmel,pins = 128 atmel,pins =
128 <1 4 0x1 0x0 /* PB4 periph A */ 129 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
129 1 5 0x1 0x0>; /* PB5 periph A */ 130 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
130 }; 131 };
131 132
132 pinctrl_usart0_rts: usart0_rts-0 { 133 pinctrl_usart0_rts: usart0_rts-0 {
133 atmel,pins = 134 atmel,pins =
134 <1 26 0x1 0x0>; /* PB26 periph A */ 135 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
135 }; 136 };
136 137
137 pinctrl_usart0_cts: usart0_cts-0 { 138 pinctrl_usart0_cts: usart0_cts-0 {
138 atmel,pins = 139 atmel,pins =
139 <1 27 0x1 0x0>; /* PB27 periph A */ 140 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
140 }; 141 };
141 142
142 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { 143 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
143 atmel,pins = 144 atmel,pins =
144 <1 24 0x1 0x0 /* PB24 periph A */ 145 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
145 1 22 0x1 0x0>; /* PB22 periph A */ 146 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
146 }; 147 };
147 148
148 pinctrl_usart0_dcd: usart0_dcd-0 { 149 pinctrl_usart0_dcd: usart0_dcd-0 {
149 atmel,pins = 150 atmel,pins =
150 <1 23 0x1 0x0>; /* PB23 periph A */ 151 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
151 }; 152 };
152 153
153 pinctrl_usart0_ri: usart0_ri-0 { 154 pinctrl_usart0_ri: usart0_ri-0 {
154 atmel,pins = 155 atmel,pins =
155 <1 25 0x1 0x0>; /* PB25 periph A */ 156 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
156 }; 157 };
157 }; 158 };
158 159
159 usart1 { 160 usart1 {
160 pinctrl_usart1: usart1-0 { 161 pinctrl_usart1: usart1-0 {
161 atmel,pins = 162 atmel,pins =
162 <1 6 0x1 0x1 /* PB6 periph A with pullup */ 163 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
163 1 7 0x1 0x0>; /* PB7 periph A */ 164 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
164 }; 165 };
165 166
166 pinctrl_usart1_rts: usart1_rts-0 { 167 pinctrl_usart1_rts: usart1_rts-0 {
167 atmel,pins = 168 atmel,pins =
168 <1 28 0x1 0x0>; /* PB28 periph A */ 169 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
169 }; 170 };
170 171
171 pinctrl_usart1_cts: usart1_cts-0 { 172 pinctrl_usart1_cts: usart1_cts-0 {
172 atmel,pins = 173 atmel,pins =
173 <1 29 0x1 0x0>; /* PB29 periph A */ 174 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
174 }; 175 };
175 }; 176 };
176 177
177 usart2 { 178 usart2 {
178 pinctrl_usart2: usart2-0 { 179 pinctrl_usart2: usart2-0 {
179 atmel,pins = 180 atmel,pins =
180 <1 8 0x1 0x1 /* PB8 periph A with pullup */ 181 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
181 1 9 0x1 0x0>; /* PB9 periph A */ 182 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
182 }; 183 };
183 184
184 pinctrl_usart2_rts: usart2_rts-0 { 185 pinctrl_usart2_rts: usart2_rts-0 {
185 atmel,pins = 186 atmel,pins =
186 <0 4 0x1 0x0>; /* PA4 periph A */ 187 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
187 }; 188 };
188 189
189 pinctrl_usart2_cts: usart2_cts-0 { 190 pinctrl_usart2_cts: usart2_cts-0 {
190 atmel,pins = 191 atmel,pins =
191 <0 5 0x1 0x0>; /* PA5 periph A */ 192 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
192 }; 193 };
193 }; 194 };
194 195
195 usart3 { 196 usart3 {
196 pinctrl_usart3: usart3-0 { 197 pinctrl_usart3: usart3-0 {
197 atmel,pins = 198 atmel,pins =
198 <1 10 0x1 0x1 /* PB10 periph A with pullup */ 199 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
199 1 11 0x1 0x0>; /* PB11 periph A */ 200 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
200 }; 201 };
201 202
202 pinctrl_usart3_rts: usart3_rts-0 { 203 pinctrl_usart3_rts: usart3_rts-0 {
203 atmel,pins = 204 atmel,pins =
204 <2 8 0x2 0x0>; /* PC8 periph B */ 205 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */
205 }; 206 };
206 207
207 pinctrl_usart3_cts: usart3_cts-0 { 208 pinctrl_usart3_cts: usart3_cts-0 {
208 atmel,pins = 209 atmel,pins =
209 <2 10 0x2 0x0>; /* PC10 periph B */ 210 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
210 }; 211 };
211 }; 212 };
212 213
213 uart0 { 214 uart0 {
214 pinctrl_uart0: uart0-0 { 215 pinctrl_uart0: uart0-0 {
215 atmel,pins = 216 atmel,pins =
216 <0 31 0x2 0x1 /* PA31 periph B with pullup */ 217 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
217 0 30 0x2 0x0>; /* PA30 periph B */ 218 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
218 }; 219 };
219 }; 220 };
220 221
221 uart1 { 222 uart1 {
222 pinctrl_uart1: uart1-0 { 223 pinctrl_uart1: uart1-0 {
223 atmel,pins = 224 atmel,pins =
224 <1 12 0x1 0x1 /* PB12 periph A with pullup */ 225 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
225 1 13 0x1 0x0>; /* PB13 periph A */ 226 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
226 }; 227 };
227 }; 228 };
228 229
229 nand { 230 nand {
230 pinctrl_nand: nand-0 { 231 pinctrl_nand: nand-0 {
231 atmel,pins = 232 atmel,pins =
232 <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */ 233 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
233 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ 234 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
234 }; 235 };
235 }; 236 };
236 237
237 macb { 238 macb {
238 pinctrl_macb_rmii: macb_rmii-0 { 239 pinctrl_macb_rmii: macb_rmii-0 {
239 atmel,pins = 240 atmel,pins =
240 <0 12 0x1 0x0 /* PA12 periph A */ 241 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
241 0 13 0x1 0x0 /* PA13 periph A */ 242 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
242 0 14 0x1 0x0 /* PA14 periph A */ 243 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
243 0 15 0x1 0x0 /* PA15 periph A */ 244 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
244 0 16 0x1 0x0 /* PA16 periph A */ 245 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
245 0 17 0x1 0x0 /* PA17 periph A */ 246 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
246 0 18 0x1 0x0 /* PA18 periph A */ 247 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
247 0 19 0x1 0x0 /* PA19 periph A */ 248 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
248 0 20 0x1 0x0 /* PA20 periph A */ 249 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
249 0 21 0x1 0x0>; /* PA21 periph A */ 250 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
250 }; 251 };
251 252
252 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 253 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
253 atmel,pins = 254 atmel,pins =
254 <0 22 0x2 0x0 /* PA22 periph B */ 255 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
255 0 23 0x2 0x0 /* PA23 periph B */ 256 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
256 0 24 0x2 0x0 /* PA24 periph B */ 257 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
257 0 25 0x2 0x0 /* PA25 periph B */ 258 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
258 0 26 0x2 0x0 /* PA26 periph B */ 259 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
259 0 27 0x2 0x0 /* PA27 periph B */ 260 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
260 0 28 0x2 0x0 /* PA28 periph B */ 261 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
261 0 29 0x2 0x0>; /* PA29 periph B */ 262 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
262 }; 263 };
263 264
264 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { 265 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
265 atmel,pins = 266 atmel,pins =
266 <0 10 0x2 0x0 /* PA10 periph B */ 267 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
267 0 11 0x2 0x0 /* PA11 periph B */ 268 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
268 0 24 0x2 0x0 /* PA24 periph B */ 269 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
269 0 25 0x2 0x0 /* PA25 periph B */ 270 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
270 0 26 0x2 0x0 /* PA26 periph B */ 271 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
271 0 27 0x2 0x0 /* PA27 periph B */ 272 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
272 0 28 0x2 0x0 /* PA28 periph B */ 273 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
273 0 29 0x2 0x0>; /* PA29 periph B */ 274 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
274 }; 275 };
275 }; 276 };
276 277
277 mmc0 { 278 mmc0 {
278 pinctrl_mmc0_clk: mmc0_clk-0 { 279 pinctrl_mmc0_clk: mmc0_clk-0 {
279 atmel,pins = 280 atmel,pins =
280 <0 8 0x1 0x0>; /* PA8 periph A */ 281 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
281 }; 282 };
282 283
283 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 284 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
284 atmel,pins = 285 atmel,pins =
285 <0 7 0x1 0x1 /* PA7 periph A with pullup */ 286 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
286 0 6 0x1 0x1>; /* PA6 periph A with pullup */ 287 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
287 }; 288 };
288 289
289 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 290 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
290 atmel,pins = 291 atmel,pins =
291 <0 9 0x1 0x1 /* PA9 periph A with pullup */ 292 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
292 0 10 0x1 0x1 /* PA10 periph A with pullup */ 293 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
293 0 11 0x1 0x1>; /* PA11 periph A with pullup */ 294 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
294 }; 295 };
295 296
296 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 297 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
297 atmel,pins = 298 atmel,pins =
298 <0 1 0x2 0x1 /* PA1 periph B with pullup */ 299 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
299 0 0 0x2 0x1>; /* PA0 periph B with pullup */ 300 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
300 }; 301 };
301 302
302 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 303 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
303 atmel,pins = 304 atmel,pins =
304 <0 5 0x2 0x1 /* PA5 periph B with pullup */ 305 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
305 0 4 0x2 0x1 /* PA4 periph B with pullup */ 306 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
306 0 3 0x2 0x1>; /* PA3 periph B with pullup */ 307 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
307 }; 308 };
308 }; 309 };
309 310
310 ssc0 { 311 ssc0 {
311 pinctrl_ssc0_tx: ssc0_tx-0 { 312 pinctrl_ssc0_tx: ssc0_tx-0 {
312 atmel,pins = 313 atmel,pins =
313 <1 16 0x1 0x0 /* PB16 periph A */ 314 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
314 1 17 0x1 0x0 /* PB17 periph A */ 315 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
315 1 18 0x1 0x0>; /* PB18 periph A */ 316 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
316 }; 317 };
317 318
318 pinctrl_ssc0_rx: ssc0_rx-0 { 319 pinctrl_ssc0_rx: ssc0_rx-0 {
319 atmel,pins = 320 atmel,pins =
320 <1 19 0x1 0x0 /* PB19 periph A */ 321 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
321 1 20 0x1 0x0 /* PB20 periph A */ 322 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
322 1 21 0x1 0x0>; /* PB21 periph A */ 323 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
323 }; 324 };
324 }; 325 };
325 326
326 spi0 { 327 spi0 {
327 pinctrl_spi0: spi0-0 { 328 pinctrl_spi0: spi0-0 {
328 atmel,pins = 329 atmel,pins =
329 <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */ 330 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
330 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */ 331 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
331 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */ 332 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
332 }; 333 };
333 }; 334 };
334 335
335 spi1 { 336 spi1 {
336 pinctrl_spi1: spi1-0 { 337 pinctrl_spi1: spi1-0 {
337 atmel,pins = 338 atmel,pins =
338 <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */ 339 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
339 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */ 340 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
340 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */ 341 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
341 }; 342 };
342 }; 343 };
343 344
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 5edfadf20482..bb4d7ca24b93 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include "skeleton.dtsi" 9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
11 12
12/ { 13/ {
@@ -111,214 +112,214 @@
111 dbgu { 112 dbgu {
112 pinctrl_dbgu: dbgu-0 { 113 pinctrl_dbgu: dbgu-0 {
113 atmel,pins = 114 atmel,pins =
114 <2 30 0x1 0x0 /* PC30 periph A */ 115 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
115 2 31 0x1 0x1>; /* PC31 periph with pullup */ 116 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
116 }; 117 };
117 }; 118 };
118 119
119 usart0 { 120 usart0 {
120 pinctrl_usart0: usart0-0 { 121 pinctrl_usart0: usart0-0 {
121 atmel,pins = 122 atmel,pins =
122 <0 26 0x1 0x1 /* PA26 periph A with pullup */ 123 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
123 0 27 0x1 0x0>; /* PA27 periph A */ 124 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
124 }; 125 };
125 126
126 pinctrl_usart0_rts: usart0_rts-0 { 127 pinctrl_usart0_rts: usart0_rts-0 {
127 atmel,pins = 128 atmel,pins =
128 <0 28 0x1 0x0>; /* PA28 periph A */ 129 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
129 }; 130 };
130 131
131 pinctrl_usart0_cts: usart0_cts-0 { 132 pinctrl_usart0_cts: usart0_cts-0 {
132 atmel,pins = 133 atmel,pins =
133 <0 29 0x1 0x0>; /* PA29 periph A */ 134 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
134 }; 135 };
135 }; 136 };
136 137
137 usart1 { 138 usart1 {
138 pinctrl_usart1: usart1-0 { 139 pinctrl_usart1: usart1-0 {
139 atmel,pins = 140 atmel,pins =
140 <3 0 0x1 0x1 /* PD0 periph A with pullup */ 141 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
141 3 1 0x1 0x0>; /* PD1 periph A */ 142 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
142 }; 143 };
143 144
144 pinctrl_usart1_rts: usart1_rts-0 { 145 pinctrl_usart1_rts: usart1_rts-0 {
145 atmel,pins = 146 atmel,pins =
146 <3 7 0x2 0x0>; /* PD7 periph B */ 147 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
147 }; 148 };
148 149
149 pinctrl_usart1_cts: usart1_cts-0 { 150 pinctrl_usart1_cts: usart1_cts-0 {
150 atmel,pins = 151 atmel,pins =
151 <3 8 0x2 0x0>; /* PD8 periph B */ 152 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
152 }; 153 };
153 }; 154 };
154 155
155 usart2 { 156 usart2 {
156 pinctrl_usart2: usart2-0 { 157 pinctrl_usart2: usart2-0 {
157 atmel,pins = 158 atmel,pins =
158 <3 2 0x1 0x1 /* PD2 periph A with pullup */ 159 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
159 3 3 0x1 0x0>; /* PD3 periph A */ 160 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
160 }; 161 };
161 162
162 pinctrl_usart2_rts: usart2_rts-0 { 163 pinctrl_usart2_rts: usart2_rts-0 {
163 atmel,pins = 164 atmel,pins =
164 <3 5 0x2 0x0>; /* PD5 periph B */ 165 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
165 }; 166 };
166 167
167 pinctrl_usart2_cts: usart2_cts-0 { 168 pinctrl_usart2_cts: usart2_cts-0 {
168 atmel,pins = 169 atmel,pins =
169 <4 6 0x2 0x0>; /* PD6 periph B */ 170 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
170 }; 171 };
171 }; 172 };
172 173
173 nand { 174 nand {
174 pinctrl_nand: nand-0 { 175 pinctrl_nand: nand-0 {
175 atmel,pins = 176 atmel,pins =
176 <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/ 177 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
177 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */ 178 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
178 }; 179 };
179 }; 180 };
180 181
181 macb { 182 macb {
182 pinctrl_macb_rmii: macb_rmii-0 { 183 pinctrl_macb_rmii: macb_rmii-0 {
183 atmel,pins = 184 atmel,pins =
184 <2 25 0x2 0x0 /* PC25 periph B */ 185 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
185 4 21 0x1 0x0 /* PE21 periph A */ 186 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
186 4 23 0x1 0x0 /* PE23 periph A */ 187 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
187 4 24 0x1 0x0 /* PE24 periph A */ 188 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
188 4 25 0x1 0x0 /* PE25 periph A */ 189 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
189 4 26 0x1 0x0 /* PE26 periph A */ 190 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
190 4 27 0x1 0x0 /* PE27 periph A */ 191 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
191 4 28 0x1 0x0 /* PE28 periph A */ 192 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
192 4 29 0x1 0x0 /* PE29 periph A */ 193 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
193 4 30 0x1 0x0>; /* PE30 periph A */ 194 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
194 }; 195 };
195 196
196 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 197 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
197 atmel,pins = 198 atmel,pins =
198 <2 20 0x2 0x0 /* PC20 periph B */ 199 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
199 2 21 0x2 0x0 /* PC21 periph B */ 200 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
200 2 22 0x2 0x0 /* PC22 periph B */ 201 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
201 2 23 0x2 0x0 /* PC23 periph B */ 202 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
202 2 24 0x2 0x0 /* PC24 periph B */ 203 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
203 2 25 0x2 0x0 /* PC25 periph B */ 204 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
204 2 27 0x2 0x0 /* PC27 periph B */ 205 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
205 4 22 0x2 0x0>; /* PE22 periph B */ 206 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
206 }; 207 };
207 }; 208 };
208 209
209 mmc0 { 210 mmc0 {
210 pinctrl_mmc0_clk: mmc0_clk-0 { 211 pinctrl_mmc0_clk: mmc0_clk-0 {
211 atmel,pins = 212 atmel,pins =
212 <0 12 0x1 0x0>; /* PA12 periph A */ 213 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
213 }; 214 };
214 215
215 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 216 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
216 atmel,pins = 217 atmel,pins =
217 <0 1 0x1 0x1 /* PA1 periph A with pullup */ 218 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
218 0 0 0x1 0x1>; /* PA0 periph A with pullup */ 219 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
219 }; 220 };
220 221
221 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 222 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
222 atmel,pins = 223 atmel,pins =
223 <0 3 0x1 0x1 /* PA3 periph A with pullup */ 224 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
224 0 4 0x1 0x1 /* PA4 periph A with pullup */ 225 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
225 0 5 0x1 0x1>; /* PA5 periph A with pullup */ 226 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
226 }; 227 };
227 228
228 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 229 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
229 atmel,pins = 230 atmel,pins =
230 <0 16 0x1 0x1 /* PA16 periph A with pullup */ 231 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
231 0 17 0x1 0x1>; /* PA17 periph A with pullup */ 232 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
232 }; 233 };
233 234
234 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 235 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
235 atmel,pins = 236 atmel,pins =
236 <0 18 0x1 0x1 /* PA18 periph A with pullup */ 237 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
237 0 19 0x1 0x1 /* PA19 periph A with pullup */ 238 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
238 0 20 0x1 0x1>; /* PA20 periph A with pullup */ 239 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
239 }; 240 };
240 }; 241 };
241 242
242 mmc1 { 243 mmc1 {
243 pinctrl_mmc1_clk: mmc1_clk-0 { 244 pinctrl_mmc1_clk: mmc1_clk-0 {
244 atmel,pins = 245 atmel,pins =
245 <0 6 0x1 0x0>; /* PA6 periph A */ 246 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
246 }; 247 };
247 248
248 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { 249 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
249 atmel,pins = 250 atmel,pins =
250 <0 7 0x1 0x1 /* PA7 periph A with pullup */ 251 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
251 0 8 0x1 0x1>; /* PA8 periph A with pullup */ 252 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
252 }; 253 };
253 254
254 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 255 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
255 atmel,pins = 256 atmel,pins =
256 <0 9 0x1 0x1 /* PA9 periph A with pullup */ 257 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
257 0 10 0x1 0x1 /* PA10 periph A with pullup */ 258 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
258 0 11 0x1 0x1>; /* PA11 periph A with pullup */ 259 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
259 }; 260 };
260 261
261 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { 262 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
262 atmel,pins = 263 atmel,pins =
263 <0 21 0x1 0x1 /* PA21 periph A with pullup */ 264 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
264 0 22 0x1 0x1>; /* PA22 periph A with pullup */ 265 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
265 }; 266 };
266 267
267 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { 268 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
268 atmel,pins = 269 atmel,pins =
269 <0 23 0x1 0x1 /* PA23 periph A with pullup */ 270 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
270 0 24 0x1 0x1 /* PA24 periph A with pullup */ 271 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
271 0 25 0x1 0x1>; /* PA25 periph A with pullup */ 272 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
272 }; 273 };
273 }; 274 };
274 275
275 ssc0 { 276 ssc0 {
276 pinctrl_ssc0_tx: ssc0_tx-0 { 277 pinctrl_ssc0_tx: ssc0_tx-0 {
277 atmel,pins = 278 atmel,pins =
278 <1 0 0x2 0x0 /* PB0 periph B */ 279 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
279 1 1 0x2 0x0 /* PB1 periph B */ 280 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
280 1 2 0x2 0x0>; /* PB2 periph B */ 281 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
281 }; 282 };
282 283
283 pinctrl_ssc0_rx: ssc0_rx-0 { 284 pinctrl_ssc0_rx: ssc0_rx-0 {
284 atmel,pins = 285 atmel,pins =
285 <1 3 0x2 0x0 /* PB3 periph B */ 286 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
286 1 4 0x2 0x0 /* PB4 periph B */ 287 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
287 1 5 0x2 0x0>; /* PB5 periph B */ 288 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
288 }; 289 };
289 }; 290 };
290 291
291 ssc1 { 292 ssc1 {
292 pinctrl_ssc1_tx: ssc1_tx-0 { 293 pinctrl_ssc1_tx: ssc1_tx-0 {
293 atmel,pins = 294 atmel,pins =
294 <1 6 0x1 0x0 /* PB6 periph A */ 295 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
295 1 7 0x1 0x0 /* PB7 periph A */ 296 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
296 1 8 0x1 0x0>; /* PB8 periph A */ 297 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
297 }; 298 };
298 299
299 pinctrl_ssc1_rx: ssc1_rx-0 { 300 pinctrl_ssc1_rx: ssc1_rx-0 {
300 atmel,pins = 301 atmel,pins =
301 <1 9 0x1 0x0 /* PB9 periph A */ 302 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
302 1 10 0x1 0x0 /* PB10 periph A */ 303 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
303 1 11 0x1 0x0>; /* PB11 periph A */ 304 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
304 }; 305 };
305 }; 306 };
306 307
307 spi0 { 308 spi0 {
308 pinctrl_spi0: spi0-0 { 309 pinctrl_spi0: spi0-0 {
309 atmel,pins = 310 atmel,pins =
310 <0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */ 311 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
311 0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */ 312 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
312 0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */ 313 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
313 }; 314 };
314 }; 315 };
315 316
316 spi1 { 317 spi1 {
317 pinctrl_spi1: spi1-0 { 318 pinctrl_spi1: spi1-0 {
318 atmel,pins = 319 atmel,pins =
319 <1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */ 320 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
320 1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */ 321 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
321 1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */ 322 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
322 }; 323 };
323 }; 324 };
324 325
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index e1942ec04af3..eff1afb81304 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -74,8 +74,8 @@
74 mmc0 { 74 mmc0 {
75 pinctrl_board_mmc0: mmc0-board { 75 pinctrl_board_mmc0: mmc0-board {
76 atmel,pins = 76 atmel,pins =
77 <5 18 0x0 0x5 /* PE18 gpio CD pin pull up and deglitch */ 77 <AT91_PIOE 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PE18 gpio CD pin pull up and deglitch */
78 5 19 0x0 0x1>; /* PE19 gpio WP pin pull up */ 78 AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */
79 }; 79 };
80 }; 80 };
81 }; 81 };
diff --git a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
index ec108b98c04e..bdb799bad179 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
+++ b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
@@ -31,7 +31,7 @@
31 mmc0_slot0 { 31 mmc0_slot0 {
32 pinctrl_board_mmc0_slot0: mmc0_slot0-board { 32 pinctrl_board_mmc0_slot0: mmc0_slot0-board {
33 atmel,pins = 33 atmel,pins =
34 <2 2 0x0 0x5>; /* PC2 gpio CD pin pull up and deglitch */ 34 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC2 gpio CD pin pull up and deglitch */
35 }; 35 };
36 }; 36 };
37 }; 37 };
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index 79338393caf9..c7ffc32918f9 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -34,10 +34,17 @@
34 board { 34 board {
35 pinctrl_pck0_as_mck: pck0_as_mck { 35 pinctrl_pck0_as_mck: pck0_as_mck {
36 atmel,pins = 36 atmel,pins =
37 <2 1 0x2 0x0>; /* PC1 periph B */ 37 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */
38 }; 38 };
39 39
40 }; 40 };
41
42 mmc0_slot1 {
43 pinctrl_board_mmc0_slot1: mmc0_slot1-board {
44 atmel,pins =
45 <AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC9 gpio CD pin pull up and deglitch */
46 };
47 };
41 }; 48 };
42 49
43 dbgu: serial@fffff200 { 50 dbgu: serial@fffff200 {
@@ -83,15 +90,6 @@
83 }; 90 };
84 }; 91 };
85 92
86 pinctrl@fffff400 {
87 mmc0_slot1 {
88 pinctrl_board_mmc0_slot1: mmc0_slot1-board {
89 atmel,pins =
90 <2 9 0x0 0x5>; /* PC9 gpio CD pin pull up and deglitch */
91 };
92 };
93 };
94
95 ssc0: ssc@fffbc000 { 93 ssc0: ssc@fffbc000 {
96 status = "okay"; 94 status = "okay";
97 pinctrl-0 = <&pinctrl_ssc0_tx>; 95 pinctrl-0 = <&pinctrl_ssc0_tx>;
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 5d7c1f79dc4a..8ba4c71221d9 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -10,6 +10,7 @@
10 */ 10 */
11 11
12#include "skeleton.dtsi" 12#include "skeleton.dtsi"
13#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/gpio/gpio.h>
14 15
15/ { 16/ {
@@ -131,214 +132,214 @@
131 dbgu { 132 dbgu {
132 pinctrl_dbgu: dbgu-0 { 133 pinctrl_dbgu: dbgu-0 {
133 atmel,pins = 134 atmel,pins =
134 <1 12 0x1 0x0 /* PB12 periph A */ 135 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
135 1 13 0x1 0x0>; /* PB13 periph A */ 136 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
136 }; 137 };
137 }; 138 };
138 139
139 usart0 { 140 usart0 {
140 pinctrl_usart0: usart0-0 { 141 pinctrl_usart0: usart0-0 {
141 atmel,pins = 142 atmel,pins =
142 <1 19 0x1 0x1 /* PB19 periph A with pullup */ 143 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
143 1 18 0x1 0x0>; /* PB18 periph A */ 144 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
144 }; 145 };
145 146
146 pinctrl_usart0_rts: usart0_rts-0 { 147 pinctrl_usart0_rts: usart0_rts-0 {
147 atmel,pins = 148 atmel,pins =
148 <1 17 0x2 0x0>; /* PB17 periph B */ 149 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
149 }; 150 };
150 151
151 pinctrl_usart0_cts: usart0_cts-0 { 152 pinctrl_usart0_cts: usart0_cts-0 {
152 atmel,pins = 153 atmel,pins =
153 <1 15 0x2 0x0>; /* PB15 periph B */ 154 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
154 }; 155 };
155 }; 156 };
156 157
157 uart1 { 158 uart1 {
158 pinctrl_usart1: usart1-0 { 159 pinctrl_usart1: usart1-0 {
159 atmel,pins = 160 atmel,pins =
160 <1 4 0x1 0x1 /* PB4 periph A with pullup */ 161 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
161 1 5 0x1 0x0>; /* PB5 periph A */ 162 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
162 }; 163 };
163 164
164 pinctrl_usart1_rts: usart1_rts-0 { 165 pinctrl_usart1_rts: usart1_rts-0 {
165 atmel,pins = 166 atmel,pins =
166 <3 16 0x1 0x0>; /* PD16 periph A */ 167 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
167 }; 168 };
168 169
169 pinctrl_usart1_cts: usart1_cts-0 { 170 pinctrl_usart1_cts: usart1_cts-0 {
170 atmel,pins = 171 atmel,pins =
171 <3 17 0x1 0x0>; /* PD17 periph A */ 172 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
172 }; 173 };
173 }; 174 };
174 175
175 usart2 { 176 usart2 {
176 pinctrl_usart2: usart2-0 { 177 pinctrl_usart2: usart2-0 {
177 atmel,pins = 178 atmel,pins =
178 <1 6 0x1 0x1 /* PB6 periph A with pullup */ 179 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
179 1 7 0x1 0x0>; /* PB7 periph A */ 180 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
180 }; 181 };
181 182
182 pinctrl_usart2_rts: usart2_rts-0 { 183 pinctrl_usart2_rts: usart2_rts-0 {
183 atmel,pins = 184 atmel,pins =
184 <2 9 0x2 0x0>; /* PC9 periph B */ 185 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
185 }; 186 };
186 187
187 pinctrl_usart2_cts: usart2_cts-0 { 188 pinctrl_usart2_cts: usart2_cts-0 {
188 atmel,pins = 189 atmel,pins =
189 <2 11 0x2 0x0>; /* PC11 periph B */ 190 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
190 }; 191 };
191 }; 192 };
192 193
193 usart3 { 194 usart3 {
194 pinctrl_usart3: usart3-0 { 195 pinctrl_usart3: usart3-0 {
195 atmel,pins = 196 atmel,pins =
196 <1 8 0x1 0x1 /* PB9 periph A with pullup */ 197 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
197 1 9 0x1 0x0>; /* PB8 periph A */ 198 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
198 }; 199 };
199 200
200 pinctrl_usart3_rts: usart3_rts-0 { 201 pinctrl_usart3_rts: usart3_rts-0 {
201 atmel,pins = 202 atmel,pins =
202 <0 23 0x2 0x0>; /* PA23 periph B */ 203 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
203 }; 204 };
204 205
205 pinctrl_usart3_cts: usart3_cts-0 { 206 pinctrl_usart3_cts: usart3_cts-0 {
206 atmel,pins = 207 atmel,pins =
207 <0 24 0x2 0x0>; /* PA24 periph B */ 208 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
208 }; 209 };
209 }; 210 };
210 211
211 nand { 212 nand {
212 pinctrl_nand: nand-0 { 213 pinctrl_nand: nand-0 {
213 atmel,pins = 214 atmel,pins =
214 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/ 215 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
215 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ 216 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
216 }; 217 };
217 }; 218 };
218 219
219 macb { 220 macb {
220 pinctrl_macb_rmii: macb_rmii-0 { 221 pinctrl_macb_rmii: macb_rmii-0 {
221 atmel,pins = 222 atmel,pins =
222 <0 10 0x1 0x0 /* PA10 periph A */ 223 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
223 0 11 0x1 0x0 /* PA11 periph A */ 224 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
224 0 12 0x1 0x0 /* PA12 periph A */ 225 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
225 0 13 0x1 0x0 /* PA13 periph A */ 226 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
226 0 14 0x1 0x0 /* PA14 periph A */ 227 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
227 0 15 0x1 0x0 /* PA15 periph A */ 228 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
228 0 16 0x1 0x0 /* PA16 periph A */ 229 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
229 0 17 0x1 0x0 /* PA17 periph A */ 230 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
230 0 18 0x1 0x0 /* PA18 periph A */ 231 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
231 0 19 0x1 0x0>; /* PA19 periph A */ 232 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
232 }; 233 };
233 234
234 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 235 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
235 atmel,pins = 236 atmel,pins =
236 <0 6 0x2 0x0 /* PA6 periph B */ 237 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
237 0 7 0x2 0x0 /* PA7 periph B */ 238 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
238 0 8 0x2 0x0 /* PA8 periph B */ 239 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
239 0 9 0x2 0x0 /* PA9 periph B */ 240 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
240 0 27 0x2 0x0 /* PA27 periph B */ 241 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
241 0 28 0x2 0x0 /* PA28 periph B */ 242 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
242 0 29 0x2 0x0 /* PA29 periph B */ 243 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
243 0 30 0x2 0x0>; /* PA30 periph B */ 244 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
244 }; 245 };
245 }; 246 };
246 247
247 mmc0 { 248 mmc0 {
248 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 249 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
249 atmel,pins = 250 atmel,pins =
250 <0 0 0x1 0x0 /* PA0 periph A */ 251 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
251 0 1 0x1 0x1 /* PA1 periph A with pullup */ 252 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
252 0 2 0x1 0x1>; /* PA2 periph A with pullup */ 253 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
253 }; 254 };
254 255
255 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 256 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
256 atmel,pins = 257 atmel,pins =
257 <0 3 0x1 0x1 /* PA3 periph A with pullup */ 258 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
258 0 4 0x1 0x1 /* PA4 periph A with pullup */ 259 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
259 0 5 0x1 0x1>; /* PA5 periph A with pullup */ 260 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
260 }; 261 };
261 262
262 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { 263 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
263 atmel,pins = 264 atmel,pins =
264 <0 6 0x1 0x1 /* PA6 periph A with pullup */ 265 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
265 0 7 0x1 0x1 /* PA7 periph A with pullup */ 266 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
266 0 8 0x1 0x1 /* PA8 periph A with pullup */ 267 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
267 0 9 0x1 0x1>; /* PA9 periph A with pullup */ 268 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
268 }; 269 };
269 }; 270 };
270 271
271 mmc1 { 272 mmc1 {
272 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { 273 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
273 atmel,pins = 274 atmel,pins =
274 <0 31 0x1 0x0 /* PA31 periph A */ 275 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
275 0 22 0x1 0x1 /* PA22 periph A with pullup */ 276 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
276 0 23 0x1 0x1>; /* PA23 periph A with pullup */ 277 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
277 }; 278 };
278 279
279 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 280 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
280 atmel,pins = 281 atmel,pins =
281 <0 24 0x1 0x1 /* PA24 periph A with pullup */ 282 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
282 0 25 0x1 0x1 /* PA25 periph A with pullup */ 283 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
283 0 26 0x1 0x1>; /* PA26 periph A with pullup */ 284 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
284 }; 285 };
285 286
286 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { 287 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
287 atmel,pins = 288 atmel,pins =
288 <0 27 0x1 0x1 /* PA27 periph A with pullup */ 289 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
289 0 28 0x1 0x1 /* PA28 periph A with pullup */ 290 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
290 0 29 0x1 0x1 /* PA29 periph A with pullup */ 291 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
291 0 20 0x1 0x1>; /* PA30 periph A with pullup */ 292 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
292 }; 293 };
293 }; 294 };
294 295
295 ssc0 { 296 ssc0 {
296 pinctrl_ssc0_tx: ssc0_tx-0 { 297 pinctrl_ssc0_tx: ssc0_tx-0 {
297 atmel,pins = 298 atmel,pins =
298 <3 0 0x1 0x0 /* PD0 periph A */ 299 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
299 3 1 0x1 0x0 /* PD1 periph A */ 300 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
300 3 2 0x1 0x0>; /* PD2 periph A */ 301 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
301 }; 302 };
302 303
303 pinctrl_ssc0_rx: ssc0_rx-0 { 304 pinctrl_ssc0_rx: ssc0_rx-0 {
304 atmel,pins = 305 atmel,pins =
305 <3 3 0x1 0x0 /* PD3 periph A */ 306 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
306 3 4 0x1 0x0 /* PD4 periph A */ 307 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
307 3 5 0x1 0x0>; /* PD5 periph A */ 308 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
308 }; 309 };
309 }; 310 };
310 311
311 ssc1 { 312 ssc1 {
312 pinctrl_ssc1_tx: ssc1_tx-0 { 313 pinctrl_ssc1_tx: ssc1_tx-0 {
313 atmel,pins = 314 atmel,pins =
314 <3 10 0x1 0x0 /* PD10 periph A */ 315 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
315 3 11 0x1 0x0 /* PD11 periph A */ 316 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
316 3 12 0x1 0x0>; /* PD12 periph A */ 317 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
317 }; 318 };
318 319
319 pinctrl_ssc1_rx: ssc1_rx-0 { 320 pinctrl_ssc1_rx: ssc1_rx-0 {
320 atmel,pins = 321 atmel,pins =
321 <3 13 0x1 0x0 /* PD13 periph A */ 322 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
322 3 14 0x1 0x0 /* PD14 periph A */ 323 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
323 3 15 0x1 0x0>; /* PD15 periph A */ 324 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
324 }; 325 };
325 }; 326 };
326 327
327 spi0 { 328 spi0 {
328 pinctrl_spi0: spi0-0 { 329 pinctrl_spi0: spi0-0 {
329 atmel,pins = 330 atmel,pins =
330 <1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */ 331 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
331 1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */ 332 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
332 1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */ 333 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
333 }; 334 };
334 }; 335 };
335 336
336 spi1 { 337 spi1 {
337 pinctrl_spi1: spi1-0 { 338 pinctrl_spi1: spi1-0 {
338 atmel,pins = 339 atmel,pins =
339 <1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */ 340 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
340 1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */ 341 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
341 1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */ 342 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
342 }; 343 };
343 }; 344 };
344 345
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 85e9c5e8b23f..89c50d108d44 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -90,15 +90,15 @@
90 mmc0 { 90 mmc0 {
91 pinctrl_board_mmc0: mmc0-board { 91 pinctrl_board_mmc0: mmc0-board {
92 atmel,pins = 92 atmel,pins =
93 <3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */ 93 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deglitch */
94 }; 94 };
95 }; 95 };
96 96
97 mmc1 { 97 mmc1 {
98 pinctrl_board_mmc1: mmc1-board { 98 pinctrl_board_mmc1: mmc1-board {
99 atmel,pins = 99 atmel,pins =
100 <3 11 0x0 0x5 /* PD11 gpio CD pin pull up and deglitch */ 100 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and deglitch */
101 3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */ 101 AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */
102 }; 102 };
103 }; 103 };
104 }; 104 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 5205403ca1e3..e166e0c53f5e 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/gpio/gpio.h>
12 13
13/ { 14/ {
@@ -134,152 +135,152 @@
134 dbgu { 135 dbgu {
135 pinctrl_dbgu: dbgu-0 { 136 pinctrl_dbgu: dbgu-0 {
136 atmel,pins = 137 atmel,pins =
137 <0 9 0x1 0x0 /* PA9 periph A */ 138 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
138 0 10 0x1 0x1>; /* PA10 periph with pullup */ 139 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
139 }; 140 };
140 }; 141 };
141 142
142 usart0 { 143 usart0 {
143 pinctrl_usart0: usart0-0 { 144 pinctrl_usart0: usart0-0 {
144 atmel,pins = 145 atmel,pins =
145 <0 1 0x1 0x1 /* PA1 periph A with pullup */ 146 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
146 0 0 0x1 0x0>; /* PA0 periph A */ 147 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
147 }; 148 };
148 149
149 pinctrl_usart0_rts: usart0_rts-0 { 150 pinctrl_usart0_rts: usart0_rts-0 {
150 atmel,pins = 151 atmel,pins =
151 <0 2 0x1 0x0>; /* PA2 periph A */ 152 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
152 }; 153 };
153 154
154 pinctrl_usart0_cts: usart0_cts-0 { 155 pinctrl_usart0_cts: usart0_cts-0 {
155 atmel,pins = 156 atmel,pins =
156 <0 3 0x1 0x0>; /* PA3 periph A */ 157 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
157 }; 158 };
158 }; 159 };
159 160
160 usart1 { 161 usart1 {
161 pinctrl_usart1: usart1-0 { 162 pinctrl_usart1: usart1-0 {
162 atmel,pins = 163 atmel,pins =
163 <0 6 0x1 0x1 /* PA6 periph A with pullup */ 164 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
164 0 5 0x1 0x0>; /* PA5 periph A */ 165 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
165 }; 166 };
166 }; 167 };
167 168
168 usart2 { 169 usart2 {
169 pinctrl_usart2: usart2-0 { 170 pinctrl_usart2: usart2-0 {
170 atmel,pins = 171 atmel,pins =
171 <0 8 0x1 0x1 /* PA8 periph A with pullup */ 172 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
172 0 7 0x1 0x0>; /* PA7 periph A */ 173 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
173 }; 174 };
174 175
175 pinctrl_usart2_rts: usart2_rts-0 { 176 pinctrl_usart2_rts: usart2_rts-0 {
176 atmel,pins = 177 atmel,pins =
177 <1 0 0x2 0x0>; /* PB0 periph B */ 178 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
178 }; 179 };
179 180
180 pinctrl_usart2_cts: usart2_cts-0 { 181 pinctrl_usart2_cts: usart2_cts-0 {
181 atmel,pins = 182 atmel,pins =
182 <1 1 0x2 0x0>; /* PB1 periph B */ 183 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
183 }; 184 };
184 }; 185 };
185 186
186 usart3 { 187 usart3 {
187 pinctrl_usart3: usart3-0 { 188 pinctrl_usart3: usart3-0 {
188 atmel,pins = 189 atmel,pins =
189 <2 23 0x2 0x1 /* PC23 periph B with pullup */ 190 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
190 2 22 0x2 0x0>; /* PC22 periph B */ 191 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
191 }; 192 };
192 193
193 pinctrl_usart3_rts: usart3_rts-0 { 194 pinctrl_usart3_rts: usart3_rts-0 {
194 atmel,pins = 195 atmel,pins =
195 <2 24 0x2 0x0>; /* PC24 periph B */ 196 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
196 }; 197 };
197 198
198 pinctrl_usart3_cts: usart3_cts-0 { 199 pinctrl_usart3_cts: usart3_cts-0 {
199 atmel,pins = 200 atmel,pins =
200 <2 25 0x2 0x0>; /* PC25 periph B */ 201 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
201 }; 202 };
202 }; 203 };
203 204
204 uart0 { 205 uart0 {
205 pinctrl_uart0: uart0-0 { 206 pinctrl_uart0: uart0-0 {
206 atmel,pins = 207 atmel,pins =
207 <2 9 0x3 0x1 /* PC9 periph C with pullup */ 208 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
208 2 8 0x3 0x0>; /* PC8 periph C */ 209 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
209 }; 210 };
210 }; 211 };
211 212
212 uart1 { 213 uart1 {
213 pinctrl_uart1: uart1-0 { 214 pinctrl_uart1: uart1-0 {
214 atmel,pins = 215 atmel,pins =
215 <2 16 0x3 0x1 /* PC17 periph C with pullup */ 216 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
216 2 17 0x3 0x0>; /* PC16 periph C */ 217 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
217 }; 218 };
218 }; 219 };
219 220
220 nand { 221 nand {
221 pinctrl_nand: nand-0 { 222 pinctrl_nand: nand-0 {
222 atmel,pins = 223 atmel,pins =
223 <3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/ 224 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
224 3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */ 225 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
225 }; 226 };
226 }; 227 };
227 228
228 mmc0 { 229 mmc0 {
229 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 230 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
230 atmel,pins = 231 atmel,pins =
231 <0 17 0x1 0x0 /* PA17 periph A */ 232 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
232 0 16 0x1 0x1 /* PA16 periph A with pullup */ 233 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
233 0 15 0x1 0x1>; /* PA15 periph A with pullup */ 234 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
234 }; 235 };
235 236
236 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 237 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
237 atmel,pins = 238 atmel,pins =
238 <0 18 0x1 0x1 /* PA18 periph A with pullup */ 239 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
239 0 19 0x1 0x1 /* PA19 periph A with pullup */ 240 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
240 0 20 0x1 0x1>; /* PA20 periph A with pullup */ 241 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
241 }; 242 };
242 243
243 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { 244 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
244 atmel,pins = 245 atmel,pins =
245 <0 11 0x2 0x1 /* PA11 periph B with pullup */ 246 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
246 0 12 0x2 0x1 /* PA12 periph B with pullup */ 247 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
247 0 13 0x2 0x1 /* PA13 periph B with pullup */ 248 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
248 0 14 0x2 0x1>; /* PA14 periph B with pullup */ 249 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
249 }; 250 };
250 }; 251 };
251 252
252 ssc0 { 253 ssc0 {
253 pinctrl_ssc0_tx: ssc0_tx-0 { 254 pinctrl_ssc0_tx: ssc0_tx-0 {
254 atmel,pins = 255 atmel,pins =
255 <0 24 0x2 0x0 /* PA24 periph B */ 256 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
256 0 25 0x2 0x0 /* PA25 periph B */ 257 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
257 0 26 0x2 0x0>; /* PA26 periph B */ 258 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
258 }; 259 };
259 260
260 pinctrl_ssc0_rx: ssc0_rx-0 { 261 pinctrl_ssc0_rx: ssc0_rx-0 {
261 atmel,pins = 262 atmel,pins =
262 <0 27 0x2 0x0 /* PA27 periph B */ 263 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
263 0 28 0x2 0x0 /* PA28 periph B */ 264 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
264 0 29 0x2 0x0>; /* PA29 periph B */ 265 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
265 }; 266 };
266 }; 267 };
267 268
268 spi0 { 269 spi0 {
269 pinctrl_spi0: spi0-0 { 270 pinctrl_spi0: spi0-0 {
270 atmel,pins = 271 atmel,pins =
271 <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ 272 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
272 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ 273 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
273 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ 274 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
274 }; 275 };
275 }; 276 };
276 277
277 spi1 { 278 spi1 {
278 pinctrl_spi1: spi1-0 { 279 pinctrl_spi1: spi1-0 {
279 atmel,pins = 280 atmel,pins =
280 <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ 281 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
281 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ 282 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
282 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ 283 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
283 }; 284 };
284 }; 285 };
285 286
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index 8eece2704455..2e67cd5e47eb 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -63,7 +63,7 @@
63 mmc0 { 63 mmc0 {
64 pinctrl_board_mmc0: mmc0-board { 64 pinctrl_board_mmc0: mmc0-board {
65 atmel,pins = 65 atmel,pins =
66 <0 7 0x0 0x5>; /* PA7 gpio CD pin pull up and deglitch */ 66 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA7 gpio CD pin pull up and deglitch */
67 }; 67 };
68 }; 68 };
69 }; 69 };
diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
index 3f78d9b1d790..49e94aba938f 100644
--- a/arch/arm/boot/dts/at91sam9x25.dtsi
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -26,16 +26,16 @@
26 macb1 { 26 macb1 {
27 pinctrl_macb1_rmii: macb1_rmii-0 { 27 pinctrl_macb1_rmii: macb1_rmii-0 {
28 atmel,pins = 28 atmel,pins =
29 <2 16 0x2 0x0 /* PC16 periph B */ 29 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
30 2 18 0x2 0x0 /* PC18 periph B */ 30 AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
31 2 19 0x2 0x0 /* PC19 periph B */ 31 AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
32 2 20 0x2 0x0 /* PC20 periph B */ 32 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
33 2 21 0x2 0x0 /* PC21 periph B */ 33 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
34 2 27 0x2 0x0 /* PC27 periph B */ 34 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
35 2 28 0x2 0x0 /* PC28 periph B */ 35 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
36 2 29 0x2 0x0 /* PC29 periph B */ 36 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
37 2 30 0x2 0x0 /* PC30 periph B */ 37 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
38 2 31 0x2 0x0>; /* PC31 periph B */ 38 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
39 }; 39 };
40 }; 40 };
41 }; 41 };
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 949b8ea2ec0d..cfbf9235e8ae 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -10,6 +10,7 @@
10 */ 10 */
11 11
12#include "skeleton.dtsi" 12#include "skeleton.dtsi"
13#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/gpio/gpio.h>
14 15
15/ { 16/ {
@@ -125,290 +126,290 @@
125 dbgu { 126 dbgu {
126 pinctrl_dbgu: dbgu-0 { 127 pinctrl_dbgu: dbgu-0 {
127 atmel,pins = 128 atmel,pins =
128 <0 9 0x1 0x0 /* PA9 periph A */ 129 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
129 0 10 0x1 0x1>; /* PA10 periph A with pullup */ 130 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
130 }; 131 };
131 }; 132 };
132 133
133 usart0 { 134 usart0 {
134 pinctrl_usart0: usart0-0 { 135 pinctrl_usart0: usart0-0 {
135 atmel,pins = 136 atmel,pins =
136 <0 0 0x1 0x1 /* PA0 periph A with pullup */ 137 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
137 0 1 0x1 0x0>; /* PA1 periph A */ 138 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
138 }; 139 };
139 140
140 pinctrl_usart0_rts: usart0_rts-0 { 141 pinctrl_usart0_rts: usart0_rts-0 {
141 atmel,pins = 142 atmel,pins =
142 <0 2 0x1 0x0>; /* PA2 periph A */ 143 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
143 }; 144 };
144 145
145 pinctrl_usart0_cts: usart0_cts-0 { 146 pinctrl_usart0_cts: usart0_cts-0 {
146 atmel,pins = 147 atmel,pins =
147 <0 3 0x1 0x0>; /* PA3 periph A */ 148 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
148 }; 149 };
149 150
150 pinctrl_usart0_sck: usart0_sck-0 { 151 pinctrl_usart0_sck: usart0_sck-0 {
151 atmel,pins = 152 atmel,pins =
152 <0 4 0x1 0x0>; /* PA4 periph A */ 153 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
153 }; 154 };
154 }; 155 };
155 156
156 usart1 { 157 usart1 {
157 pinctrl_usart1: usart1-0 { 158 pinctrl_usart1: usart1-0 {
158 atmel,pins = 159 atmel,pins =
159 <0 5 0x1 0x1 /* PA5 periph A with pullup */ 160 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
160 0 6 0x1 0x0>; /* PA6 periph A */ 161 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
161 }; 162 };
162 163
163 pinctrl_usart1_rts: usart1_rts-0 { 164 pinctrl_usart1_rts: usart1_rts-0 {
164 atmel,pins = 165 atmel,pins =
165 <2 27 0x3 0x0>; /* PC27 periph C */ 166 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
166 }; 167 };
167 168
168 pinctrl_usart1_cts: usart1_cts-0 { 169 pinctrl_usart1_cts: usart1_cts-0 {
169 atmel,pins = 170 atmel,pins =
170 <2 28 0x3 0x0>; /* PC28 periph C */ 171 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
171 }; 172 };
172 173
173 pinctrl_usart1_sck: usart1_sck-0 { 174 pinctrl_usart1_sck: usart1_sck-0 {
174 atmel,pins = 175 atmel,pins =
175 <2 28 0x3 0x0>; /* PC29 periph C */ 176 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
176 }; 177 };
177 }; 178 };
178 179
179 usart2 { 180 usart2 {
180 pinctrl_usart2: usart2-0 { 181 pinctrl_usart2: usart2-0 {
181 atmel,pins = 182 atmel,pins =
182 <0 7 0x1 0x1 /* PA7 periph A with pullup */ 183 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
183 0 8 0x1 0x0>; /* PA8 periph A */ 184 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
184 }; 185 };
185 186
186 pinctrl_uart2_rts: uart2_rts-0 { 187 pinctrl_uart2_rts: uart2_rts-0 {
187 atmel,pins = 188 atmel,pins =
188 <1 0 0x2 0x0>; /* PB0 periph B */ 189 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
189 }; 190 };
190 191
191 pinctrl_uart2_cts: uart2_cts-0 { 192 pinctrl_uart2_cts: uart2_cts-0 {
192 atmel,pins = 193 atmel,pins =
193 <1 1 0x2 0x0>; /* PB1 periph B */ 194 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
194 }; 195 };
195 196
196 pinctrl_usart2_sck: usart2_sck-0 { 197 pinctrl_usart2_sck: usart2_sck-0 {
197 atmel,pins = 198 atmel,pins =
198 <1 2 0x2 0x0>; /* PB2 periph B */ 199 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
199 }; 200 };
200 }; 201 };
201 202
202 usart3 { 203 usart3 {
203 pinctrl_usart3: usart3-0 { 204 pinctrl_usart3: usart3-0 {
204 atmel,pins = 205 atmel,pins =
205 <2 22 0x2 0x1 /* PC22 periph B with pullup */ 206 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
206 2 23 0x2 0x0>; /* PC23 periph B */ 207 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
207 }; 208 };
208 209
209 pinctrl_usart3_rts: usart3_rts-0 { 210 pinctrl_usart3_rts: usart3_rts-0 {
210 atmel,pins = 211 atmel,pins =
211 <2 24 0x2 0x0>; /* PC24 periph B */ 212 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
212 }; 213 };
213 214
214 pinctrl_usart3_cts: usart3_cts-0 { 215 pinctrl_usart3_cts: usart3_cts-0 {
215 atmel,pins = 216 atmel,pins =
216 <2 25 0x2 0x0>; /* PC25 periph B */ 217 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
217 }; 218 };
218 219
219 pinctrl_usart3_sck: usart3_sck-0 { 220 pinctrl_usart3_sck: usart3_sck-0 {
220 atmel,pins = 221 atmel,pins =
221 <2 26 0x2 0x0>; /* PC26 periph B */ 222 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
222 }; 223 };
223 }; 224 };
224 225
225 uart0 { 226 uart0 {
226 pinctrl_uart0: uart0-0 { 227 pinctrl_uart0: uart0-0 {
227 atmel,pins = 228 atmel,pins =
228 <2 8 0x3 0x0 /* PC8 periph C */ 229 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
229 2 9 0x3 0x1>; /* PC9 periph C with pullup */ 230 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
230 }; 231 };
231 }; 232 };
232 233
233 uart1 { 234 uart1 {
234 pinctrl_uart1: uart1-0 { 235 pinctrl_uart1: uart1-0 {
235 atmel,pins = 236 atmel,pins =
236 <2 16 0x3 0x0 /* PC16 periph C */ 237 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
237 2 17 0x3 0x1>; /* PC17 periph C with pullup */ 238 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
238 }; 239 };
239 }; 240 };
240 241
241 nand { 242 nand {
242 pinctrl_nand: nand-0 { 243 pinctrl_nand: nand-0 {
243 atmel,pins = 244 atmel,pins =
244 <3 0 0x1 0x0 /* PD0 periph A Read Enable */ 245 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
245 3 1 0x1 0x0 /* PD1 periph A Write Enable */ 246 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
246 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */ 247 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
247 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */ 248 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
248 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */ 249 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
249 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */ 250 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
250 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */ 251 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
251 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */ 252 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
252 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */ 253 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
253 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */ 254 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
254 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */ 255 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
255 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */ 256 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
256 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */ 257 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
257 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */ 258 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
258 }; 259 };
259 260
260 pinctrl_nand_16bits: nand_16bits-0 { 261 pinctrl_nand_16bits: nand_16bits-0 {
261 atmel,pins = 262 atmel,pins =
262 <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */ 263 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
263 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */ 264 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
264 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */ 265 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
265 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */ 266 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
266 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */ 267 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
267 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */ 268 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
268 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */ 269 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
269 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */ 270 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
270 }; 271 };
271 }; 272 };
272 273
273 macb0 { 274 macb0 {
274 pinctrl_macb0_rmii: macb0_rmii-0 { 275 pinctrl_macb0_rmii: macb0_rmii-0 {
275 atmel,pins = 276 atmel,pins =
276 <1 0 0x1 0x0 /* PB0 periph A */ 277 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
277 1 1 0x1 0x0 /* PB1 periph A */ 278 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
278 1 2 0x1 0x0 /* PB2 periph A */ 279 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
279 1 3 0x1 0x0 /* PB3 periph A */ 280 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
280 1 4 0x1 0x0 /* PB4 periph A */ 281 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
281 1 5 0x1 0x0 /* PB5 periph A */ 282 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
282 1 6 0x1 0x0 /* PB6 periph A */ 283 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
283 1 7 0x1 0x0 /* PB7 periph A */ 284 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
284 1 9 0x1 0x0 /* PB9 periph A */ 285 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
285 1 10 0x1 0x0>; /* PB10 periph A */ 286 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
286 }; 287 };
287 288
288 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { 289 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
289 atmel,pins = 290 atmel,pins =
290 <1 8 0x1 0x0 /* PB8 periph A */ 291 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
291 1 11 0x1 0x0 /* PB11 periph A */ 292 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
292 1 12 0x1 0x0 /* PB12 periph A */ 293 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
293 1 13 0x1 0x0 /* PB13 periph A */ 294 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
294 1 14 0x1 0x0 /* PB14 periph A */ 295 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
295 1 15 0x1 0x0 /* PB15 periph A */ 296 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
296 1 16 0x1 0x0 /* PB16 periph A */ 297 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
297 1 17 0x1 0x0>; /* PB17 periph A */ 298 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
298 }; 299 };
299 }; 300 };
300 301
301 mmc0 { 302 mmc0 {
302 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 303 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
303 atmel,pins = 304 atmel,pins =
304 <0 17 0x1 0x0 /* PA17 periph A */ 305 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
305 0 16 0x1 0x1 /* PA16 periph A with pullup */ 306 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
306 0 15 0x1 0x1>; /* PA15 periph A with pullup */ 307 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
307 }; 308 };
308 309
309 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 310 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
310 atmel,pins = 311 atmel,pins =
311 <0 18 0x1 0x1 /* PA18 periph A with pullup */ 312 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
312 0 19 0x1 0x1 /* PA19 periph A with pullup */ 313 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
313 0 20 0x1 0x1>; /* PA20 periph A with pullup */ 314 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
314 }; 315 };
315 }; 316 };
316 317
317 mmc1 { 318 mmc1 {
318 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { 319 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
319 atmel,pins = 320 atmel,pins =
320 <0 13 0x2 0x0 /* PA13 periph B */ 321 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
321 0 12 0x2 0x1 /* PA12 periph B with pullup */ 322 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
322 0 11 0x2 0x1>; /* PA11 periph B with pullup */ 323 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
323 }; 324 };
324 325
325 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 326 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
326 atmel,pins = 327 atmel,pins =
327 <0 2 0x2 0x1 /* PA2 periph B with pullup */ 328 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
328 0 3 0x2 0x1 /* PA3 periph B with pullup */ 329 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
329 0 4 0x2 0x1>; /* PA4 periph B with pullup */ 330 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
330 }; 331 };
331 }; 332 };
332 333
333 ssc0 { 334 ssc0 {
334 pinctrl_ssc0_tx: ssc0_tx-0 { 335 pinctrl_ssc0_tx: ssc0_tx-0 {
335 atmel,pins = 336 atmel,pins =
336 <0 24 0x2 0x0 /* PA24 periph B */ 337 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
337 0 25 0x2 0x0 /* PA25 periph B */ 338 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
338 0 26 0x2 0x0>; /* PA26 periph B */ 339 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
339 }; 340 };
340 341
341 pinctrl_ssc0_rx: ssc0_rx-0 { 342 pinctrl_ssc0_rx: ssc0_rx-0 {
342 atmel,pins = 343 atmel,pins =
343 <0 27 0x2 0x0 /* PA27 periph B */ 344 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
344 0 28 0x2 0x0 /* PA28 periph B */ 345 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
345 0 29 0x2 0x0>; /* PA29 periph B */ 346 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
346 }; 347 };
347 }; 348 };
348 349
349 spi0 { 350 spi0 {
350 pinctrl_spi0: spi0-0 { 351 pinctrl_spi0: spi0-0 {
351 atmel,pins = 352 atmel,pins =
352 <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ 353 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
353 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ 354 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
354 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ 355 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
355 }; 356 };
356 }; 357 };
357 358
358 spi1 { 359 spi1 {
359 pinctrl_spi1: spi1-0 { 360 pinctrl_spi1: spi1-0 {
360 atmel,pins = 361 atmel,pins =
361 <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ 362 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
362 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ 363 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
363 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ 364 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
364 }; 365 };
365 }; 366 };
366 367
367 i2c0 { 368 i2c0 {
368 pinctrl_i2c0: i2c0-0 { 369 pinctrl_i2c0: i2c0-0 {
369 atmel,pins = 370 atmel,pins =
370 <0 30 0x1 0x0 /* PA30 periph A I2C0 data */ 371 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
371 0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */ 372 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
372 }; 373 };
373 }; 374 };
374 375
375 i2c1 { 376 i2c1 {
376 pinctrl_i2c1: i2c1-0 { 377 pinctrl_i2c1: i2c1-0 {
377 atmel,pins = 378 atmel,pins =
378 <2 0 0x3 0x0 /* PC0 periph C I2C1 data */ 379 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
379 2 1 0x3 0x0>; /* PC1 periph C I2C1 clock */ 380 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
380 }; 381 };
381 }; 382 };
382 383
383 i2c2 { 384 i2c2 {
384 pinctrl_i2c2: i2c2-0 { 385 pinctrl_i2c2: i2c2-0 {
385 atmel,pins = 386 atmel,pins =
386 <1 4 0x2 0x0 /* PB4 periph B I2C2 data */ 387 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
387 1 5 0x2 0x0>; /* PB5 periph B I2C2 clock */ 388 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
388 }; 389 };
389 }; 390 };
390 391
391 i2c_gpio0 { 392 i2c_gpio0 {
392 pinctrl_i2c_gpio0: i2c_gpio0-0 { 393 pinctrl_i2c_gpio0: i2c_gpio0-0 {
393 atmel,pins = 394 atmel,pins =
394 <0 30 0x0 0x2 /* PA30 gpio multidrive I2C0 data */ 395 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
395 0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */ 396 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
396 }; 397 };
397 }; 398 };
398 399
399 i2c_gpio1 { 400 i2c_gpio1 {
400 pinctrl_i2c_gpio1: i2c_gpio1-0 { 401 pinctrl_i2c_gpio1: i2c_gpio1-0 {
401 atmel,pins = 402 atmel,pins =
402 <2 0 0x0 0x2 /* PC0 gpio multidrive I2C1 data */ 403 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
403 2 1 0x0 0x2>; /* PC1 gpio multidrive I2C1 clock */ 404 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
404 }; 405 };
405 }; 406 };
406 407
407 i2c_gpio2 { 408 i2c_gpio2 {
408 pinctrl_i2c_gpio2: i2c_gpio2-0 { 409 pinctrl_i2c_gpio2: i2c_gpio2-0 {
409 atmel,pins = 410 atmel,pins =
410 <1 4 0x0 0x2 /* PB4 gpio multidrive I2C2 data */ 411 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
411 1 5 0x0 0x2>; /* PB5 gpio multidrive I2C2 clock */ 412 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
412 }; 413 };
413 }; 414 };
414 415
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
index 94723c30e99b..4a5ee5cc115a 100644
--- a/arch/arm/boot/dts/at91sam9x5cm.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -28,7 +28,7 @@
28 pinctrl@fffff400 { 28 pinctrl@fffff400 {
29 1wire_cm { 29 1wire_cm {
30 pinctrl_1wire_cm: 1wire_cm-0 { 30 pinctrl_1wire_cm: 1wire_cm-0 {
31 atmel,pins = <1 18 0x0 0x2>; /* PB18 multidrive, conflicts with led */ 31 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
32 }; 32 };
33 }; 33 };
34 }; 34 };
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index 95f88c7c87f3..19c8ebb303f4 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -60,14 +60,14 @@
60 mmc0 { 60 mmc0 {
61 pinctrl_board_mmc0: mmc0-board { 61 pinctrl_board_mmc0: mmc0-board {
62 atmel,pins = 62 atmel,pins =
63 <3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */ 63 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
64 }; 64 };
65 }; 65 };
66 66
67 mmc1 { 67 mmc1 {
68 pinctrl_board_mmc1: mmc1-board { 68 pinctrl_board_mmc1: mmc1-board {
69 atmel,pins = 69 atmel,pins =
70 <3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */ 70 <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deglitch */
71 }; 71 };
72 }; 72 };
73 }; 73 };
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
index 315d9279c9b6..33ffabe9c4c8 100644
--- a/arch/arm/boot/dts/pm9g45.dts
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -42,15 +42,15 @@
42 board { 42 board {
43 pinctrl_board_nand: nand0-board { 43 pinctrl_board_nand: nand0-board {
44 atmel,pins = 44 atmel,pins =
45 <3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/ 45 <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/
46 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ 46 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
47 }; 47 };
48 }; 48 };
49 49
50 mmc { 50 mmc {
51 pinctrl_board_mmc: mmc0-board { 51 pinctrl_board_mmc: mmc0-board {
52 atmel,pins = 52 atmel,pins =
53 <3 6 0x0 0x5>; /* PD6 gpio CD pin pull_up and deglitch */ 53 <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
54 }; 54 };
55 }; 55 };
56 }; 56 };
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 0d65e3d375a3..05a3380e2b47 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#include "skeleton.dtsi" 11#include "skeleton.dtsi"
12#include <dt-bindings/pinctrl/at91.h>
12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/gpio/gpio.h>
13 14
14/ { 15/ {
@@ -414,202 +415,202 @@
414 adc0 { 415 adc0 {
415 pinctrl_adc0_adtrg: adc0_adtrg { 416 pinctrl_adc0_adtrg: adc0_adtrg {
416 atmel,pins = 417 atmel,pins =
417 <3 19 0x1 0x0>; /* PD19 periph A ADTRG */ 418 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
418 }; 419 };
419 pinctrl_adc0_ad0: adc0_ad0 { 420 pinctrl_adc0_ad0: adc0_ad0 {
420 atmel,pins = 421 atmel,pins =
421 <3 20 0x1 0x0>; /* PD20 periph A AD0 */ 422 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
422 }; 423 };
423 pinctrl_adc0_ad1: adc0_ad1 { 424 pinctrl_adc0_ad1: adc0_ad1 {
424 atmel,pins = 425 atmel,pins =
425 <3 21 0x1 0x0>; /* PD21 periph A AD1 */ 426 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
426 }; 427 };
427 pinctrl_adc0_ad2: adc0_ad2 { 428 pinctrl_adc0_ad2: adc0_ad2 {
428 atmel,pins = 429 atmel,pins =
429 <3 22 0x1 0x0>; /* PD22 periph A AD2 */ 430 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
430 }; 431 };
431 pinctrl_adc0_ad3: adc0_ad3 { 432 pinctrl_adc0_ad3: adc0_ad3 {
432 atmel,pins = 433 atmel,pins =
433 <3 23 0x1 0x0>; /* PD23 periph A AD3 */ 434 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
434 }; 435 };
435 pinctrl_adc0_ad4: adc0_ad4 { 436 pinctrl_adc0_ad4: adc0_ad4 {
436 atmel,pins = 437 atmel,pins =
437 <3 24 0x1 0x0>; /* PD24 periph A AD4 */ 438 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
438 }; 439 };
439 pinctrl_adc0_ad5: adc0_ad5 { 440 pinctrl_adc0_ad5: adc0_ad5 {
440 atmel,pins = 441 atmel,pins =
441 <3 25 0x1 0x0>; /* PD25 periph A AD5 */ 442 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
442 }; 443 };
443 pinctrl_adc0_ad6: adc0_ad6 { 444 pinctrl_adc0_ad6: adc0_ad6 {
444 atmel,pins = 445 atmel,pins =
445 <3 26 0x1 0x0>; /* PD26 periph A AD6 */ 446 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
446 }; 447 };
447 pinctrl_adc0_ad7: adc0_ad7 { 448 pinctrl_adc0_ad7: adc0_ad7 {
448 atmel,pins = 449 atmel,pins =
449 <3 27 0x1 0x0>; /* PD27 periph A AD7 */ 450 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
450 }; 451 };
451 pinctrl_adc0_ad8: adc0_ad8 { 452 pinctrl_adc0_ad8: adc0_ad8 {
452 atmel,pins = 453 atmel,pins =
453 <3 28 0x1 0x0>; /* PD28 periph A AD8 */ 454 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
454 }; 455 };
455 pinctrl_adc0_ad9: adc0_ad9 { 456 pinctrl_adc0_ad9: adc0_ad9 {
456 atmel,pins = 457 atmel,pins =
457 <3 29 0x1 0x0>; /* PD29 periph A AD9 */ 458 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
458 }; 459 };
459 pinctrl_adc0_ad10: adc0_ad10 { 460 pinctrl_adc0_ad10: adc0_ad10 {
460 atmel,pins = 461 atmel,pins =
461 <3 30 0x1 0x0>; /* PD30 periph A AD10, conflicts with PCK0 */ 462 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
462 }; 463 };
463 pinctrl_adc0_ad11: adc0_ad11 { 464 pinctrl_adc0_ad11: adc0_ad11 {
464 atmel,pins = 465 atmel,pins =
465 <3 31 0x1 0x0>; /* PD31 periph A AD11, conflicts with PCK1 */ 466 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
466 }; 467 };
467 }; 468 };
468 469
469 can0 { 470 can0 {
470 pinctrl_can0_rx_tx: can0_rx_tx { 471 pinctrl_can0_rx_tx: can0_rx_tx {
471 atmel,pins = 472 atmel,pins =
472 <3 14 0x3 0x0 /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */ 473 <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
473 3 15 0x3 0x0>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */ 474 AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
474 }; 475 };
475 }; 476 };
476 477
477 can1 { 478 can1 {
478 pinctrl_can1_rx_tx: can1_rx_tx { 479 pinctrl_can1_rx_tx: can1_rx_tx {
479 atmel,pins = 480 atmel,pins =
480 <1 14 0x2 0x0 /* PB14 periph B RX, conflicts with GCRS */ 481 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
481 1 15 0x2 0x0>; /* PB15 periph B TX, conflicts with GCOL */ 482 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
482 }; 483 };
483 }; 484 };
484 485
485 dbgu { 486 dbgu {
486 pinctrl_dbgu: dbgu-0 { 487 pinctrl_dbgu: dbgu-0 {
487 atmel,pins = 488 atmel,pins =
488 <1 30 0x1 0x0 /* PB30 periph A */ 489 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
489 1 31 0x1 0x1>; /* PB31 periph A with pullup */ 490 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
490 }; 491 };
491 }; 492 };
492 493
493 i2c0 { 494 i2c0 {
494 pinctrl_i2c0: i2c0-0 { 495 pinctrl_i2c0: i2c0-0 {
495 atmel,pins = 496 atmel,pins =
496 <0 30 0x1 0x0 /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ 497 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
497 0 31 0x1 0x0>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ 498 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
498 }; 499 };
499 }; 500 };
500 501
501 i2c1 { 502 i2c1 {
502 pinctrl_i2c1: i2c1-0 { 503 pinctrl_i2c1: i2c1-0 {
503 atmel,pins = 504 atmel,pins =
504 <2 26 0x2 0x0 /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ 505 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
505 2 27 0x2 0x0>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ 506 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
506 }; 507 };
507 }; 508 };
508 509
509 isi { 510 isi {
510 pinctrl_isi: isi-0 { 511 pinctrl_isi: isi-0 {
511 atmel,pins = 512 atmel,pins =
512 <0 16 0x3 0x0 /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ 513 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
513 0 17 0x3 0x0 /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ 514 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
514 0 18 0x3 0x0 /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ 515 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
515 0 19 0x3 0x0 /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ 516 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
516 0 20 0x3 0x0 /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ 517 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
517 0 21 0x3 0x0 /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ 518 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
518 0 22 0x3 0x0 /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ 519 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
519 0 23 0x3 0x0 /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ 520 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
520 2 30 0x3 0x0 /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ 521 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
521 0 31 0x3 0x0 /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ 522 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
522 0 30 0x3 0x0 /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ 523 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
523 2 29 0x3 0x0 /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ 524 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
524 2 28 0x3 0x0>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ 525 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
525 }; 526 };
526 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 { 527 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
527 atmel,pins = 528 atmel,pins =
528 <3 31 0x2 0x0>; /* PD31 periph B ISI_MCK */ 529 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
529 }; 530 };
530 }; 531 };
531 532
532 lcd { 533 lcd {
533 pinctrl_lcd: lcd-0 { 534 pinctrl_lcd: lcd-0 {
534 atmel,pins = 535 atmel,pins =
535 <0 24 0x1 0x0 /* PA24 periph A LCDPWM */ 536 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
536 0 26 0x1 0x0 /* PA26 periph A LCDVSYNC */ 537 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
537 0 27 0x1 0x0 /* PA27 periph A LCDHSYNC */ 538 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
538 0 25 0x1 0x0 /* PA25 periph A LCDDISP */ 539 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
539 0 29 0x1 0x0 /* PA29 periph A LCDDEN */ 540 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
540 0 28 0x1 0x0 /* PA28 periph A LCDPCK */ 541 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
541 0 0 0x1 0x0 /* PA0 periph A LCDD0 pin */ 542 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
542 0 1 0x1 0x0 /* PA1 periph A LCDD1 pin */ 543 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
543 0 2 0x1 0x0 /* PA2 periph A LCDD2 pin */ 544 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
544 0 3 0x1 0x0 /* PA3 periph A LCDD3 pin */ 545 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
545 0 4 0x1 0x0 /* PA4 periph A LCDD4 pin */ 546 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
546 0 5 0x1 0x0 /* PA5 periph A LCDD5 pin */ 547 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
547 0 6 0x1 0x0 /* PA6 periph A LCDD6 pin */ 548 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
548 0 7 0x1 0x0 /* PA7 periph A LCDD7 pin */ 549 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
549 0 8 0x1 0x0 /* PA8 periph A LCDD8 pin */ 550 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
550 0 9 0x1 0x0 /* PA9 periph A LCDD9 pin */ 551 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
551 0 10 0x1 0x0 /* PA10 periph A LCDD10 pin */ 552 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
552 0 11 0x1 0x0 /* PA11 periph A LCDD11 pin */ 553 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
553 0 12 0x1 0x0 /* PA12 periph A LCDD12 pin */ 554 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
554 0 13 0x1 0x0 /* PA13 periph A LCDD13 pin */ 555 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
555 0 14 0x1 0x0 /* PA14 periph A LCDD14 pin */ 556 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
556 0 15 0x1 0x0 /* PA15 periph A LCDD15 pin */ 557 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
557 2 14 0x3 0x0 /* PC14 periph C LCDD16 pin */ 558 AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
558 2 13 0x3 0x0 /* PC13 periph C LCDD17 pin */ 559 AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
559 2 12 0x3 0x0 /* PC12 periph C LCDD18 pin */ 560 AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
560 2 11 0x3 0x0 /* PC11 periph C LCDD19 pin */ 561 AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
561 2 10 0x3 0x0 /* PC10 periph C LCDD20 pin */ 562 AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
562 2 15 0x3 0x0 /* PC15 periph C LCDD21 pin */ 563 AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
563 4 27 0x3 0x0 /* PE27 periph C LCDD22 pin */ 564 AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
564 4 28 0x3 0x0>; /* PE28 periph C LCDD23 pin */ 565 AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
565 }; 566 };
566 }; 567 };
567 568
568 macb0 { 569 macb0 {
569 pinctrl_macb0_data_rgmii: macb0_data_rgmii { 570 pinctrl_macb0_data_rgmii: macb0_data_rgmii {
570 atmel,pins = 571 atmel,pins =
571 <1 0 0x1 0x0 /* PB0 periph A GTX0, conflicts with PWMH0 */ 572 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
572 1 1 0x1 0x0 /* PB1 periph A GTX1, conflicts with PWML0 */ 573 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
573 1 2 0x1 0x0 /* PB2 periph A GTX2, conflicts with TK1 */ 574 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
574 1 3 0x1 0x0 /* PB3 periph A GTX3, conflicts with TF1 */ 575 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
575 1 4 0x1 0x0 /* PB4 periph A GRX0, conflicts with PWMH1 */ 576 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
576 1 5 0x1 0x0 /* PB5 periph A GRX1, conflicts with PWML1 */ 577 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
577 1 6 0x1 0x0 /* PB6 periph A GRX2, conflicts with TD1 */ 578 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
578 1 7 0x1 0x0>; /* PB7 periph A GRX3, conflicts with RK1 */ 579 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
579 }; 580 };
580 pinctrl_macb0_data_gmii: macb0_data_gmii { 581 pinctrl_macb0_data_gmii: macb0_data_gmii {
581 atmel,pins = 582 atmel,pins =
582 <1 19 0x2 0x0 /* PB19 periph B GTX4, conflicts with MCI1_CDA */ 583 <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
583 1 20 0x2 0x0 /* PB20 periph B GTX5, conflicts with MCI1_DA0 */ 584 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
584 1 21 0x2 0x0 /* PB21 periph B GTX6, conflicts with MCI1_DA1 */ 585 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
585 1 22 0x2 0x0 /* PB22 periph B GTX7, conflicts with MCI1_DA2 */ 586 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
586 1 23 0x2 0x0 /* PB23 periph B GRX4, conflicts with MCI1_DA3 */ 587 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
587 1 24 0x2 0x0 /* PB24 periph B GRX5, conflicts with MCI1_CK */ 588 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
588 1 25 0x2 0x0 /* PB25 periph B GRX6, conflicts with SCK1 */ 589 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
589 1 26 0x2 0x0>; /* PB26 periph B GRX7, conflicts with CTS1 */ 590 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
590 }; 591 };
591 pinctrl_macb0_signal_rgmii: macb0_signal_rgmii { 592 pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
592 atmel,pins = 593 atmel,pins =
593 <1 8 0x1 0x0 /* PB8 periph A GTXCK, conflicts with PWMH2 */ 594 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
594 1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */ 595 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
595 1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */ 596 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
596 1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */ 597 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
597 1 16 0x1 0x0 /* PB16 periph A GMDC */ 598 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
598 1 17 0x1 0x0 /* PB17 periph A GMDIO */ 599 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
599 1 18 0x1 0x0>; /* PB18 periph A G125CK */ 600 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
600 }; 601 };
601 pinctrl_macb0_signal_gmii: macb0_signal_gmii { 602 pinctrl_macb0_signal_gmii: macb0_signal_gmii {
602 atmel,pins = 603 atmel,pins =
603 <1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */ 604 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
604 1 10 0x1 0x0 /* PB10 periph A GTXER, conflicts with RF1 */ 605 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
605 1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */ 606 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
606 1 12 0x1 0x0 /* PB12 periph A GRXDV, conflicts with PWMH3 */ 607 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
607 1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */ 608 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
608 1 14 0x1 0x0 /* PB14 periph A GCRS, conflicts with CANRX1 */ 609 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
609 1 15 0x1 0x0 /* PB15 periph A GCOL, conflicts with CANTX1 */ 610 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
610 1 16 0x1 0x0 /* PB16 periph A GMDC */ 611 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
611 1 17 0x1 0x0 /* PB17 periph A GMDIO */ 612 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
612 1 27 0x2 0x0>; /* PB27 periph B G125CKO */ 613 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
613 }; 614 };
614 615
615 }; 616 };
@@ -617,252 +618,251 @@
617 macb1 { 618 macb1 {
618 pinctrl_macb1_rmii: macb1_rmii-0 { 619 pinctrl_macb1_rmii: macb1_rmii-0 {
619 atmel,pins = 620 atmel,pins =
620 <2 0 0x1 0x0 /* PC0 periph A ETX0, conflicts with TIOA3 */ 621 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
621 2 1 0x1 0x0 /* PC1 periph A ETX1, conflicts with TIOB3 */ 622 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
622 2 2 0x1 0x0 /* PC2 periph A ERX0, conflicts with TCLK3 */ 623 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
623 2 3 0x1 0x0 /* PC3 periph A ERX1, conflicts with TIOA4 */ 624 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
624 2 4 0x1 0x0 /* PC4 periph A ETXEN, conflicts with TIOB4 */ 625 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
625 2 5 0x1 0x0 /* PC5 periph A ECRSDV,conflicts with TCLK4 */ 626 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
626 2 6 0x1 0x0 /* PC6 periph A ERXER, conflicts with TIOA5 */ 627 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
627 2 7 0x1 0x0 /* PC7 periph A EREFCK, conflicts with TIOB5 */ 628 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
628 2 8 0x1 0x0 /* PC8 periph A EMDC, conflicts with TCLK5 */ 629 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
629 2 9 0x1 0x0>; /* PC9 periph A EMDIO */ 630 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
630 }; 631 };
631 }; 632 };
632 633
633 mmc0 { 634 mmc0 {
634 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 635 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
635 atmel,pins = 636 atmel,pins =
636 <3 9 0x1 0x0 /* PD9 periph A MCI0_CK */ 637 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
637 3 0 0x1 0x1 /* PD0 periph A MCI0_CDA with pullup */ 638 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
638 3 1 0x1 0x1>; /* PD1 periph A MCI0_DA0 with pullup */ 639 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
639 }; 640 };
640 pinctrl_mmc0_dat1_3: mmc0_dat1_3 { 641 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
641 atmel,pins = 642 atmel,pins =
642 <3 2 0x1 0x1 /* PD2 periph A MCI0_DA1 with pullup */ 643 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
643 3 3 0x1 0x1 /* PD3 periph A MCI0_DA2 with pullup */ 644 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
644 3 4 0x1 0x1>; /* PD4 periph A MCI0_DA3 with pullup */ 645 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
645 }; 646 };
646 pinctrl_mmc0_dat4_7: mmc0_dat4_7 { 647 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
647 atmel,pins = 648 atmel,pins =
648 <3 5 0x1 0x1 /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ 649 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
649 3 6 0x1 0x1 /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ 650 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
650 3 7 0x1 0x1 /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */ 651 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
651 3 8 0x1 0x1>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ 652 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
652 }; 653 };
653 }; 654 };
654 655
655 mmc1 { 656 mmc1 {
656 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { 657 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
657 atmel,pins = 658 atmel,pins =
658 <1 24 0x1 0x0 /* PB24 periph A MCI1_CK, conflicts with GRX5 */ 659 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
659 1 19 0x1 0x1 /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ 660 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
660 1 20 0x1 0x1>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ 661 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
661 }; 662 };
662 pinctrl_mmc1_dat1_3: mmc1_dat1_3 { 663 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
663 atmel,pins = 664 atmel,pins =
664 <1 21 0x1 0x1 /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ 665 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
665 1 22 0x1 0x1 /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ 666 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
666 1 23 0x1 0x1>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ 667 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
667 }; 668 };
668 }; 669 };
669 670
670 mmc2 { 671 mmc2 {
671 pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 { 672 pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
672 atmel,pins = 673 atmel,pins =
673 <2 15 0x1 0x0 /* PC15 periph A MCI2_CK, conflicts with PCK2 */ 674 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
674 2 10 0x1 0x1 /* PC10 periph A MCI2_CDA with pullup */ 675 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
675 2 11 0x1 0x1>; /* PC11 periph A MCI2_DA0 with pullup */ 676 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
676 }; 677 };
677 pinctrl_mmc2_dat1_3: mmc2_dat1_3 { 678 pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
678 atmel,pins = 679 atmel,pins =
679 <2 12 0x1 0x0 /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ 680 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
680 2 13 0x1 0x0 /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ 681 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
681 2 14 0x1 0x0>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ 682 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
682 }; 683 };
683 }; 684 };
684 685
685 nand0 { 686 nand0 {
686 pinctrl_nand0_ale_cle: nand0_ale_cle-0 { 687 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
687 atmel,pins = 688 atmel,pins =
688 <4 21 0x1 0x1 /* PE21 periph A with pullup */ 689 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
689 4 22 0x1 0x1>; /* PE22 periph A with pullup */ 690 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
690 }; 691 };
691 }; 692 };
692 693
693 pioA: gpio@fffff200 {
694 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
695 reg = <0xfffff200 0x100>;
696 interrupts = <6 4 1>;
697 #gpio-cells = <2>;
698 gpio-controller;
699 interrupt-controller;
700 #interrupt-cells = <2>;
701 };
702
703 pioB: gpio@fffff400 {
704 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
705 reg = <0xfffff400 0x100>;
706 interrupts = <7 4 1>;
707 #gpio-cells = <2>;
708 gpio-controller;
709 interrupt-controller;
710 #interrupt-cells = <2>;
711 };
712
713 pioC: gpio@fffff600 {
714 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
715 reg = <0xfffff600 0x100>;
716 interrupts = <8 4 1>;
717 #gpio-cells = <2>;
718 gpio-controller;
719 interrupt-controller;
720 #interrupt-cells = <2>;
721 };
722
723 pioD: gpio@fffff800 {
724 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
725 reg = <0xfffff800 0x100>;
726 interrupts = <9 4 1>;
727 #gpio-cells = <2>;
728 gpio-controller;
729 interrupt-controller;
730 #interrupt-cells = <2>;
731 };
732
733 pioE: gpio@fffffa00 {
734 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
735 reg = <0xfffffa00 0x100>;
736 interrupts = <10 4 1>;
737 #gpio-cells = <2>;
738 gpio-controller;
739 interrupt-controller;
740 #interrupt-cells = <2>;
741 };
742
743 spi0 { 694 spi0 {
744 pinctrl_spi0: spi0-0 { 695 pinctrl_spi0: spi0-0 {
745 atmel,pins = 696 atmel,pins =
746 <3 10 0x1 0x0 /* PD10 periph A SPI0_MISO pin */ 697 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
747 3 11 0x1 0x0 /* PD11 periph A SPI0_MOSI pin */ 698 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
748 3 12 0x1 0x0 /* PD12 periph A SPI0_SPCK pin */ 699 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
749 3 13 0x0 0x0>; /* PD13 GPIO SPI0_NPCS0 pin */
750 }; 700 };
751 }; 701 };
752 702
753 spi1 { 703 spi1 {
754 pinctrl_spi1: spi1-0 { 704 pinctrl_spi1: spi1-0 {
755 atmel,pins = 705 atmel,pins =
756 <2 22 0x1 0x0 /* PC22 periph A SPI1_MISO pin */ 706 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
757 2 23 0x1 0x0 /* PC23 periph A SPI1_MOSI pin */ 707 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
758 2 24 0x1 0x0 /* PC24 periph A SPI1_SPCK pin */ 708 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
759 2 25 0x0 0x0>; /* PC25 GPIO SPI1_NPCS0 pin */
760 }; 709 };
761 }; 710 };
762 711
763 ssc0 { 712 ssc0 {
764 pinctrl_ssc0_tx: ssc0_tx { 713 pinctrl_ssc0_tx: ssc0_tx {
765 atmel,pins = 714 atmel,pins =
766 <2 16 0x1 0x0 /* PC16 periph A TK0 */ 715 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
767 2 17 0x1 0x0 /* PC17 periph A TF0 */ 716 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
768 2 18 0x1 0x0>; /* PC18 periph A TD0 */ 717 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
769 }; 718 };
770 719
771 pinctrl_ssc0_rx: ssc0_rx { 720 pinctrl_ssc0_rx: ssc0_rx {
772 atmel,pins = 721 atmel,pins =
773 <2 19 0x1 0x0 /* PC19 periph A RK0 */ 722 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
774 2 20 0x1 0x0 /* PC20 periph A RF0 */ 723 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
775 2 21 0x1 0x0>; /* PC21 periph A RD0 */ 724 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
776 }; 725 };
777 }; 726 };
778 727
779 ssc1 { 728 ssc1 {
780 pinctrl_ssc1_tx: ssc1_tx { 729 pinctrl_ssc1_tx: ssc1_tx {
781 atmel,pins = 730 atmel,pins =
782 <1 2 0x2 0x0 /* PB2 periph B TK1, conflicts with GTX2 */ 731 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
783 1 3 0x2 0x0 /* PB3 periph B TF1, conflicts with GTX3 */ 732 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
784 1 6 0x2 0x0>; /* PB6 periph B TD1, conflicts with TD1 */ 733 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
785 }; 734 };
786 735
787 pinctrl_ssc1_rx: ssc1_rx { 736 pinctrl_ssc1_rx: ssc1_rx {
788 atmel,pins = 737 atmel,pins =
789 <1 7 0x2 0x0 /* PB7 periph B RK1, conflicts with EREFCK */ 738 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
790 1 10 0x2 0x0 /* PB10 periph B RF1, conflicts with GTXER */ 739 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
791 1 11 0x2 0x0>; /* PB11 periph B RD1, conflicts with GRXCK */ 740 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
792 }; 741 };
793 }; 742 };
794 743
795 uart0 { 744 uart0 {
796 pinctrl_uart0: uart0-0 { 745 pinctrl_uart0: uart0-0 {
797 atmel,pins = 746 atmel,pins =
798 <2 29 0x1 0x0 /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */ 747 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
799 2 30 0x1 0x1>; /* PC30 periph A with pullup, conflicts with ISI_PCK */ 748 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
800 }; 749 };
801 }; 750 };
802 751
803 uart1 { 752 uart1 {
804 pinctrl_uart1: uart1-0 { 753 pinctrl_uart1: uart1-0 {
805 atmel,pins = 754 atmel,pins =
806 <0 30 0x2 0x0 /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */ 755 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
807 0 31 0x2 0x1>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */ 756 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
808 }; 757 };
809 }; 758 };
810 759
811 usart0 { 760 usart0 {
812 pinctrl_usart0: usart0-0 { 761 pinctrl_usart0: usart0-0 {
813 atmel,pins = 762 atmel,pins =
814 <3 17 0x1 0x0 /* PD17 periph A */ 763 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
815 3 18 0x1 0x1>; /* PD18 periph A with pullup */ 764 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
816 }; 765 };
817 766
818 pinctrl_usart0_rts_cts: usart0_rts_cts-0 { 767 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
819 atmel,pins = 768 atmel,pins =
820 <3 15 0x1 0x0 /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ 769 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
821 3 16 0x1 0x0>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ 770 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
822 }; 771 };
823 }; 772 };
824 773
825 usart1 { 774 usart1 {
826 pinctrl_usart1: usart1-0 { 775 pinctrl_usart1: usart1-0 {
827 atmel,pins = 776 atmel,pins =
828 <1 28 0x1 0x0 /* PB28 periph A */ 777 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
829 1 29 0x1 0x1>; /* PB29 periph A with pullup */ 778 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
830 }; 779 };
831 780
832 pinctrl_usart1_rts_cts: usart1_rts_cts-0 { 781 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
833 atmel,pins = 782 atmel,pins =
834 <1 26 0x1 0x0 /* PB26 periph A, conflicts with GRX7 */ 783 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
835 1 27 0x1 0x0>; /* PB27 periph A, conflicts with G125CKO */ 784 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
836 }; 785 };
837 }; 786 };
838 787
839 usart2 { 788 usart2 {
840 pinctrl_usart2: usart2-0 { 789 pinctrl_usart2: usart2-0 {
841 atmel,pins = 790 atmel,pins =
842 <4 25 0x2 0x0 /* PE25 periph B, conflicts with A25 */ 791 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
843 4 26 0x2 0x1>; /* PE26 periph B with pullup, conflicts NCS0 */ 792 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
844 }; 793 };
845 794
846 pinctrl_usart2_rts_cts: usart2_rts_cts-0 { 795 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
847 atmel,pins = 796 atmel,pins =
848 <4 23 0x2 0x0 /* PE23 periph B, conflicts with A23 */ 797 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
849 4 24 0x2 0x0>; /* PE24 periph B, conflicts with A24 */ 798 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
850 }; 799 };
851 }; 800 };
852 801
853 usart3 { 802 usart3 {
854 pinctrl_usart3: usart3-0 { 803 pinctrl_usart3: usart3-0 {
855 atmel,pins = 804 atmel,pins =
856 <4 18 0x2 0x0 /* PE18 periph B, conflicts with A18 */ 805 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
857 4 19 0x2 0x1>; /* PE19 periph B with pullup, conflicts with A19 */ 806 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
858 }; 807 };
859 808
860 pinctrl_usart3_rts_cts: usart3_rts_cts-0 { 809 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
861 atmel,pins = 810 atmel,pins =
862 <4 16 0x2 0x0 /* PE16 periph B, conflicts with A16 */ 811 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
863 4 17 0x2 0x0>; /* PE17 periph B, conflicts with A17 */ 812 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
864 }; 813 };
865 }; 814 };
815
816
817 pioA: gpio@fffff200 {
818 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
819 reg = <0xfffff200 0x100>;
820 interrupts = <6 4 1>;
821 #gpio-cells = <2>;
822 gpio-controller;
823 interrupt-controller;
824 #interrupt-cells = <2>;
825 };
826
827 pioB: gpio@fffff400 {
828 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
829 reg = <0xfffff400 0x100>;
830 interrupts = <7 4 1>;
831 #gpio-cells = <2>;
832 gpio-controller;
833 interrupt-controller;
834 #interrupt-cells = <2>;
835 };
836
837 pioC: gpio@fffff600 {
838 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
839 reg = <0xfffff600 0x100>;
840 interrupts = <8 4 1>;
841 #gpio-cells = <2>;
842 gpio-controller;
843 interrupt-controller;
844 #interrupt-cells = <2>;
845 };
846
847 pioD: gpio@fffff800 {
848 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
849 reg = <0xfffff800 0x100>;
850 interrupts = <9 4 1>;
851 #gpio-cells = <2>;
852 gpio-controller;
853 interrupt-controller;
854 #interrupt-cells = <2>;
855 };
856
857 pioE: gpio@fffffa00 {
858 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
859 reg = <0xfffffa00 0x100>;
860 interrupts = <10 4 1>;
861 #gpio-cells = <2>;
862 gpio-controller;
863 interrupt-controller;
864 #interrupt-cells = <2>;
865 };
866 }; 866 };
867 867
868 pmc: pmc@fffffc00 { 868 pmc: pmc@fffffc00 {
diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi b/arch/arm/boot/dts/sama5d3xdm.dtsi
index 4b8830eb2060..1c296d6b2f2a 100644
--- a/arch/arm/boot/dts/sama5d3xdm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xdm.dtsi
@@ -33,7 +33,7 @@
33 board { 33 board {
34 pinctrl_qt1070_irq: qt1070_irq { 34 pinctrl_qt1070_irq: qt1070_irq {
35 atmel,pins = 35 atmel,pins =
36 <4 31 0x0 0x5>; /* PE31 GPIO with pull up deglith */ 36 <AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE31 GPIO with pull up deglith */
37 }; 37 };
38 }; 38 };
39 }; 39 };
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 205e64c5ddee..8a9e05d8a4b8 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -87,32 +87,32 @@
87 board { 87 board {
88 pinctrl_mmc0_cd: mmc0_cd { 88 pinctrl_mmc0_cd: mmc0_cd {
89 atmel,pins = 89 atmel,pins =
90 <3 17 0x0 0x5>; /* PD17 GPIO with pullup deglitch */ 90 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */
91 }; 91 };
92 92
93 pinctrl_mmc1_cd: mmc1_cd { 93 pinctrl_mmc1_cd: mmc1_cd {
94 atmel,pins = 94 atmel,pins =
95 <3 18 0x0 0x5>; /* PD18 GPIO with pullup deglitch */ 95 <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */
96 }; 96 };
97 97
98 pinctrl_pck0_as_audio_mck: pck0_as_audio_mck { 98 pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
99 atmel,pins = 99 atmel,pins =
100 <3 30 0x2 0x0>; /* PD30 periph B */ 100 <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */
101 }; 101 };
102 102
103 pinctrl_isi_reset: isi_reset-0 { 103 pinctrl_isi_reset: isi_reset-0 {
104 atmel,pins = 104 atmel,pins =
105 <4 24 0x0 0x0>; /* PE24 gpio */ 105 <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */
106 }; 106 };
107 107
108 pinctrl_isi_power: isi_power-0 { 108 pinctrl_isi_power: isi_power-0 {
109 atmel,pins = 109 atmel,pins =
110 <4 29 0x0 0x0>; /* PE29 gpio */ 110 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */
111 }; 111 };
112 112
113 pinctrl_usba_vbus: usba_vbus { 113 pinctrl_usba_vbus: usba_vbus {
114 atmel,pins = 114 atmel,pins =
115 <3 29 0x0 0x4>; /* PD29 GPIO with deglitch */ 115 <AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */
116 }; 116 };
117 }; 117 };
118 }; 118 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-20 23:14:34 -0400