diff options
Diffstat (limited to 'arch/arm/boot/dts/at91rm9200.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/at91rm9200.dtsi | 151 |
1 files changed, 76 insertions, 75 deletions
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi index 7ebfe6c6c360..361a957767c4 100644 --- a/arch/arm/boot/dts/at91rm9200.dtsi +++ b/arch/arm/boot/dts/at91rm9200.dtsi | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | #include "skeleton.dtsi" | 13 | #include "skeleton.dtsi" |
| 14 | #include <dt-bindings/pinctrl/at91.h> | ||
| 14 | #include <dt-bindings/gpio/gpio.h> | 15 | #include <dt-bindings/gpio/gpio.h> |
| 15 | 16 | ||
| 16 | / { | 17 | / { |
| @@ -168,227 +169,227 @@ | |||
| 168 | dbgu { | 169 | dbgu { |
| 169 | pinctrl_dbgu: dbgu-0 { | 170 | pinctrl_dbgu: dbgu-0 { |
| 170 | atmel,pins = | 171 | atmel,pins = |
| 171 | <0 30 0x1 0x0 /* PA30 periph A */ | 172 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */ |
| 172 | 0 31 0x1 0x1>; /* PA31 periph with pullup */ | 173 | AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */ |
| 173 | }; | 174 | }; |
| 174 | }; | 175 | }; |
| 175 | 176 | ||
| 176 | uart0 { | 177 | uart0 { |
| 177 | pinctrl_uart0: uart0-0 { | 178 | pinctrl_uart0: uart0-0 { |
| 178 | atmel,pins = | 179 | atmel,pins = |
| 179 | <0 17 0x1 0x0 /* PA17 periph A */ | 180 | <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ |
| 180 | 0 18 0x1 0x0>; /* PA18 periph A */ | 181 | AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */ |
| 181 | }; | 182 | }; |
| 182 | 183 | ||
| 183 | pinctrl_uart0_rts: uart0_rts-0 { | 184 | pinctrl_uart0_rts: uart0_rts-0 { |
| 184 | atmel,pins = | 185 | atmel,pins = |
| 185 | <0 20 0x1 0x0>; /* PA20 periph A */ | 186 | <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */ |
| 186 | }; | 187 | }; |
| 187 | 188 | ||
| 188 | pinctrl_uart0_cts: uart0_cts-0 { | 189 | pinctrl_uart0_cts: uart0_cts-0 { |
| 189 | atmel,pins = | 190 | atmel,pins = |
| 190 | <0 21 0x1 0x0>; /* PA21 periph A */ | 191 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ |
| 191 | }; | 192 | }; |
| 192 | }; | 193 | }; |
| 193 | 194 | ||
| 194 | uart1 { | 195 | uart1 { |
| 195 | pinctrl_uart1: uart1-0 { | 196 | pinctrl_uart1: uart1-0 { |
| 196 | atmel,pins = | 197 | atmel,pins = |
| 197 | <1 20 0x1 0x1 /* PB20 periph A with pullup */ | 198 | <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */ |
| 198 | 1 21 0x1 0x0>; /* PB21 periph A */ | 199 | AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ |
| 199 | }; | 200 | }; |
| 200 | 201 | ||
| 201 | pinctrl_uart1_rts: uart1_rts-0 { | 202 | pinctrl_uart1_rts: uart1_rts-0 { |
| 202 | atmel,pins = | 203 | atmel,pins = |
| 203 | <1 24 0x1 0x0>; /* PB24 periph A */ | 204 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */ |
| 204 | }; | 205 | }; |
| 205 | 206 | ||
| 206 | pinctrl_uart1_cts: uart1_cts-0 { | 207 | pinctrl_uart1_cts: uart1_cts-0 { |
| 207 | atmel,pins = | 208 | atmel,pins = |
| 208 | <1 26 0x1 0x0>; /* PB26 periph A */ | 209 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ |
| 209 | }; | 210 | }; |
| 210 | 211 | ||
| 211 | pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 { | 212 | pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 { |
| 212 | atmel,pins = | 213 | atmel,pins = |
| 213 | <1 19 0x1 0x0 /* PB19 periph A */ | 214 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ |
| 214 | 1 25 0x1 0x0>; /* PB25 periph A */ | 215 | AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ |
| 215 | }; | 216 | }; |
| 216 | 217 | ||
| 217 | pinctrl_uart1_dcd: uart1_dcd-0 { | 218 | pinctrl_uart1_dcd: uart1_dcd-0 { |
| 218 | atmel,pins = | 219 | atmel,pins = |
| 219 | <1 23 0x1 0x0>; /* PB23 periph A */ | 220 | <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ |
| 220 | }; | 221 | }; |
| 221 | 222 | ||
| 222 | pinctrl_uart1_ri: uart1_ri-0 { | 223 | pinctrl_uart1_ri: uart1_ri-0 { |
| 223 | atmel,pins = | 224 | atmel,pins = |
| 224 | <1 18 0x1 0x0>; /* PB18 periph A */ | 225 | <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ |
| 225 | }; | 226 | }; |
| 226 | }; | 227 | }; |
| 227 | 228 | ||
| 228 | uart2 { | 229 | uart2 { |
| 229 | pinctrl_uart2: uart2-0 { | 230 | pinctrl_uart2: uart2-0 { |
| 230 | atmel,pins = | 231 | atmel,pins = |
| 231 | <0 22 0x1 0x0 /* PA22 periph A */ | 232 | <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */ |
| 232 | 0 23 0x1 0x1>; /* PA23 periph A with pullup */ | 233 | AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */ |
| 233 | }; | 234 | }; |
| 234 | 235 | ||
| 235 | pinctrl_uart2_rts: uart2_rts-0 { | 236 | pinctrl_uart2_rts: uart2_rts-0 { |
| 236 | atmel,pins = | 237 | atmel,pins = |
| 237 | <0 30 0x2 0x0>; /* PA30 periph B */ | 238 | <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ |
| 238 | }; | 239 | }; |
| 239 | 240 | ||
| 240 | pinctrl_uart2_cts: uart2_cts-0 { | 241 | pinctrl_uart2_cts: uart2_cts-0 { |
| 241 | atmel,pins = | 242 | atmel,pins = |
| 242 | <0 31 0x2 0x0>; /* PA31 periph B */ | 243 | <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */ |
| 243 | }; | 244 | }; |
| 244 | }; | 245 | }; |
| 245 | 246 | ||
| 246 | uart3 { | 247 | uart3 { |
| 247 | pinctrl_uart3: uart3-0 { | 248 | pinctrl_uart3: uart3-0 { |
| 248 | atmel,pins = | 249 | atmel,pins = |
| 249 | <0 5 0x2 0x1 /* PA5 periph B with pullup */ | 250 | <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ |
| 250 | 0 6 0x2 0x0>; /* PA6 periph B */ | 251 | AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */ |
| 251 | }; | 252 | }; |
| 252 | 253 | ||
| 253 | pinctrl_uart3_rts: uart3_rts-0 { | 254 | pinctrl_uart3_rts: uart3_rts-0 { |
| 254 | atmel,pins = | 255 | atmel,pins = |
| 255 | <1 0 0x2 0x0>; /* PB0 periph B */ | 256 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ |
| 256 | }; | 257 | }; |
| 257 | 258 | ||
| 258 | pinctrl_uart3_cts: uart3_cts-0 { | 259 | pinctrl_uart3_cts: uart3_cts-0 { |
| 259 | atmel,pins = | 260 | atmel,pins = |
| 260 | <1 1 0x2 0x0>; /* PB1 periph B */ | 261 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ |
| 261 | }; | 262 | }; |
| 262 | }; | 263 | }; |
| 263 | 264 | ||
| 264 | nand { | 265 | nand { |
| 265 | pinctrl_nand: nand-0 { | 266 | pinctrl_nand: nand-0 { |
| 266 | atmel,pins = | 267 | atmel,pins = |
| 267 | <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */ | 268 | <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */ |
| 268 | 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */ | 269 | AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */ |
| 269 | }; | 270 | }; |
| 270 | }; | 271 | }; |
| 271 | 272 | ||
| 272 | macb { | 273 | macb { |
| 273 | pinctrl_macb_rmii: macb_rmii-0 { | 274 | pinctrl_macb_rmii: macb_rmii-0 { |
| 274 | atmel,pins = | 275 | atmel,pins = |
| 275 | <0 7 0x1 0x0 /* PA7 periph A */ | 276 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */ |
| 276 | 0 8 0x1 0x0 /* PA8 periph A */ | 277 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */ |
| 277 | 0 9 0x1 0x0 /* PA9 periph A */ | 278 | AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ |
| 278 | 0 10 0x1 0x0 /* PA10 periph A */ | 279 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ |
| 279 | 0 11 0x1 0x0 /* PA11 periph A */ | 280 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ |
| 280 | 0 12 0x1 0x0 /* PA12 periph A */ | 281 | AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ |
| 281 | 0 13 0x1 0x0 /* PA13 periph A */ | 282 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ |
| 282 | 0 14 0x1 0x0 /* PA14 periph A */ | 283 | AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ |
| 283 | 0 15 0x1 0x0 /* PA15 periph A */ | 284 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ |
| 284 | 0 16 0x1 0x0>; /* PA16 periph A */ | 285 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */ |
| 285 | }; | 286 | }; |
| 286 | 287 | ||
| 287 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | 288 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| 288 | atmel,pins = | 289 | atmel,pins = |
| 289 | <1 12 0x2 0x0 /* PB12 periph B */ | 290 | <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */ |
| 290 | 1 13 0x2 0x0 /* PB13 periph B */ | 291 | AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */ |
| 291 | 1 14 0x2 0x0 /* PB14 periph B */ | 292 | AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */ |
| 292 | 1 15 0x2 0x0 /* PB15 periph B */ | 293 | AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */ |
| 293 | 1 16 0x2 0x0 /* PB16 periph B */ | 294 | AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */ |
| 294 | 1 17 0x2 0x0 /* PB17 periph B */ | 295 | AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */ |
| 295 | 1 18 0x2 0x0 /* PB18 periph B */ | 296 | AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */ |
| 296 | 1 19 0x2 0x0>; /* PB19 periph B */ | 297 | AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */ |
| 297 | }; | 298 | }; |
| 298 | }; | 299 | }; |
| 299 | 300 | ||
| 300 | mmc0 { | 301 | mmc0 { |
| 301 | pinctrl_mmc0_clk: mmc0_clk-0 { | 302 | pinctrl_mmc0_clk: mmc0_clk-0 { |
| 302 | atmel,pins = | 303 | atmel,pins = |
| 303 | <0 27 0x1 0x0>; /* PA27 periph A */ | 304 | <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ |
| 304 | }; | 305 | }; |
| 305 | 306 | ||
| 306 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | 307 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { |
| 307 | atmel,pins = | 308 | atmel,pins = |
| 308 | <0 28 0x1 0x1 /* PA28 periph A with pullup */ | 309 | <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ |
| 309 | 0 29 0x1 0x1>; /* PA29 periph A with pullup */ | 310 | AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */ |
| 310 | }; | 311 | }; |
| 311 | 312 | ||
| 312 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | 313 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
| 313 | atmel,pins = | 314 | atmel,pins = |
| 314 | <1 3 0x2 0x1 /* PB3 periph B with pullup */ | 315 | <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */ |
| 315 | 1 4 0x2 0x1 /* PB4 periph B with pullup */ | 316 | AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */ |
| 316 | 1 5 0x2 0x1>; /* PB5 periph B with pullup */ | 317 | AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */ |
| 317 | }; | 318 | }; |
| 318 | 319 | ||
| 319 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { | 320 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { |
| 320 | atmel,pins = | 321 | atmel,pins = |
| 321 | <0 8 0x2 0x1 /* PA8 periph B with pullup */ | 322 | <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */ |
| 322 | 0 9 0x2 0x1>; /* PA9 periph B with pullup */ | 323 | AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */ |
| 323 | }; | 324 | }; |
| 324 | 325 | ||
| 325 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { | 326 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { |
| 326 | atmel,pins = | 327 | atmel,pins = |
| 327 | <0 10 0x2 0x1 /* PA10 periph B with pullup */ | 328 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */ |
| 328 | 0 11 0x2 0x1 /* PA11 periph B with pullup */ | 329 | AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */ |
| 329 | 0 12 0x2 0x1>; /* PA12 periph B with pullup */ | 330 | AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */ |
| 330 | }; | 331 | }; |
| 331 | }; | 332 | }; |
| 332 | 333 | ||
| 333 | ssc0 { | 334 | ssc0 { |
| 334 | pinctrl_ssc0_tx: ssc0_tx-0 { | 335 | pinctrl_ssc0_tx: ssc0_tx-0 { |
| 335 | atmel,pins = | 336 | atmel,pins = |
| 336 | <1 0 0x1 0x0 /* PB0 periph A */ | 337 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ |
| 337 | 1 1 0x1 0x0 /* PB1 periph A */ | 338 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ |
| 338 | 1 2 0x1 0x0>; /* PB2 periph A */ | 339 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */ |
| 339 | }; | 340 | }; |
| 340 | 341 | ||
| 341 | pinctrl_ssc0_rx: ssc0_rx-0 { | 342 | pinctrl_ssc0_rx: ssc0_rx-0 { |
| 342 | atmel,pins = | 343 | atmel,pins = |
| 343 | <1 3 0x1 0x0 /* PB3 periph A */ | 344 | <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ |
| 344 | 1 4 0x1 0x0 /* PB4 periph A */ | 345 | AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ |
| 345 | 1 5 0x1 0x0>; /* PB5 periph A */ | 346 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ |
| 346 | }; | 347 | }; |
| 347 | }; | 348 | }; |
| 348 | 349 | ||
| 349 | ssc1 { | 350 | ssc1 { |
| 350 | pinctrl_ssc1_tx: ssc1_tx-0 { | 351 | pinctrl_ssc1_tx: ssc1_tx-0 { |
| 351 | atmel,pins = | 352 | atmel,pins = |
| 352 | <1 6 0x1 0x0 /* PB6 periph A */ | 353 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ |
| 353 | 1 7 0x1 0x0 /* PB7 periph A */ | 354 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ |
| 354 | 1 8 0x1 0x0>; /* PB8 periph A */ | 355 | AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ |
| 355 | }; | 356 | }; |
| 356 | 357 | ||
| 357 | pinctrl_ssc1_rx: ssc1_rx-0 { | 358 | pinctrl_ssc1_rx: ssc1_rx-0 { |
| 358 | atmel,pins = | 359 | atmel,pins = |
| 359 | <1 9 0x1 0x0 /* PB9 periph A */ | 360 | <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ |
| 360 | 1 10 0x1 0x0 /* PB10 periph A */ | 361 | AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ |
| 361 | 1 11 0x1 0x0>; /* PB11 periph A */ | 362 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ |
| 362 | }; | 363 | }; |
| 363 | }; | 364 | }; |
| 364 | 365 | ||
| 365 | ssc2 { | 366 | ssc2 { |
| 366 | pinctrl_ssc2_tx: ssc2_tx-0 { | 367 | pinctrl_ssc2_tx: ssc2_tx-0 { |
| 367 | atmel,pins = | 368 | atmel,pins = |
| 368 | <1 12 0x1 0x0 /* PB12 periph A */ | 369 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ |
| 369 | 1 13 0x1 0x0 /* PB13 periph A */ | 370 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ |
| 370 | 1 14 0x1 0x0>; /* PB14 periph A */ | 371 | AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */ |
| 371 | }; | 372 | }; |
| 372 | 373 | ||
| 373 | pinctrl_ssc2_rx: ssc2_rx-0 { | 374 | pinctrl_ssc2_rx: ssc2_rx-0 { |
| 374 | atmel,pins = | 375 | atmel,pins = |
| 375 | <1 15 0x1 0x0 /* PB15 periph A */ | 376 | <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ |
| 376 | 1 16 0x1 0x0 /* PB16 periph A */ | 377 | AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ |
| 377 | 1 17 0x1 0x0>; /* PB17 periph A */ | 378 | AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ |
| 378 | }; | 379 | }; |
| 379 | }; | 380 | }; |
| 380 | 381 | ||
| 381 | twi { | 382 | twi { |
| 382 | pinctrl_twi: twi-0 { | 383 | pinctrl_twi: twi-0 { |
| 383 | atmel,pins = | 384 | atmel,pins = |
| 384 | <0 25 0x1 0x2 /* PA25 periph A with multi drive */ | 385 | <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */ |
| 385 | 0 26 0x1 0x2>; /* PA26 periph A with multi drive */ | 386 | AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */ |
| 386 | }; | 387 | }; |
| 387 | 388 | ||
| 388 | pinctrl_twi_gpio: twi_gpio-0 { | 389 | pinctrl_twi_gpio: twi_gpio-0 { |
| 389 | atmel,pins = | 390 | atmel,pins = |
| 390 | <0 25 0x0 0x2 /* PA25 GPIO with multi drive */ | 391 | <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */ |
| 391 | 0 26 0x0 0x2>; /* PA26 GPIO with multi drive */ | 392 | AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */ |
| 392 | }; | 393 | }; |
| 393 | }; | 394 | }; |
| 394 | 395 | ||