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authorMichal Simek <michal.simek@xilinx.com>2014-07-23 09:03:03 -0400
committerMichal Simek <michal.simek@xilinx.com>2014-07-29 01:31:40 -0400
commitfdf26183781bf4c2e80b6a84146d95b875aa1b2d (patch)
tree1a1dce2df0f64f39288d7f28668fe5fce91aaf94 /arch/arm/boot/dts/zynq-7000.dtsi
parentf07ab7a0f36a3cfcd675bf120156e36cf66d9583 (diff)
ARM: zynq: DT: Add CAN node
Add node describing Zynq's CAN controller. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi26
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index ef11dab30446..6cc83d4c6c76 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -71,7 +71,31 @@
71 interrupts = <0 7 4>; 71 interrupts = <0 7 4>;
72 interrupt-parent = <&intc>; 72 interrupt-parent = <&intc>;
73 clocks = <&clkc 12>; 73 clocks = <&clkc 12>;
74 }; 74 };
75
76 can0: can@e0008000 {
77 compatible = "xlnx,zynq-can-1.0";
78 status = "disabled";
79 clocks = <&clkc 19>, <&clkc 36>;
80 clock-names = "can_clk", "pclk";
81 reg = <0xe0008000 0x1000>;
82 interrupts = <0 28 4>;
83 interrupt-parent = <&intc>;
84 tx-fifo-depth = <0x40>;
85 rx-fifo-depth = <0x40>;
86 };
87
88 can1: can@e0009000 {
89 compatible = "xlnx,zynq-can-1.0";
90 status = "disabled";
91 clocks = <&clkc 20>, <&clkc 37>;
92 clock-names = "can_clk", "pclk";
93 reg = <0xe0009000 0x1000>;
94 interrupts = <0 51 4>;
95 interrupt-parent = <&intc>;
96 tx-fifo-depth = <0x40>;
97 rx-fifo-depth = <0x40>;
98 };
75 99
76 gpio0: gpio@e000a000 { 100 gpio0: gpio@e000a000 {
77 compatible = "xlnx,zynq-gpio-1.0"; 101 compatible = "xlnx,zynq-gpio-1.0";