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authorTony Prisk <linux@prisktech.co.nz>2013-01-17 21:05:31 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-01-17 21:54:32 -0500
commit12faa35ae5cbfbd0d90e2103688e87ceb46c5886 (patch)
tree483496c3aab85cb54e0d8d19cba2f814718aa44d /arch/arm/boot/dts/wm8650.dtsi
parent962963e4ee23bc7518dfee754de5f20d35de71d9 (diff)
serial: vt8500: UART uses gated clock rather than 24Mhz reference
UART modules on Wondermedia SoCs are connected via a gated clock source, rather than directly to the 24Mhz reference clock. While uboot enables UART0 for debugging, other UART ports are unavailable until the clock is enabled. This patch checks that a valid clock is actually passed from devicetree, enables the clock in probe. This change removes the fallback when a clock was not specified as it doesn't apply any longer (and would only work if the UART clock was already enabled). DTSI files are updated for VT8500, WM8505 and WM8650. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/boot/dts/wm8650.dtsi')
-rw-r--r--arch/arm/boot/dts/wm8650.dtsi20
1 files changed, 18 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
index 83b9467559bb..db3c0a12e052 100644
--- a/arch/arm/boot/dts/wm8650.dtsi
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -75,6 +75,22 @@
75 reg = <0x204>; 75 reg = <0x204>;
76 }; 76 };
77 77
78 clkuart0: uart0 {
79 #clock-cells = <0>;
80 compatible = "via,vt8500-device-clock";
81 clocks = <&ref24>;
82 enable-reg = <0x250>;
83 enable-bit = <1>;
84 };
85
86 clkuart1: uart1 {
87 #clock-cells = <0>;
88 compatible = "via,vt8500-device-clock";
89 clocks = <&ref24>;
90 enable-reg = <0x250>;
91 enable-bit = <2>;
92 };
93
78 arm: arm { 94 arm: arm {
79 #clock-cells = <0>; 95 #clock-cells = <0>;
80 compatible = "via,vt8500-device-clock"; 96 compatible = "via,vt8500-device-clock";
@@ -128,14 +144,14 @@
128 compatible = "via,vt8500-uart"; 144 compatible = "via,vt8500-uart";
129 reg = <0xd8200000 0x1040>; 145 reg = <0xd8200000 0x1040>;
130 interrupts = <32>; 146 interrupts = <32>;
131 clocks = <&ref24>; 147 clocks = <&clkuart0>;
132 }; 148 };
133 149
134 uart@d82b0000 { 150 uart@d82b0000 {
135 compatible = "via,vt8500-uart"; 151 compatible = "via,vt8500-uart";
136 reg = <0xd82b0000 0x1040>; 152 reg = <0xd82b0000 0x1040>;
137 interrupts = <33>; 153 interrupts = <33>;
138 clocks = <&ref24>; 154 clocks = <&clkuart1>;
139 }; 155 };
140 156
141 rtc@d8100000 { 157 rtc@d8100000 {