Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "As usual, this is the largest branch, though this time a little under
  half of the total changes with 307 individual non-merge changesets.

  The largest changes are the addition of new machines, in particular
  the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support
  for the old i.MX1 platform.

  Other changes include
   - at91: various sam9 and sama5 updates
   - exynos: much extended Peach Pi/Pit (Chromebook 2) support
   - keystone: new peripherals
   - meson: added DT for meson6 SoC
   - mvebu: new device support for Armada 370/375
   - qcom: improved support for IPQ8064 and MSM8x60
   - rockchip: much improved support for rk3288
   - shmobile: lots of updates all over the place
   - sunxi: dts license change
   - sunxi: more a23 device support
   - vexpress: CLCD DT description"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (308 commits)
  ARM: DTS: meson: update DTSI to add watchdog node
  ARM: dts: keystone-k2l: fix mdio io start address
  ARM: dts: keystone-k2e: fix mdio io start address
  ARM: dts: keystone-k2e: update usb1 node for dma properties
  ARM: dts: keystone: fix io range for usb_phy0
  Revert "Merge tag 'hix5hd2-dt-for-3.18' of git://github.com/hisilicon/linux-hisi into next/dt"
  Revert "ARM: dts: hix5hd2: add wdg node"
  ARM: dts: add rk3288 i2s controller
  ARM: vexpress: Add CLCD Device Tree properties
  ARM: bcm2835: add I2S pinctrl to device tree
  ARM: meson: documentation: add bindings documentation
  ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS
  ARM: dts: mt6589: Change compatible string for GIC
  ARM: dts: mediatek: Add compatible property for aquaris5
  ARM: dts: mt6589-aquaris5: Add boot argument earlyprintk
  ARM: dts: mt6589: Fix typo in GIC unit address
  ARM: dts: Build dtb for Mediatek board
  ARM: dts: keystone: fix bindings for pcie and usb clock nodes
  ARM: dts: keystone: k2l: Fix chip selects for SPI devices
  ARM: dts: keystone: add dsp gpio controllers nodes
  ...

1 files changed, 98 insertions, 2 deletions

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 03916efd6fa9..478c555ebd96 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -12,6 +12,72 @@
         #address-cells = <2>;
         #size-cells = <2>;
 
+        pcie-controller@0,01003000 {
+                compatible = "nvidia,tegra124-pcie";
+                device_type = "pci";
+                reg = <0x0 0x01003000 0x0 0x00000800   /* PADS registers */
+                       0x0 0x01003800 0x0 0x00000800   /* AFI registers */
+                       0x0 0x02000000 0x0 0x10000000>; /* configuration space */
+                reg-names = "pads", "afi", "cs";
+                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
+                             <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
+                interrupt-names = "intr", "msi";
+
+                #interrupt-cells = <1>;
+                interrupt-map-mask = <0 0 0 0>;
+                interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+
+                bus-range = <0x00 0xff>;
+                #address-cells = <3>;
+                #size-cells = <2>;
+
+                ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000   /* port 0 configuration space */
+                          0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000   /* port 1 configuration space */
+                          0x81000000 0 0x0        0x0 0x12000000 0 0x00010000   /* downstream I/O (64 KiB) */
+                          0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000   /* non-prefetchable memory (208 MiB) */
+                          0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
+
+                clocks = <&tegra_car TEGRA124_CLK_PCIE>,
+                         <&tegra_car TEGRA124_CLK_AFI>,
+                         <&tegra_car TEGRA124_CLK_PLL_E>,
+                         <&tegra_car TEGRA124_CLK_CML0>;
+                clock-names = "pex", "afi", "pll_e", "cml";
+                resets = <&tegra_car 70>,
+                         <&tegra_car 72>,
+                         <&tegra_car 74>;
+                reset-names = "pex", "afi", "pcie_x";
+                status = "disabled";
+
+                phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
+                phy-names = "pcie";
+
+                pci@1,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
+                        reg = <0x000800 0 0 0 0>;
+                        status = "disabled";
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        ranges;
+
+                        nvidia,num-lanes = <2>;
+                };
+
+                pci@2,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
+                        reg = <0x001000 0 0 0 0>;
+                        status = "disabled";
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        ranges;
+
+                        nvidia,num-lanes = <1>;
+                };
+        };
+
         host1x@0,50000000 {
                 compatible = "nvidia,tegra124-host1x", "simple-bus";
                 reg = <0x0 0x50000000 0x0 0x00034000>;
@@ -78,7 +144,7 @@
                         status = "disabled";
                 };
 
-                dpaux@0,545c0000 {
+                dpaux: dpaux@0,545c0000 {
                         compatible = "nvidia,tegra124-dpaux";
                         reg = <0x0 0x545c0000 0x0 0x00040000>;
                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
@@ -137,6 +203,11 @@
                 #reset-cells = <1>;
         };
 
+        flow-controller@0,60007000 {
+                compatible = "nvidia,tegra124-flowctrl";
+                reg = <0x0 0x60007000 0x0 0x1000>;
+        };
+
         gpio: gpio@0,6000d000 {
                 compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
                 reg = <0x0 0x6000d000 0x0 0x1000>;
@@ -267,7 +338,7 @@
                 status = "disabled";
         };
 
-        pwm@0,7000a000 {
+        pwm: pwm@0,7000a000 {
                 compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
                 reg = <0x0 0x7000a000 0x0 0x100>;
                 #pwm-cells = <2>;
@@ -480,6 +551,31 @@
                 reset-names = "fuse";
         };
 
+        sata@0,70020000 {
+                compatible = "nvidia,tegra124-ahci";
+
+                reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */
+                        <0x0 0x70020000 0x0 0x7000>; /* SATA */
+
+                interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+
+                clocks = <&tegra_car TEGRA124_CLK_SATA>,
+                        <&tegra_car TEGRA124_CLK_SATA_OOB>,
+                        <&tegra_car TEGRA124_CLK_CML1>,
+                        <&tegra_car TEGRA124_CLK_PLL_E>;
+                clock-names = "sata", "sata-oob", "cml1", "pll_e";
+
+                resets = <&tegra_car 124>,
+                        <&tegra_car 123>,
+                        <&tegra_car 129>;
+                reset-names = "sata", "sata-oob", "sata-cold";
+
+                phys = <&padctl TEGRA_XUSB_PADCTL_SATA>;
+                phy-names = "sata-phy";
+
+                status = "disabled";
+        };
+
         hda@0,70030000 {
                 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
                 reg = <0x0 0x70030000 0x0 0x10000>;