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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:28:03 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:28:03 -0400
commitdfab34aa61a0f8c14a67d7b4c1dae28e57ba592d (patch)
tree581fd4d7394b838acb70c3c2e5d585b5b8a86b0d /arch/arm/boot/dts/imx6q-sabresd.dts
parenta7726350e06401929eac0aa0677a5467106565fc (diff)
parent88cf9c5e494795a53ec360d0b38f483a6d4e508f (diff)
Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device-tree updates from Olof Johansson: "Part 1 of device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits) arm: mvebu: PCIe Device Tree informations for Armada XP GP arm: mvebu: PCIe Device Tree informations for Armada 370 DB arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox arm: mvebu: PCIe Device Tree informations for Armada XP DB arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 arm: mvebu: add PCIe Device Tree informations for Armada XP arm: mvebu: add PCIe Device Tree informations for Armada 370 ARM: sunxi: unify osc24M_fixed and osc24M arm: vt8500: Add SDHC support to WM8505 DT ARM: dts: Add a 64 bits version of the skeleton device tree ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board ARM: mvebu: Add support for NOR flash device on Armada XP-GP board ARM: mvebu: Add Device Bus support for Armada 370/XP SoC ARM: dts: imx6dl-wandboard: Add USB Host support ARM: dts: imx51 cpu node ARM: dts: Add missing imx27-phytec-phycore dtb target ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module ARM: i.MX51: Add PATA support ARM: dts: Add initial support for Wandboard Dual-Lite ...
Diffstat (limited to 'arch/arm/boot/dts/imx6q-sabresd.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-sabresd.dts67
1 files changed, 10 insertions, 57 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index 2dea304a7980..442051350225 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -11,37 +11,13 @@
11 */ 11 */
12 12
13/dts-v1/; 13/dts-v1/;
14/include/ "imx6q.dtsi" 14
15#include "imx6q.dtsi"
16#include "imx6qdl-sabresd.dtsi"
15 17
16/ { 18/ {
17 model = "Freescale i.MX6Q SABRE Smart Device Board"; 19 model = "Freescale i.MX6 Quad SABRE Smart Device Board";
18 compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; 20 compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x40000000>;
22 };
23
24 gpio-keys {
25 compatible = "gpio-keys";
26
27 volume-up {
28 label = "Volume Up";
29 gpios = <&gpio1 4 0>;
30 linux,code = <115>; /* KEY_VOLUMEUP */
31 };
32
33 volume-down {
34 label = "Volume Down";
35 gpios = <&gpio1 5 0>;
36 linux,code = <114>; /* KEY_VOLUMEDOWN */
37 };
38 };
39};
40
41&uart1 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_uart1_1>;
44 status = "okay";
45}; 21};
46 22
47&iomuxc { 23&iomuxc {
@@ -51,36 +27,13 @@
51 hog { 27 hog {
52 pinctrl_hog: hoggrp { 28 pinctrl_hog: hoggrp {
53 fsl,pins = < 29 fsl,pins = <
54 1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */ 30 MX6Q_PAD_GPIO_4__GPIO1_IO04 0x80000000
55 1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */ 31 MX6Q_PAD_GPIO_5__GPIO1_IO05 0x80000000
56 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */ 32 MX6Q_PAD_NANDF_D0__GPIO2_IO00 0x80000000
57 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */ 33 MX6Q_PAD_NANDF_D1__GPIO2_IO01 0x80000000
58 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */ 34 MX6Q_PAD_NANDF_D2__GPIO2_IO02 0x80000000
59 1426 0x80000000 /* MX6Q_PAD_NANDF_D3__GPIO_2_3 */ 35 MX6Q_PAD_NANDF_D3__GPIO2_IO03 0x80000000
60 >; 36 >;
61 }; 37 };
62 }; 38 };
63}; 39};
64
65&fec {
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_enet_1>;
68 phy-mode = "rgmii";
69 status = "okay";
70};
71
72&usdhc2 {
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_usdhc2_1>;
75 cd-gpios = <&gpio2 2 0>;
76 wp-gpios = <&gpio2 3 0>;
77 status = "okay";
78};
79
80&usdhc3 {
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_usdhc3_1>;
83 cd-gpios = <&gpio2 0 0>;
84 wp-gpios = <&gpio2 1 0>;
85 status = "okay";
86};