aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
diff options
context:
space:
mode:
authorGregory CLEMENT <gregory.clement@free-electrons.com>2013-04-12 10:29:09 -0400
committerJason Cooper <jason@lakedaemon.net>2013-04-15 11:00:24 -0400
commit467f54b2157bd01a487fd933122fd193f1e13911 (patch)
treef2f9e0833d5cc017a2423cc6afc990d1c5185a44 /arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
parent82a682676ce34e59369f60168a8729348aaae4d0 (diff)
ARM: dts: mvebu: introduce internal-regs node
Introduce a 'internal-regs' subnode, under which all devices are moved. This is not really needed for now, but will be for the mvebu-mbus driver. This generates a lot of code movement since it's indenting by one more tab all the devices. So it was a good opportunity to fix all the bad indentation. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts')
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts260
1 files changed, 131 insertions, 129 deletions
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index e9bc8bf90263..15a66a8bb238 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -27,154 +27,156 @@
27 }; 27 };
28 28
29 soc { 29 soc {
30 serial@12000 { 30 internal-regs {
31 clock-frequency = <250000000>; 31 serial@12000 {
32 status = "okay"; 32 clock-frequency = <250000000>;
33 }; 33 status = "okay";
34 serial@12100 {
35 clock-frequency = <250000000>;
36 status = "okay";
37 };
38 pinctrl {
39 led_pins: led-pins-0 {
40 marvell,pins = "mpp49", "mpp51", "mpp53";
41 marvell,function = "gpio";
42 }; 34 };
43 }; 35 serial@12100 {
44 leds { 36 clock-frequency = <250000000>;
45 compatible = "gpio-leds"; 37 status = "okay";
46 pinctrl-names = "default";
47 pinctrl-0 = <&led_pins>;
48
49 red_led {
50 label = "red_led";
51 gpios = <&gpio1 17 1>;
52 default-state = "off";
53 }; 38 };
54 39 pinctrl {
55 yellow_led { 40 led_pins: led-pins-0 {
56 label = "yellow_led"; 41 marvell,pins = "mpp49", "mpp51", "mpp53";
57 gpios = <&gpio1 19 1>; 42 marvell,function = "gpio";
58 default-state = "off"; 43 };
59 }; 44 };
60 45 leds {
61 green_led { 46 compatible = "gpio-leds";
62 label = "green_led"; 47 pinctrl-names = "default";
63 gpios = <&gpio1 21 1>; 48 pinctrl-0 = <&led_pins>;
64 default-state = "off"; 49
65 linux,default-trigger = "heartbeat"; 50 red_led {
51 label = "red_led";
52 gpios = <&gpio1 17 1>;
53 default-state = "off";
54 };
55
56 yellow_led {
57 label = "yellow_led";
58 gpios = <&gpio1 19 1>;
59 default-state = "off";
60 };
61
62 green_led {
63 label = "green_led";
64 gpios = <&gpio1 21 1>;
65 default-state = "off";
66 linux,default-trigger = "heartbeat";
67 };
66 }; 68 };
67 };
68 69
69 gpio_keys { 70 gpio_keys {
70 compatible = "gpio-keys"; 71 compatible = "gpio-keys";
71 #address-cells = <1>; 72 #address-cells = <1>;
72 #size-cells = <0>; 73 #size-cells = <0>;
73 74
74 button@1 { 75 button@1 {
75 label = "Init Button"; 76 label = "Init Button";
76 linux,code = <116>; 77 linux,code = <116>;
77 gpios = <&gpio1 28 0>; 78 gpios = <&gpio1 28 0>;
79 };
78 }; 80 };
79 };
80 81
81 mdio { 82 mdio {
82 phy0: ethernet-phy@0 { 83 phy0: ethernet-phy@0 {
83 reg = <0>; 84 reg = <0>;
84 }; 85 };
85 86
86 phy1: ethernet-phy@1 { 87 phy1: ethernet-phy@1 {
87 reg = <1>; 88 reg = <1>;
88 }; 89 };
89 90
90 phy2: ethernet-phy@2 { 91 phy2: ethernet-phy@2 {
91 reg = <2>; 92 reg = <2>;
92 }; 93 };
93 94
94 phy3: ethernet-phy@3 { 95 phy3: ethernet-phy@3 {
95 reg = <3>; 96 reg = <3>;
97 };
96 }; 98 };
97 };
98 99
99 ethernet@70000 { 100 ethernet@70000 {
100 status = "okay"; 101 status = "okay";
101 phy = <&phy0>; 102 phy = <&phy0>;
102 phy-mode = "sgmii"; 103 phy-mode = "sgmii";
103 }; 104 };
104 ethernet@74000 { 105 ethernet@74000 {
105 status = "okay"; 106 status = "okay";
106 phy = <&phy1>; 107 phy = <&phy1>;
107 phy-mode = "sgmii"; 108 phy-mode = "sgmii";
108 }; 109 };
109 ethernet@30000 { 110 ethernet@30000 {
110 status = "okay"; 111 status = "okay";
111 phy = <&phy2>; 112 phy = <&phy2>;
112 phy-mode = "sgmii"; 113 phy-mode = "sgmii";
113 }; 114 };
114 ethernet@34000 { 115 ethernet@34000 {
115 status = "okay"; 116 status = "okay";
116 phy = <&phy3>; 117 phy = <&phy3>;
117 phy-mode = "sgmii"; 118 phy-mode = "sgmii";
118 }; 119 };
119 i2c@11000 { 120 i2c@11000 {
120 status = "okay"; 121 status = "okay";
121 clock-frequency = <400000>; 122 clock-frequency = <400000>;
122 }; 123 };
123 i2c@11100 { 124 i2c@11100 {
124 status = "okay"; 125 status = "okay";
125 clock-frequency = <400000>; 126 clock-frequency = <400000>;
126 127
127 s35390a: s35390a@30 { 128 s35390a: s35390a@30 {
128 compatible = "s35390a"; 129 compatible = "s35390a";
129 reg = <0x30>; 130 reg = <0x30>;
131 };
132 };
133 sata@a0000 {
134 nr-ports = <2>;
135 status = "okay";
136 };
137 usb@50000 {
138 status = "okay";
139 };
140 usb@51000 {
141 status = "okay";
130 }; 142 };
131 };
132 sata@a0000 {
133 nr-ports = <2>;
134 status = "okay";
135 };
136 usb@50000 {
137 status = "okay";
138 };
139 usb@51000 {
140 status = "okay";
141 };
142 143
143 devbus-bootcs@10400 { 144 devbus-bootcs@10400 {
144 status = "okay"; 145 status = "okay";
145 ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */ 146 ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
146 147
147 /* Device Bus parameters are required */ 148 /* Device Bus parameters are required */
148 149
149 /* Read parameters */ 150 /* Read parameters */
150 devbus,bus-width = <8>; 151 devbus,bus-width = <8>;
151 devbus,turn-off-ps = <60000>; 152 devbus,turn-off-ps = <60000>;
152 devbus,badr-skew-ps = <0>; 153 devbus,badr-skew-ps = <0>;
153 devbus,acc-first-ps = <124000>; 154 devbus,acc-first-ps = <124000>;
154 devbus,acc-next-ps = <248000>; 155 devbus,acc-next-ps = <248000>;
155 devbus,rd-setup-ps = <0>; 156 devbus,rd-setup-ps = <0>;
156 devbus,rd-hold-ps = <0>; 157 devbus,rd-hold-ps = <0>;
157 158
158 /* Write parameters */ 159 /* Write parameters */
159 devbus,sync-enable = <0>; 160 devbus,sync-enable = <0>;
160 devbus,wr-high-ps = <60000>; 161 devbus,wr-high-ps = <60000>;
161 devbus,wr-low-ps = <60000>; 162 devbus,wr-low-ps = <60000>;
162 devbus,ale-wr-ps = <60000>; 163 devbus,ale-wr-ps = <60000>;
163 164
164 /* NOR 128 MiB */ 165 /* NOR 128 MiB */
165 nor@0 { 166 nor@0 {
166 compatible = "cfi-flash"; 167 compatible = "cfi-flash";
167 reg = <0 0x8000000>; 168 reg = <0 0x8000000>;
168 bank-width = <2>; 169 bank-width = <2>;
170 };
169 }; 171 };
170 };
171 172
172 pcie-controller { 173 pcie-controller {
173 status = "okay";
174 /* Internal mini-PCIe connector */
175 pcie@1,0 {
176 /* Port 0, Lane 0 */
177 status = "okay"; 174 status = "okay";
175 /* Internal mini-PCIe connector */
176 pcie@1,0 {
177 /* Port 0, Lane 0 */
178 status = "okay";
179 };
178 }; 180 };
179 }; 181 };
180 }; 182 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-13 06:29:36 -0400