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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-09 17:36:27 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-09 17:36:27 -0400
commite30f4192456971623b40c97a027346b69457ef69 (patch)
tree11a9a7ccfdc18f5e448661f65b8bbf2a1007b79a /arch/arc/kernel/troubleshoot.c
parentb32729b1eeae7ef8f5709923b36b5a0906d213df (diff)
parenteacd0e950dc2100af54f2a94ae29105bf48ab921 (diff)
Merge tag 'arc-v3.10-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC port updates from Vineet Gupta: "Support for two new platforms based on ARC700: - Abilis TB10x SoC [Chritisian/Pierrick] - Simulator only System-C Model [Mischa] ARC specific MM improvements: - Avoid full TLB flush (ASID increment) on munmap (even single page) - VIPT Cache Flushing improvements + Delayed dcache flush for non-aliasing dcache (big performance boost) + icache flush aliasing agnostic (no need to kill all possible aliases) Others: - Avoid needless rebuild of DTB files for every kernel build - Remove builtin cmdline as that is already provided by DeviceTree/bootargs - Fixing unaligned access emulation corner case - checkpatch fixes [Sachin] - Various fixlets [Noam] - Minor build failures/cleanups" * tag 'arc-v3.10-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (35 commits) ARC: [mm] Lazy D-cache flush (non aliasing VIPT) ARC: [mm] micro-optimize page size icache invalidate ARC: [mm] remove the pessimistic all-alias-invalidate icache helpers ARC: [mm] consolidate icache/dcache sync code ARC: [mm] optimise icache flush for kernel mappings ARC: [mm] optimise icache flush for user mappings ARC: [mm] optimize needless full mm TLB flush on munmap ARC: Add support for nSIM OSCI System C model ARC: [TB10x] Adapt device tree to new compatible string ARC: [TB10x] Add support for TB10x platform ARC: [TB10x] Device tree of TB100 and TB101 Development Kits ARC: Prepare interrupt code for external controllers ARC: Allow embedded arc-intc to be properly placed in DT intc hierarchy ARC: [cmdline] Don't overwrite u-boot provided bootargs ARC: [cmdline] Remove CONFIG_CMDLINE ARC: [plat-arcfpga] defconfig update ARC: unaligned access emulation broken if callee-reg dest of LD/ST ARC: unaligned access emulation error handling consolidation ARC: Debug/crash-printing Improvements ARC: fix typo with clock speed ...
Diffstat (limited to 'arch/arc/kernel/troubleshoot.c')
-rw-r--r--arch/arc/kernel/troubleshoot.c50
1 files changed, 32 insertions, 18 deletions
diff --git a/arch/arc/kernel/troubleshoot.c b/arch/arc/kernel/troubleshoot.c
index 0aec01985bf9..11c301b81c92 100644
--- a/arch/arc/kernel/troubleshoot.c
+++ b/arch/arc/kernel/troubleshoot.c
@@ -26,7 +26,6 @@ static noinline void print_reg_file(long *reg_rev, int start_num)
26 char buf[512]; 26 char buf[512];
27 int n = 0, len = sizeof(buf); 27 int n = 0, len = sizeof(buf);
28 28
29 /* weird loop because pt_regs regs rev r12..r0, r25..r13 */
30 for (i = start_num; i < start_num + 13; i++) { 29 for (i = start_num; i < start_num + 13; i++) {
31 n += scnprintf(buf + n, len - n, "r%02u: 0x%08lx\t", 30 n += scnprintf(buf + n, len - n, "r%02u: 0x%08lx\t",
32 i, (unsigned long)*reg_rev); 31 i, (unsigned long)*reg_rev);
@@ -34,13 +33,18 @@ static noinline void print_reg_file(long *reg_rev, int start_num)
34 if (((i + 1) % 3) == 0) 33 if (((i + 1) % 3) == 0)
35 n += scnprintf(buf + n, len - n, "\n"); 34 n += scnprintf(buf + n, len - n, "\n");
36 35
36 /* because pt_regs has regs reversed: r12..r0, r25..r13 */
37 reg_rev--; 37 reg_rev--;
38 } 38 }
39 39
40 if (start_num != 0) 40 if (start_num != 0)
41 n += scnprintf(buf + n, len - n, "\n\n"); 41 n += scnprintf(buf + n, len - n, "\n\n");
42 42
43 pr_info("%s", buf); 43 /* To continue printing callee regs on same line as scratch regs */
44 if (start_num == 0)
45 pr_info("%s", buf);
46 else
47 pr_cont("%s\n", buf);
44} 48}
45 49
46static void show_callee_regs(struct callee_regs *cregs) 50static void show_callee_regs(struct callee_regs *cregs)
@@ -83,6 +87,10 @@ static void show_faulting_vma(unsigned long address, char *buf)
83 dev_t dev = 0; 87 dev_t dev = 0;
84 char *nm = buf; 88 char *nm = buf;
85 89
90 /* can't use print_vma_addr() yet as it doesn't check for
91 * non-inclusive vma
92 */
93
86 vma = find_vma(current->active_mm, address); 94 vma = find_vma(current->active_mm, address);
87 95
88 /* check against the find_vma( ) behaviour which returns the next VMA 96 /* check against the find_vma( ) behaviour which returns the next VMA
@@ -98,10 +106,13 @@ static void show_faulting_vma(unsigned long address, char *buf)
98 ino = inode->i_ino; 106 ino = inode->i_ino;
99 } 107 }
100 pr_info(" @off 0x%lx in [%s]\n" 108 pr_info(" @off 0x%lx in [%s]\n"
101 " VMA: 0x%08lx to 0x%08lx\n\n", 109 " VMA: 0x%08lx to 0x%08lx\n",
102 address - vma->vm_start, nm, vma->vm_start, vma->vm_end); 110 vma->vm_start < TASK_UNMAPPED_BASE ?
103 } else 111 address : address - vma->vm_start,
112 nm, vma->vm_start, vma->vm_end);
113 } else {
104 pr_info(" @No matching VMA found\n"); 114 pr_info(" @No matching VMA found\n");
115 }
105} 116}
106 117
107static void show_ecr_verbose(struct pt_regs *regs) 118static void show_ecr_verbose(struct pt_regs *regs)
@@ -110,7 +121,7 @@ static void show_ecr_verbose(struct pt_regs *regs)
110 unsigned long address; 121 unsigned long address;
111 122
112 cause_reg = current->thread.cause_code; 123 cause_reg = current->thread.cause_code;
113 pr_info("\n[ECR]: 0x%08x => ", cause_reg); 124 pr_info("\n[ECR ]: 0x%08x => ", cause_reg);
114 125
115 /* For Data fault, this is data address not instruction addr */ 126 /* For Data fault, this is data address not instruction addr */
116 address = current->thread.fault_address; 127 address = current->thread.fault_address;
@@ -120,7 +131,7 @@ static void show_ecr_verbose(struct pt_regs *regs)
120 131
121 /* For DTLB Miss or ProtV, display the memory involved too */ 132 /* For DTLB Miss or ProtV, display the memory involved too */
122 if (vec == ECR_V_DTLB_MISS) { 133 if (vec == ECR_V_DTLB_MISS) {
123 pr_cont("Invalid (%s) @ 0x%08lx by insn @ 0x%08lx\n", 134 pr_cont("Invalid %s 0x%08lx by insn @ 0x%08lx\n",
124 (cause_code == 0x01) ? "Read From" : 135 (cause_code == 0x01) ? "Read From" :
125 ((cause_code == 0x02) ? "Write to" : "EX"), 136 ((cause_code == 0x02) ? "Write to" : "EX"),
126 address, regs->ret); 137 address, regs->ret);
@@ -168,20 +179,23 @@ void show_regs(struct pt_regs *regs)
168 if (current->thread.cause_code) 179 if (current->thread.cause_code)
169 show_ecr_verbose(regs); 180 show_ecr_verbose(regs);
170 181
171 pr_info("[EFA]: 0x%08lx\n", current->thread.fault_address); 182 pr_info("[EFA ]: 0x%08lx\n[BLINK ]: %pS\n[ERET ]: %pS\n",
172 pr_info("[ERET]: 0x%08lx (PC of Faulting Instr)\n", regs->ret); 183 current->thread.fault_address,
184 (void *)regs->blink, (void *)regs->ret);
173 185
174 show_faulting_vma(regs->ret, buf); /* faulting code, not data */ 186 if (user_mode(regs))
187 show_faulting_vma(regs->ret, buf); /* faulting code, not data */
175 188
176 /* can't use print_vma_addr() yet as it doesn't check for 189 pr_info("[STAT32]: 0x%08lx", regs->status32);
177 * non-inclusive vma 190
178 */ 191#define STS_BIT(r, bit) r->status32 & STATUS_##bit##_MASK ? #bit : ""
192 if (!user_mode(regs))
193 pr_cont(" : %2s %2s %2s %2s %2s\n",
194 STS_BIT(regs, AE), STS_BIT(regs, A2), STS_BIT(regs, A1),
195 STS_BIT(regs, E2), STS_BIT(regs, E1));
179 196
180 /* print special regs */ 197 pr_info("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n",
181 pr_info("status32: 0x%08lx\n", regs->status32); 198 regs->bta, regs->sp, regs->fp);
182 pr_info(" SP: 0x%08lx\tFP: 0x%08lx\n", regs->sp, regs->fp);
183 pr_info("BTA: 0x%08lx\tBLINK: 0x%08lx\n",
184 regs->bta, regs->blink);
185 pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", 199 pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
186 regs->lp_start, regs->lp_end, regs->lp_count); 200 regs->lp_start, regs->lp_end, regs->lp_count);
187 201