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authorLinus Torvalds <torvalds@linux-foundation.org>2014-06-09 21:05:11 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-06-09 21:05:11 -0400
commit9b651cc2277b5e4883012ebab0fea2bcda4cbafa (patch)
treedd6744f80a07f72876e9307d854700019255218e /arch/arc/include/asm
parent214b93132023cc9305d5801add812515bea4d7d0 (diff)
parentef680cdc24376f394841a3f19b3a7ef6d57a009d (diff)
Merge tag 'arc-v3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC updates from Vineet Gupta: "Nothing too exciting here, just minor fixes/cleanup. Only noteworthy ones are: - Moving cache disabling to early boot - ARC UART enabled only if earlyprintk setup in cmdline" * tag 'arc-v3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: Disable caches in early boot if so configured ARC: [arcfpga] Early ARC UART to be only activated by cmdline ARC: [arcfpga] Get rid of legacy BVCI latency unit support ARC: remove duplicate header exports ARC: arc_local_timer_setup() need not pass own cpu id ARC: Fixed spelling errors within comments ARC: make start_thread() out-of-line ARC: fix mmuv2 warning ARC: [SMP] ISS SMP extension bitrot
Diffstat (limited to 'arch/arc/include/asm')
-rw-r--r--arch/arc/include/asm/cache.h27
-rw-r--r--arch/arc/include/asm/irq.h4
-rw-r--r--arch/arc/include/asm/processor.h29
3 files changed, 32 insertions, 28 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 2fd3162ec4df..c1d3d2da1191 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -55,4 +55,31 @@ extern void read_decode_cache_bcr(void);
55 55
56#endif /* !__ASSEMBLY__ */ 56#endif /* !__ASSEMBLY__ */
57 57
58/* Instruction cache related Auxiliary registers */
59#define ARC_REG_IC_BCR 0x77 /* Build Config reg */
60#define ARC_REG_IC_IVIC 0x10
61#define ARC_REG_IC_CTRL 0x11
62#define ARC_REG_IC_IVIL 0x19
63#if defined(CONFIG_ARC_MMU_V3) || defined (CONFIG_ARC_MMU_V4)
64#define ARC_REG_IC_PTAG 0x1E
65#endif
66
67/* Bit val in IC_CTRL */
68#define IC_CTRL_CACHE_DISABLE 0x1
69
70/* Data cache related Auxiliary registers */
71#define ARC_REG_DC_BCR 0x72 /* Build Config reg */
72#define ARC_REG_DC_IVDC 0x47
73#define ARC_REG_DC_CTRL 0x48
74#define ARC_REG_DC_IVDL 0x4A
75#define ARC_REG_DC_FLSH 0x4B
76#define ARC_REG_DC_FLDL 0x4C
77#if defined(CONFIG_ARC_MMU_V3) || defined (CONFIG_ARC_MMU_V4)
78#define ARC_REG_DC_PTAG 0x5C
79#endif
80
81/* Bit val in DC_CTRL */
82#define DC_CTRL_INV_MODE_FLUSH 0x40
83#define DC_CTRL_FLUSH_STATUS 0x100
84
58#endif /* _ASM_CACHE_H */ 85#endif /* _ASM_CACHE_H */
diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h
index 291a70db68b8..fb4efb648971 100644
--- a/arch/arc/include/asm/irq.h
+++ b/arch/arc/include/asm/irq.h
@@ -19,8 +19,6 @@
19#include <asm-generic/irq.h> 19#include <asm-generic/irq.h>
20 20
21extern void arc_init_IRQ(void); 21extern void arc_init_IRQ(void);
22extern int get_hw_config_num_irq(void); 22void arc_local_timer_setup(void);
23
24void arc_local_timer_setup(unsigned int cpu);
25 23
26#endif 24#endif
diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h
index 15334ab66b56..d99f9b37cd15 100644
--- a/arch/arc/include/asm/processor.h
+++ b/arch/arc/include/asm/processor.h
@@ -18,7 +18,6 @@
18 18
19#ifndef __ASSEMBLY__ 19#ifndef __ASSEMBLY__
20 20
21#include <asm/arcregs.h> /* for STATUS_E1_MASK et all */
22#include <asm/ptrace.h> 21#include <asm/ptrace.h>
23 22
24/* Arch specific stuff which needs to be saved per task. 23/* Arch specific stuff which needs to be saved per task.
@@ -41,15 +40,13 @@ struct thread_struct {
41/* Forward declaration, a strange C thing */ 40/* Forward declaration, a strange C thing */
42struct task_struct; 41struct task_struct;
43 42
44/* 43/* Return saved PC of a blocked thread */
45 * Return saved PC of a blocked thread.
46 */
47unsigned long thread_saved_pc(struct task_struct *t); 44unsigned long thread_saved_pc(struct task_struct *t);
48 45
49#define task_pt_regs(p) \ 46#define task_pt_regs(p) \
50 ((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1) 47 ((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1)
51 48
52/* Free all resources held by a thread. */ 49/* Free all resources held by a thread */
53#define release_thread(thread) do { } while (0) 50#define release_thread(thread) do { } while (0)
54 51
55/* Prepare to copy thread state - unlazy all lazy status */ 52/* Prepare to copy thread state - unlazy all lazy status */
@@ -82,26 +79,8 @@ unsigned long thread_saved_pc(struct task_struct *t);
82#define KSTK_BLINK(tsk) KSTK_REG(tsk, 4) 79#define KSTK_BLINK(tsk) KSTK_REG(tsk, 4)
83#define KSTK_FP(tsk) KSTK_REG(tsk, 0) 80#define KSTK_FP(tsk) KSTK_REG(tsk, 0)
84 81
85/* 82extern void start_thread(struct pt_regs * regs, unsigned long pc,
86 * Do necessary setup to start up a newly executed thread. 83 unsigned long usp);
87 *
88 * E1,E2 so that Interrupts are enabled in user mode
89 * L set, so Loop inhibited to begin with
90 * lp_start and lp_end seeded with bogus non-zero values so to easily catch
91 * the ARC700 sr to lp_start hardware bug
92 */
93#define start_thread(_regs, _pc, _usp) \
94do { \
95 set_fs(USER_DS); /* reads from user space */ \
96 (_regs)->ret = (_pc); \
97 /* Interrupts enabled in User Mode */ \
98 (_regs)->status32 = STATUS_U_MASK | STATUS_L_MASK \
99 | STATUS_E1_MASK | STATUS_E2_MASK; \
100 (_regs)->sp = (_usp); \
101 /* bogus seed values for debugging */ \
102 (_regs)->lp_start = 0x10; \
103 (_regs)->lp_end = 0x80; \
104} while (0)
105 84
106extern unsigned int get_wchan(struct task_struct *p); 85extern unsigned int get_wchan(struct task_struct *p);
107 86