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authorYuvaraj Kumar C D <yuvaraj.cd@samsung.com>2014-03-17 18:49:14 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-03-17 18:49:14 -0400
commitba0d7ed391b7b3fb5ca98d9cf4d067b7f5ed956b (patch)
treec4ef7983ba455208a9952b39046f9344708efd25 /Documentation/devicetree
parent183af2522da5d02fd1d682e105ee4d60a685c05e (diff)
ARM: dts: enable ahci sata and sata phy for exynos5250
This patch adds dt entry for ahci sata controller and its corresponding phy controller.phy node has been added w.r.t new generic phy framework. Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/ata/exynos-sata-phy.txt14
-rw-r--r--Documentation/devicetree/bindings/ata/exynos-sata.txt25
-rw-r--r--Documentation/devicetree/bindings/phy/samsung-phy.txt36
3 files changed, 52 insertions, 23 deletions
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
deleted file mode 100644
index 37824fac688e..000000000000
--- a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
+++ /dev/null
@@ -1,14 +0,0 @@
1* Samsung SATA PHY Controller
2
3SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
4Each SATA PHY controller should have its own node.
5
6Required properties:
7- compatible : compatible list, contains "samsung,exynos5-sata-phy"
8- reg : <registers mapping>
9
10Example:
11 sata@ffe07000 {
12 compatible = "samsung,exynos5-sata-phy";
13 reg = <0xffe07000 0x1000>;
14 };
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt b/Documentation/devicetree/bindings/ata/exynos-sata.txt
index 0849f1025e34..b2adb1f3090e 100644
--- a/Documentation/devicetree/bindings/ata/exynos-sata.txt
+++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt
@@ -4,14 +4,21 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
4Each SATA controller should have its own node. 4Each SATA controller should have its own node.
5 5
6Required properties: 6Required properties:
7- compatible : compatible list, contains "samsung,exynos5-sata" 7- compatible : compatible list, contains "samsung,exynos5-sata"
8- interrupts : <interrupt mapping for SATA IRQ> 8- interrupts : <interrupt mapping for SATA IRQ>
9- reg : <registers mapping> 9- reg : <registers mapping>
10- samsung,sata-freq : <frequency in MHz> 10- samsung,sata-freq : <frequency in MHz>
11- phys : as mentioned in phy-bindings.txt
12- phy-names : as mentioned in phy-bindings.txt
11 13
12Example: 14Example:
13 sata@ffe08000 { 15 sata@122f0000 {
14 compatible = "samsung,exynos5-sata"; 16 compatible = "snps,dwc-ahci";
15 reg = <0xffe08000 0x1000>; 17 samsung,sata-freq = <66>;
16 interrupts = <115>; 18 reg = <0x122f0000 0x1ff>;
17 }; 19 interrupts = <0 115 0>;
20 clocks = <&clock 277>, <&clock 143>;
21 clock-names = "sata", "sclk_sata";
22 phys = <&sata_phy>;
23 phy-names = "sata-phy";
24 };
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index c0fccaa1671e..a937f75d062c 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -20,3 +20,39 @@ Required properties:
20- compatible : should be "samsung,exynos5250-dp-video-phy"; 20- compatible : should be "samsung,exynos5250-dp-video-phy";
21- reg : offset and length of the Display Port PHY register set; 21- reg : offset and length of the Display Port PHY register set;
22- #phy-cells : from the generic PHY bindings, must be 0; 22- #phy-cells : from the generic PHY bindings, must be 0;
23
24Samsung SATA PHY Controller
25---------------------------
26
27SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
28Each SATA PHY controller should have its own node.
29
30Required properties:
31- compatible : compatible list, contains "samsung,exynos5250-sata-phy"
32- reg : offset and length of the SATA PHY register set;
33- #phy-cells : from the generic phy bindings;
34
35Example:
36 sata_phy: sata-phy@12170000 {
37 compatible = "samsung,exynos5250-sata-phy";
38 reg = <0x12170000 0x1ff>;
39 clocks = <&clock 287>;
40 clock-names = "sata_phyctrl";
41 #phy-cells = <0>;
42 samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
43 samsung,syscon-phandle = <&pmu_syscon>;
44 };
45
46Device-Tree bindings for sataphy i2c client driver
47--------------------------------------------------
48
49Required properties:
50compatible: Should be "samsung,exynos-sataphy-i2c"
51- reg: I2C address of the sataphy i2c device.
52
53Example:
54
55 sata_phy_i2c:sata-phy@38 {
56 compatible = "samsung,exynos-sataphy-i2c";
57 reg = <0x38>;
58 };