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authorMike Turquette <mturquette@linaro.org>2014-09-30 02:43:12 -0400
committerMike Turquette <mturquette@linaro.org>2014-09-30 02:43:12 -0400
commit24afc3852e5ec9c35de5ae1b3c4f9e4ecbf53cb6 (patch)
tree77674714fbc196c028ed2a08a96192d26d9512e6 /Documentation/devicetree
parent82de1bc86c493ad832db270635fbf4e8c237f02f (diff)
parentfa0111be4ff30150720db3c3e5ee8d7823921639 (diff)
Merge tag 'for_3.18/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-next
Samsung clock patches for v3.18 1) non-critical fixes (without the need to push to stable) fa0111be4ff3 clk: samsung: exynos4: remove duplicate div_core2 divider clock instantiation b511593d7165 clk: samsung: exynos4: fix g3d clocks c14254300131 clk: samsung: exynos4: add missing smmu_g2d clock and update comments 22842d244af3 clk: samsung: exynos5260: fix typo in clock name e82ba578ccde clk: samsung: exynos3250: fix width field of mout_mmc0/1 59037b92f440 clk: samsung: exynos3250: fix width and shift of div_spi0_isp clock 5ce37f266650 clk: samsung: exynos3250: fix mout_cam_blk parent list 2) Clock driver extensions 07ccf02ba5c3 dt-bindings: clk: samsung: Document the DMC domain of Exynos3250 CMU d0e73eaf1925 ARM: dts: exynos3250: Add CMU node for DMC domain clocks e3c3f19bc618 clk: samsung: exynos3250: Register DMC clk provider 4676f0aab9dc clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/clock/exynos3250-clock.txt10
1 files changed, 9 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos3250-clock.txt b/Documentation/devicetree/bindings/clock/exynos3250-clock.txt
index aadc9c59e2d1..f57d9dd9ea85 100644
--- a/Documentation/devicetree/bindings/clock/exynos3250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos3250-clock.txt
@@ -7,6 +7,8 @@ Required Properties:
7 7
8- compatible: should be one of the following. 8- compatible: should be one of the following.
9 - "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC. 9 - "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC.
10 - "samsung,exynos3250-cmu-dmc" - controller compatible with
11 Exynos3250 SoC for Dynamic Memory Controller domain.
10 12
11- reg: physical base address of the controller and length of memory mapped 13- reg: physical base address of the controller and length of memory mapped
12 region. 14 region.
@@ -20,7 +22,7 @@ All available clocks are defined as preprocessor macros in
20dt-bindings/clock/exynos3250.h header and can be used in device 22dt-bindings/clock/exynos3250.h header and can be used in device
21tree sources. 23tree sources.
22 24
23Example 1: An example of a clock controller node is listed below. 25Example 1: Examples of clock controller nodes are listed below.
24 26
25 cmu: clock-controller@10030000 { 27 cmu: clock-controller@10030000 {
26 compatible = "samsung,exynos3250-cmu"; 28 compatible = "samsung,exynos3250-cmu";
@@ -28,6 +30,12 @@ Example 1: An example of a clock controller node is listed below.
28 #clock-cells = <1>; 30 #clock-cells = <1>;
29 }; 31 };
30 32
33 cmu_dmc: clock-controller@105C0000 {
34 compatible = "samsung,exynos3250-cmu-dmc";
35 reg = <0x105C0000 0x2000>;
36 #clock-cells = <1>;
37 };
38
31Example 2: UART controller node that consumes the clock generated by the clock 39Example 2: UART controller node that consumes the clock generated by the clock
32 controller. Refer to the standard clock bindings for information 40 controller. Refer to the standard clock bindings for information
33 about 'clocks' and 'clock-names' property. 41 about 'clocks' and 'clock-names' property.