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authorOlof Johansson <olof@lixom.net>2013-12-23 21:54:04 -0500
committerOlof Johansson <olof@lixom.net>2013-12-23 21:54:04 -0500
commit954e198eac14f6c34157bbf053149f3c2917cbbd (patch)
tree62f9dd9a8d4a2fa7d2ec6477549f1dc167e98df3 /Documentation/devicetree/bindings/timer
parentf2edbadefd1a528f313da9027a4cf3ccf6f89ebf (diff)
parenta22d060e3299ce672258d00070fa0ed398c035c5 (diff)
Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
From Kukjin Kim: Samsung DT 2nd updates for v3.14 - add DMA controller, SPI, and TMU DT nodes for exynos5420 - add PWM DT nodes for exynos5250 and exynos5420 - drop interrupt controller properties from MCT nodes because MCT is not an interrupt controller - move MCT nodes to exynos4x12 from board because it is a per-processor interrupt and same 4212 and 4412 - use one cell for MCT interrupt map for exynos4 SoCs - update Exynos MCT DT bindings accordingly - fix missing spaces after labels for exynos - fix mmc status property for exynos5250-snow - add MCLK for codec for exynos5250-smdk5250 - disable SPI and I2C by default for exynos5250 SoC and enable into requiring some boards - rename cros5250-common to exynos5250-cros-common * tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (27 commits) ARM: dts: Rename Exynos5250 ChromeOS common file to have exynos prefix ARM: dts: Disable I2C controllers by default on Exynos5250 ARM: dts: Leave Exynos5250 SPI controller disabled by default ARM: dts: Add CODEC MCLK for SMDK5250 ARM: dts: Add device nodes for TMU blocks for exynos5420 ARM: dts: Fix status property of mmc nodes for snow board ARM: dts: Fix missing spaces after labels for exynos ARM: dts: Simplify MCT interrupt map for exynos4 SoCs ARM: dts: Move MCT node to exynos4x12.dtsi ARM: dts: Drop interrupt controller properties from MCT nodes for exynos4 SoCs Documentation: devicetree: Update Exynos MCT bindings description ARM: dts: add pwm DT nodes to Exynos5250 and Exynos5420 ARM: dts: Add SPI nodes to the exynos5420 device tree file ARM: dts: Add DMA controller node info on Exynos5420 ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2 ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12 ARM: dts: add clock provider for mshc node for Exynos4412 SOC clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider ARM: dts: Fix exynos5250-snow's search key to be L_META ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snow ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
-rw-r--r--Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt54
1 files changed, 37 insertions, 17 deletions
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
index b5a86d20ee36..167d5dab9f64 100644
--- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
+++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
@@ -31,38 +31,58 @@ Required properties:
31 7: .. 31 7: ..
32 i: Local Timer Interrupt n 32 i: Local Timer Interrupt n
33 33
34Example 1: In this example, the system uses only the first global timer 34 For MCT block that uses a per-processor interrupt for local timers, such
35 interrupt generated by MCT and the remaining three global timer 35 as ones compatible with "samsung,exynos4412-mct", only one local timer
36 interrupts are unused. Two local timer interrupts have been 36 interrupt might be specified, meaning that all local timers use the same
37 specified. 37 per processor interrupt.
38
39Example 1: In this example, the IP contains two local timers, using separate
40 interrupts, so two local timer interrupts have been specified,
41 in addition to four global timer interrupts.
38 42
39 mct@10050000 { 43 mct@10050000 {
40 compatible = "samsung,exynos4210-mct"; 44 compatible = "samsung,exynos4210-mct";
41 reg = <0x10050000 0x800>; 45 reg = <0x10050000 0x800>;
42 interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, 46 interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
43 <0 42 0>, <0 48 0>; 47 <0 42 0>, <0 48 0>;
44 }; 48 };
45 49
46Example 2: In this example, the MCT global and local timer interrupts are 50Example 2: In this example, the timer interrupts are connected to two separate
47 connected to two separate interrupt controllers. Hence, an 51 interrupt controllers. Hence, an interrupt-map is created to map
48 interrupt-map is created to map the interrupts to the respective 52 the interrupts to the respective interrupt controllers.
49 interrupt controllers.
50 53
51 mct@101C0000 { 54 mct@101C0000 {
52 compatible = "samsung,exynos4210-mct"; 55 compatible = "samsung,exynos4210-mct";
53 reg = <0x101C0000 0x800>; 56 reg = <0x101C0000 0x800>;
54 interrupt-controller;
55 #interrups-cells = <2>;
56 interrupt-parent = <&mct_map>; 57 interrupt-parent = <&mct_map>;
57 interrupts = <0 0>, <1 0>, <2 0>, <3 0>, 58 interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
58 <4 0>, <5 0>;
59 59
60 mct_map: mct-map { 60 mct_map: mct-map {
61 #interrupt-cells = <2>; 61 #interrupt-cells = <1>;
62 #address-cells = <0>; 62 #address-cells = <0>;
63 #size-cells = <0>; 63 #size-cells = <0>;
64 interrupt-map = <0x0 0 &combiner 23 3>, 64 interrupt-map = <0 &gic 0 57 0>,
65 <0x4 0 &gic 0 120 0>, 65 <1 &gic 0 69 0>,
66 <0x5 0 &gic 0 121 0>; 66 <2 &combiner 12 6>,
67 <3 &combiner 12 7>,
68 <4 &gic 0 42 0>,
69 <5 &gic 0 48 0>;
67 }; 70 };
68 }; 71 };
72
73Example 3: In this example, the IP contains four local timers, but using
74 a per-processor interrupt to handle them. Either all the local
75 timer interrupts can be specified, with the same interrupt specifier
76 value or just the first one.
77
78 mct@10050000 {
79 compatible = "samsung,exynos4412-mct";
80 reg = <0x10050000 0x800>;
81
82 /* Both ways are possible in this case. Either: */
83 interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
84 <0 42 0>;
85 /* or: */
86 interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
87 <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
88 };