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-rw-r--r--Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt54
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts2
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi23
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi24
-rw-r--r--arch/arm/boot/dts/exynos4412-odroidx.dts5
-rw-r--r--arch/arm/boot/dts/exynos4412-origen.dts7
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts20
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi35
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi33
-rw-r--r--arch/arm/boot/dts/exynos5.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts46
-rw-r--r--arch/arm/boot/dts/exynos5250-cros-common.dtsi (renamed from arch/arm/boot/dts/cros5250-common.dtsi)25
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts46
-rw-r--r--arch/arm/boot/dts/exynos5250-snow.dts14
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi24
-rw-r--r--arch/arm/boot/dts/exynos5420-pinctrl.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi152
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi2
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c10
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h2
-rw-r--r--drivers/clk/samsung/clk-exynos4.c3
22 files changed, 348 insertions, 189 deletions
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
index b5a86d20ee36..167d5dab9f64 100644
--- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
+++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
@@ -31,38 +31,58 @@ Required properties:
31 7: .. 31 7: ..
32 i: Local Timer Interrupt n 32 i: Local Timer Interrupt n
33 33
34Example 1: In this example, the system uses only the first global timer 34 For MCT block that uses a per-processor interrupt for local timers, such
35 interrupt generated by MCT and the remaining three global timer 35 as ones compatible with "samsung,exynos4412-mct", only one local timer
36 interrupts are unused. Two local timer interrupts have been 36 interrupt might be specified, meaning that all local timers use the same
37 specified. 37 per processor interrupt.
38
39Example 1: In this example, the IP contains two local timers, using separate
40 interrupts, so two local timer interrupts have been specified,
41 in addition to four global timer interrupts.
38 42
39 mct@10050000 { 43 mct@10050000 {
40 compatible = "samsung,exynos4210-mct"; 44 compatible = "samsung,exynos4210-mct";
41 reg = <0x10050000 0x800>; 45 reg = <0x10050000 0x800>;
42 interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, 46 interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
43 <0 42 0>, <0 48 0>; 47 <0 42 0>, <0 48 0>;
44 }; 48 };
45 49
46Example 2: In this example, the MCT global and local timer interrupts are 50Example 2: In this example, the timer interrupts are connected to two separate
47 connected to two separate interrupt controllers. Hence, an 51 interrupt controllers. Hence, an interrupt-map is created to map
48 interrupt-map is created to map the interrupts to the respective 52 the interrupts to the respective interrupt controllers.
49 interrupt controllers.
50 53
51 mct@101C0000 { 54 mct@101C0000 {
52 compatible = "samsung,exynos4210-mct"; 55 compatible = "samsung,exynos4210-mct";
53 reg = <0x101C0000 0x800>; 56 reg = <0x101C0000 0x800>;
54 interrupt-controller;
55 #interrups-cells = <2>;
56 interrupt-parent = <&mct_map>; 57 interrupt-parent = <&mct_map>;
57 interrupts = <0 0>, <1 0>, <2 0>, <3 0>, 58 interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
58 <4 0>, <5 0>;
59 59
60 mct_map: mct-map { 60 mct_map: mct-map {
61 #interrupt-cells = <2>; 61 #interrupt-cells = <1>;
62 #address-cells = <0>; 62 #address-cells = <0>;
63 #size-cells = <0>; 63 #size-cells = <0>;
64 interrupt-map = <0x0 0 &combiner 23 3>, 64 interrupt-map = <0 &gic 0 57 0>,
65 <0x4 0 &gic 0 120 0>, 65 <1 &gic 0 69 0>,
66 <0x5 0 &gic 0 121 0>; 66 <2 &combiner 12 6>,
67 <3 &combiner 12 7>,
68 <4 &gic 0 42 0>,
69 <5 &gic 0 48 0>;
67 }; 70 };
68 }; 71 };
72
73Example 3: In this example, the IP contains four local timers, but using
74 a per-processor interrupt to handle them. Either all the local
75 timer interrupts can be specified, with the same interrupt specifier
76 value or just the first one.
77
78 mct@10050000 {
79 compatible = "samsung,exynos4412-mct";
80 reg = <0x10050000 0x800>;
81
82 /* Both ways are possible in this case. Either: */
83 interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
84 <0 42 0>;
85 /* or: */
86 interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
87 <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
88 };
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index c2a99645394e..08452e183b57 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -85,14 +85,14 @@
85 reg = <0x10023CE0 0x20>; 85 reg = <0x10023CE0 0x20>;
86 }; 86 };
87 87
88 gic:interrupt-controller@10490000 { 88 gic: interrupt-controller@10490000 {
89 compatible = "arm,cortex-a9-gic"; 89 compatible = "arm,cortex-a9-gic";
90 #interrupt-cells = <3>; 90 #interrupt-cells = <3>;
91 interrupt-controller; 91 interrupt-controller;
92 reg = <0x10490000 0x1000>, <0x10480000 0x100>; 92 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
93 }; 93 };
94 94
95 combiner:interrupt-controller@10440000 { 95 combiner: interrupt-controller@10440000 {
96 compatible = "samsung,exynos4210-combiner"; 96 compatible = "samsung,exynos4210-combiner";
97 #interrupt-cells = <2>; 97 #interrupt-cells = <2>;
98 interrupt-controller; 98 interrupt-controller;
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 1a12fb23767c..2aa13cb3bbed 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -313,7 +313,7 @@
313 display-timings { 313 display-timings {
314 native-mode = <&timing0>; 314 native-mode = <&timing0>;
315 timing0: timing { 315 timing0: timing {
316 clock-frequency = <50000>; 316 clock-frequency = <47500000>;
317 hactive = <1024>; 317 hactive = <1024>;
318 vactive = <600>; 318 vactive = <600>;
319 hfront-porch = <64>; 319 hfront-porch = <64>;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 057d6829d319..48ecd7a755ab 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -36,11 +36,11 @@
36 reg = <0x10023CA0 0x20>; 36 reg = <0x10023CA0 0x20>;
37 }; 37 };
38 38
39 gic:interrupt-controller@10490000 { 39 gic: interrupt-controller@10490000 {
40 cpu-offset = <0x8000>; 40 cpu-offset = <0x8000>;
41 }; 41 };
42 42
43 combiner:interrupt-controller@10440000 { 43 combiner: interrupt-controller@10440000 {
44 samsung,combiner-nr = <16>; 44 samsung,combiner-nr = <16>;
45 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, 45 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
46 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, 46 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
@@ -51,24 +51,21 @@
51 mct@10050000 { 51 mct@10050000 {
52 compatible = "samsung,exynos4210-mct"; 52 compatible = "samsung,exynos4210-mct";
53 reg = <0x10050000 0x800>; 53 reg = <0x10050000 0x800>;
54 interrupt-controller;
55 #interrups-cells = <2>;
56 interrupt-parent = <&mct_map>; 54 interrupt-parent = <&mct_map>;
57 interrupts = <0 0>, <1 0>, <2 0>, <3 0>, 55 interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
58 <4 0>, <5 0>;
59 clocks = <&clock 3>, <&clock 344>; 56 clocks = <&clock 3>, <&clock 344>;
60 clock-names = "fin_pll", "mct"; 57 clock-names = "fin_pll", "mct";
61 58
62 mct_map: mct-map { 59 mct_map: mct-map {
63 #interrupt-cells = <2>; 60 #interrupt-cells = <1>;
64 #address-cells = <0>; 61 #address-cells = <0>;
65 #size-cells = <0>; 62 #size-cells = <0>;
66 interrupt-map = <0x0 0 &gic 0 57 0>, 63 interrupt-map = <0 &gic 0 57 0>,
67 <0x1 0 &gic 0 69 0>, 64 <1 &gic 0 69 0>,
68 <0x2 0 &combiner 12 6>, 65 <2 &combiner 12 6>,
69 <0x3 0 &combiner 12 7>, 66 <3 &combiner 12 7>,
70 <0x4 0 &gic 0 42 0>, 67 <4 &gic 0 42 0>,
71 <0x5 0 &gic 0 48 0>; 68 <5 &gic 0 48 0>;
72 }; 69 };
73 }; 70 };
74 71
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index 6f34d7f6ba7e..94a43f9a05e2 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -22,7 +22,7 @@
22/ { 22/ {
23 compatible = "samsung,exynos4212"; 23 compatible = "samsung,exynos4212";
24 24
25 gic:interrupt-controller@10490000 { 25 gic: interrupt-controller@10490000 {
26 cpu-offset = <0x8000>; 26 cpu-offset = <0x8000>;
27 }; 27 };
28 28
@@ -34,26 +34,4 @@
34 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, 34 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
35 <0 107 0>, <0 108 0>; 35 <0 107 0>, <0 108 0>;
36 }; 36 };
37
38 mct@10050000 {
39 compatible = "samsung,exynos4412-mct";
40 reg = <0x10050000 0x800>;
41 interrupt-controller;
42 #interrups-cells = <2>;
43 interrupt-parent = <&mct_map>;
44 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
45 <4 0>, <5 0>;
46
47 mct_map: mct-map {
48 #interrupt-cells = <2>;
49 #address-cells = <0>;
50 #size-cells = <0>;
51 interrupt-map = <0x0 0 &gic 0 57 0>,
52 <0x1 0 &combiner 12 5>,
53 <0x2 0 &combiner 12 6>,
54 <0x3 0 &combiner 12 7>,
55 <0x4 0 &gic 1 12 0>,
56 <0x5 0 &gic 1 12 0>;
57 };
58 };
59}; 37};
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 46c678ee119c..8aad5f72ced7 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -38,9 +38,7 @@
38 }; 38 };
39 }; 39 };
40 40
41 mshc@12550000 { 41 mmc@12550000 {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; 42 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
45 pinctrl-names = "default"; 43 pinctrl-names = "default";
46 vmmc-supply = <&ldo20_reg &buck8_reg>; 44 vmmc-supply = <&ldo20_reg &buck8_reg>;
@@ -49,7 +47,6 @@
49 num-slots = <1>; 47 num-slots = <1>;
50 supports-highspeed; 48 supports-highspeed;
51 broken-cd; 49 broken-cd;
52 fifo-depth = <0x80>;
53 card-detect-delay = <200>; 50 card-detect-delay = <200>;
54 samsung,dw-mshc-ciu-div = <3>; 51 samsung,dw-mshc-ciu-div = <3>;
55 samsung,dw-mshc-sdr-timing = <2 3>; 52 samsung,dw-mshc-sdr-timing = <2 3>;
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index d65984c440f6..6bc053924e9e 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -122,9 +122,7 @@
122 status = "okay"; 122 status = "okay";
123 }; 123 };
124 124
125 mshc@12550000 { 125 mmc@12550000 {
126 #address-cells = <1>;
127 #size-cells = <0>;
128 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; 126 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
129 pinctrl-names = "default"; 127 pinctrl-names = "default";
130 status = "okay"; 128 status = "okay";
@@ -132,7 +130,6 @@
132 num-slots = <1>; 130 num-slots = <1>;
133 supports-highspeed; 131 supports-highspeed;
134 broken-cd; 132 broken-cd;
135 fifo-depth = <0x80>;
136 card-detect-delay = <200>; 133 card-detect-delay = <200>;
137 samsung,dw-mshc-ciu-div = <3>; 134 samsung,dw-mshc-ciu-div = <3>;
138 samsung,dw-mshc-sdr-timing = <2 3>; 135 samsung,dw-mshc-sdr-timing = <2 3>;
@@ -159,7 +156,7 @@
159 display-timings { 156 display-timings {
160 native-mode = <&timing0>; 157 native-mode = <&timing0>;
161 timing0: timing { 158 timing0: timing {
162 clock-frequency = <50000>; 159 clock-frequency = <47500000>;
163 hactive = <1024>; 160 hactive = <1024>;
164 vactive = <600>; 161 vactive = <600>;
165 hfront-porch = <64>; 162 hfront-porch = <64>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index fb7b9ae5f399..890ad275cb85 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -442,13 +442,25 @@
442 }; 442 };
443 }; 443 };
444 444
445 sdhci@12510000 { 445 mmc@12550000 {
446 bus-width = <8>; 446 num-slots = <1>;
447 supports-highspeed;
448 broken-cd;
447 non-removable; 449 non-removable;
448 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; 450 card-detect-delay = <200>;
449 pinctrl-names = "default";
450 vmmc-supply = <&vemmc_reg>; 451 vmmc-supply = <&vemmc_reg>;
452 clock-frequency = <400000000>;
453 samsung,dw-mshc-ciu-div = <0>;
454 samsung,dw-mshc-sdr-timing = <2 3>;
455 samsung,dw-mshc-ddr-timing = <1 2>;
456 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
457 pinctrl-names = "default";
451 status = "okay"; 458 status = "okay";
459
460 slot@0 {
461 reg = <0>;
462 bus-width = <8>;
463 };
452 }; 464 };
453 465
454 serial@13800000 { 466 serial@13800000 {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index e743e677a9e2..87b339c739de 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -22,7 +22,7 @@
22/ { 22/ {
23 compatible = "samsung,exynos4412"; 23 compatible = "samsung,exynos4412";
24 24
25 gic:interrupt-controller@10490000 { 25 gic: interrupt-controller@10490000 {
26 cpu-offset = <0x4000>; 26 cpu-offset = <0x4000>;
27 }; 27 };
28 28
@@ -35,37 +35,4 @@
35 <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>; 35 <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
36 }; 36 };
37 37
38 mct@10050000 {
39 compatible = "samsung,exynos4412-mct";
40 reg = <0x10050000 0x800>;
41 interrupt-controller;
42 #interrups-cells = <2>;
43 interrupt-parent = <&mct_map>;
44 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
45 <4 0>, <5 0>, <6 0>, <7 0>;
46 clocks = <&clock 3>, <&clock 344>;
47 clock-names = "fin_pll", "mct";
48
49 mct_map: mct-map {
50 #interrupt-cells = <2>;
51 #address-cells = <0>;
52 #size-cells = <0>;
53 interrupt-map = <0x0 0 &gic 0 57 0>,
54 <0x1 0 &combiner 12 5>,
55 <0x2 0 &combiner 12 6>,
56 <0x3 0 &combiner 12 7>,
57 <0x4 0 &gic 1 12 0>,
58 <0x5 0 &gic 1 12 0>,
59 <0x6 0 &gic 1 12 0>,
60 <0x7 0 &gic 1 12 0>;
61 };
62 };
63
64 mshc@12550000 {
65 compatible = "samsung,exynos4412-dw-mshc";
66 reg = <0x12550000 0x1000>;
67 interrupts = <0 77 0>;
68 #address-cells = <1>;
69 #size-cells = <0>;
70 };
71}; 38};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index ad531fe6ab95..5c412aa14738 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -28,6 +28,7 @@
28 pinctrl3 = &pinctrl_3; 28 pinctrl3 = &pinctrl_3;
29 fimc-lite0 = &fimc_lite_0; 29 fimc-lite0 = &fimc_lite_0;
30 fimc-lite1 = &fimc_lite_1; 30 fimc-lite1 = &fimc_lite_1;
31 mshc0 = &mshc_0;
31 }; 32 };
32 33
33 pd_isp: isp-power-domain@10023CA0 { 34 pd_isp: isp-power-domain@10023CA0 {
@@ -41,6 +42,26 @@
41 #clock-cells = <1>; 42 #clock-cells = <1>;
42 }; 43 };
43 44
45 mct@10050000 {
46 compatible = "samsung,exynos4412-mct";
47 reg = <0x10050000 0x800>;
48 interrupt-parent = <&mct_map>;
49 interrupts = <0>, <1>, <2>, <3>, <4>;
50 clocks = <&clock 3>, <&clock 344>;
51 clock-names = "fin_pll", "mct";
52
53 mct_map: mct-map {
54 #interrupt-cells = <1>;
55 #address-cells = <0>;
56 #size-cells = <0>;
57 interrupt-map = <0 &gic 0 57 0>,
58 <1 &combiner 12 5>,
59 <2 &combiner 12 6>,
60 <3 &combiner 12 7>,
61 <4 &gic 1 12 0>;
62 };
63 };
64
44 pinctrl_0: pinctrl@11400000 { 65 pinctrl_0: pinctrl@11400000 {
45 compatible = "samsung,exynos4x12-pinctrl"; 66 compatible = "samsung,exynos4x12-pinctrl";
46 reg = <0x11400000 0x1000>; 67 reg = <0x11400000 0x1000>;
@@ -176,4 +197,16 @@
176 }; 197 };
177 }; 198 };
178 }; 199 };
200
201 mshc_0: mmc@12550000 {
202 compatible = "samsung,exynos4412-dw-mshc";
203 reg = <0x12550000 0x1000>;
204 interrupts = <0 77 0>;
205 #address-cells = <1>;
206 #size-cells = <0>;
207 fifo-depth = <0x80>;
208 clocks = <&clock 301>, <&clock 149>;
209 clock-names = "biu", "ciu";
210 status = "disabled";
211 };
179}; 212};
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index e52b038a7a11..258dca441f36 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -23,7 +23,7 @@
23 reg = <0x10000000 0x100>; 23 reg = <0x10000000 0x100>;
24 }; 24 };
25 25
26 combiner:interrupt-controller@10440000 { 26 combiner: interrupt-controller@10440000 {
27 compatible = "samsung,exynos4210-combiner"; 27 compatible = "samsung,exynos4210-combiner";
28 #interrupt-cells = <2>; 28 #interrupt-cells = <2>;
29 interrupt-controller; 29 interrupt-controller;
@@ -39,7 +39,7 @@
39 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; 39 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
40 }; 40 };
41 41
42 gic:interrupt-controller@10481000 { 42 gic: interrupt-controller@10481000 {
43 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 43 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
44 #interrupt-cells = <3>; 44 #interrupt-cells = <3>;
45 interrupt-controller; 45 interrupt-controller;
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 9322652440d9..b42e658876e5 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -34,6 +34,7 @@
34 samsung,i2c-sda-delay = <100>; 34 samsung,i2c-sda-delay = <100>;
35 samsung,i2c-max-bus-freq = <20000>; 35 samsung,i2c-max-bus-freq = <20000>;
36 samsung,i2c-slave-addr = <0x66>; 36 samsung,i2c-slave-addr = <0x66>;
37 status = "okay";
37 38
38 s5m8767_pmic@66 { 39 s5m8767_pmic@66 {
39 compatible = "samsung,s5m8767-pmic"; 40 compatible = "samsung,s5m8767-pmic";
@@ -302,11 +303,13 @@
302 buck7_reg: BUCK7 { 303 buck7_reg: BUCK7 {
303 regulator-name = "PVDD_BUCK7"; 304 regulator-name = "PVDD_BUCK7";
304 regulator-always-on; 305 regulator-always-on;
306 op_mode = <1>;
305 }; 307 };
306 308
307 buck8_reg: BUCK8 { 309 buck8_reg: BUCK8 {
308 regulator-name = "PVDD_BUCK8"; 310 regulator-name = "PVDD_BUCK8";
309 regulator-always-on; 311 regulator-always-on;
312 op_mode = <1>;
310 }; 313 };
311 314
312 buck9_reg: BUCK9 { 315 buck9_reg: BUCK9 {
@@ -319,11 +322,9 @@
319 }; 322 };
320 }; 323 };
321 324
322 i2c@12C70000 {
323 status = "disabled";
324 };
325
326 i2c@12C80000 { 325 i2c@12C80000 {
326 status = "okay";
327
327 samsung,i2c-sda-delay = <100>; 328 samsung,i2c-sda-delay = <100>;
328 samsung,i2c-max-bus-freq = <66000>; 329 samsung,i2c-max-bus-freq = <66000>;
329 samsung,i2c-slave-addr = <0x50>; 330 samsung,i2c-slave-addr = <0x50>;
@@ -335,7 +336,10 @@
335 }; 336 };
336 337
337 i2c@12C90000 { 338 i2c@12C90000 {
339 status = "okay";
340
338 wm1811a@1a { 341 wm1811a@1a {
342
339 compatible = "wlf,wm1811"; 343 compatible = "wlf,wm1811";
340 reg = <0x1a>; 344 reg = <0x1a>;
341 345
@@ -353,23 +357,9 @@
353 }; 357 };
354 }; 358 };
355 359
356 i2c@12CA0000 {
357 status = "disabled";
358 };
359
360 i2c@12CB0000 {
361 status = "disabled";
362 };
363
364 i2c@12CC0000 {
365 status = "disabled";
366 };
367
368 i2c@12CD0000 {
369 status = "disabled";
370 };
371
372 i2c@12CE0000 { 360 i2c@12CE0000 {
361 status = "okay";
362
373 samsung,i2c-sda-delay = <100>; 363 samsung,i2c-sda-delay = <100>;
374 samsung,i2c-max-bus-freq = <66000>; 364 samsung,i2c-max-bus-freq = <66000>;
375 samsung,i2c-slave-addr = <0x38>; 365 samsung,i2c-slave-addr = <0x38>;
@@ -380,10 +370,6 @@
380 }; 370 };
381 }; 371 };
382 372
383 i2c@121D0000 {
384 status = "disabled";
385 };
386
387 mmc_0: mmc@12200000 { 373 mmc_0: mmc@12200000 {
388 status = "okay"; 374 status = "okay";
389 num-slots = <1>; 375 num-slots = <1>;
@@ -426,18 +412,6 @@
426 status = "okay"; 412 status = "okay";
427 }; 413 };
428 414
429 spi_0: spi@12d20000 {
430 status = "disabled";
431 };
432
433 spi_1: spi@12d30000 {
434 status = "disabled";
435 };
436
437 spi_2: spi@12d40000 {
438 status = "disabled";
439 };
440
441 gpio_keys { 415 gpio_keys {
442 compatible = "gpio-keys"; 416 compatible = "gpio-keys";
443 417
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
index 185b5211c687..9a61494f45f5 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
@@ -37,6 +37,7 @@
37 }; 37 };
38 38
39 i2c@12C60000 { 39 i2c@12C60000 {
40 status = "okay";
40 samsung,i2c-sda-delay = <100>; 41 samsung,i2c-sda-delay = <100>;
41 samsung,i2c-max-bus-freq = <378000>; 42 samsung,i2c-max-bus-freq = <378000>;
42 43
@@ -185,6 +186,7 @@
185 }; 186 };
186 187
187 i2c@12C70000 { 188 i2c@12C70000 {
189 status = "okay";
188 samsung,i2c-sda-delay = <100>; 190 samsung,i2c-sda-delay = <100>;
189 samsung,i2c-max-bus-freq = <378000>; 191 samsung,i2c-max-bus-freq = <378000>;
190 192
@@ -198,6 +200,7 @@
198 }; 200 };
199 201
200 i2c@12C80000 { 202 i2c@12C80000 {
203 status = "okay";
201 samsung,i2c-sda-delay = <100>; 204 samsung,i2c-sda-delay = <100>;
202 samsung,i2c-max-bus-freq = <66000>; 205 samsung,i2c-max-bus-freq = <66000>;
203 206
@@ -208,30 +211,31 @@
208 }; 211 };
209 212
210 i2c@12C90000 { 213 i2c@12C90000 {
214 status = "okay";
211 samsung,i2c-sda-delay = <100>; 215 samsung,i2c-sda-delay = <100>;
212 samsung,i2c-max-bus-freq = <66000>; 216 samsung,i2c-max-bus-freq = <66000>;
213 }; 217 };
214 218
215 i2c@12CA0000 { 219 i2c@12CA0000 {
220 status = "okay";
216 samsung,i2c-sda-delay = <100>; 221 samsung,i2c-sda-delay = <100>;
217 samsung,i2c-max-bus-freq = <66000>; 222 samsung,i2c-max-bus-freq = <66000>;
218 }; 223 };
219 224
220 i2c@12CB0000 { 225 i2c@12CB0000 {
226 status = "okay";
221 samsung,i2c-sda-delay = <100>; 227 samsung,i2c-sda-delay = <100>;
222 samsung,i2c-max-bus-freq = <66000>; 228 samsung,i2c-max-bus-freq = <66000>;
223 }; 229 };
224 230
225 i2c@12CC0000 {
226 status = "disabled";
227 };
228
229 i2c@12CD0000 { 231 i2c@12CD0000 {
232 status = "okay";
230 samsung,i2c-sda-delay = <100>; 233 samsung,i2c-sda-delay = <100>;
231 samsung,i2c-max-bus-freq = <66000>; 234 samsung,i2c-max-bus-freq = <66000>;
232 }; 235 };
233 236
234 i2c@12CE0000 { 237 i2c@12CE0000 {
238 status = "okay";
235 samsung,i2c-sda-delay = <100>; 239 samsung,i2c-sda-delay = <100>;
236 samsung,i2c-max-bus-freq = <378000>; 240 samsung,i2c-max-bus-freq = <378000>;
237 241
@@ -258,10 +262,6 @@
258 }; 262 };
259 }; 263 };
260 264
261 mmc@12210000 {
262 status = "disabled";
263 };
264
265 mmc@12220000 { 265 mmc@12220000 {
266 num-slots = <1>; 266 num-slots = <1>;
267 supports-highspeed; 267 supports-highspeed;
@@ -295,19 +295,12 @@
295 }; 295 };
296 }; 296 };
297 297
298 spi_0: spi@12d20000 {
299 status = "disabled";
300 };
301
302 spi_1: spi@12d30000 { 298 spi_1: spi@12d30000 {
299 status = "okay";
303 samsung,spi-src-clk = <0>; 300 samsung,spi-src-clk = <0>;
304 num-cs = <1>; 301 num-cs = <1>;
305 }; 302 };
306 303
307 spi_2: spi@12d40000 {
308 status = "disabled";
309 };
310
311 hdmi { 304 hdmi {
312 hpd-gpio = <&gpx3 7 0>; 305 hpd-gpio = <&gpx3 7 0>;
313 }; 306 };
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 13746dfb20aa..3e69837c435c 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,7 @@
30 i2c@12C60000 { 30 i2c@12C60000 {
31 samsung,i2c-sda-delay = <100>; 31 samsung,i2c-sda-delay = <100>;
32 samsung,i2c-max-bus-freq = <20000>; 32 samsung,i2c-max-bus-freq = <20000>;
33 status = "okay";
33 34
34 eeprom@50 { 35 eeprom@50 {
35 compatible = "samsung,s524ad0xd1"; 36 compatible = "samsung,s524ad0xd1";
@@ -37,7 +38,7 @@
37 }; 38 };
38 }; 39 };
39 40
40 vdd:fixed-regulator@0 { 41 vdd: fixed-regulator@0 {
41 compatible = "regulator-fixed"; 42 compatible = "regulator-fixed";
42 regulator-name = "vdd-supply"; 43 regulator-name = "vdd-supply";
43 regulator-min-microvolt = <1800000>; 44 regulator-min-microvolt = <1800000>;
@@ -45,7 +46,7 @@
45 regulator-always-on; 46 regulator-always-on;
46 }; 47 };
47 48
48 dbvdd:fixed-regulator@1 { 49 dbvdd: fixed-regulator@1 {
49 compatible = "regulator-fixed"; 50 compatible = "regulator-fixed";
50 regulator-name = "dbvdd-supply"; 51 regulator-name = "dbvdd-supply";
51 regulator-min-microvolt = <3300000>; 52 regulator-min-microvolt = <3300000>;
@@ -53,7 +54,7 @@
53 regulator-always-on; 54 regulator-always-on;
54 }; 55 };
55 56
56 spkvdd:fixed-regulator@2 { 57 spkvdd: fixed-regulator@2 {
57 compatible = "regulator-fixed"; 58 compatible = "regulator-fixed";
58 regulator-name = "spkvdd-supply"; 59 regulator-name = "spkvdd-supply";
59 regulator-min-microvolt = <5000000>; 60 regulator-min-microvolt = <5000000>;
@@ -64,6 +65,7 @@
64 i2c@12C70000 { 65 i2c@12C70000 {
65 samsung,i2c-sda-delay = <100>; 66 samsung,i2c-sda-delay = <100>;
66 samsung,i2c-max-bus-freq = <20000>; 67 samsung,i2c-max-bus-freq = <20000>;
68 status = "okay";
67 69
68 eeprom@51 { 70 eeprom@51 {
69 compatible = "samsung,s524ad0xd1"; 71 compatible = "samsung,s524ad0xd1";
@@ -77,6 +79,9 @@
77 gpio-controller; 79 gpio-controller;
78 #gpio-cells = <2>; 80 #gpio-cells = <2>;
79 81
82 clocks = <&codec_mclk>;
83 clock-names = "MCLK1";
84
80 AVDD2-supply = <&vdd>; 85 AVDD2-supply = <&vdd>;
81 CPVDD-supply = <&vdd>; 86 CPVDD-supply = <&vdd>;
82 DBVDD-supply = <&dbvdd>; 87 DBVDD-supply = <&dbvdd>;
@@ -89,6 +94,7 @@
89 samsung,i2c-sda-delay = <100>; 94 samsung,i2c-sda-delay = <100>;
90 samsung,i2c-max-bus-freq = <40000>; 95 samsung,i2c-max-bus-freq = <40000>;
91 samsung,i2c-slave-addr = <0x38>; 96 samsung,i2c-slave-addr = <0x38>;
97 status = "okay";
92 98
93 sata-phy { 99 sata-phy {
94 compatible = "samsung,sata-phy"; 100 compatible = "samsung,sata-phy";
@@ -103,6 +109,7 @@
103 i2c@12C80000 { 109 i2c@12C80000 {
104 samsung,i2c-sda-delay = <100>; 110 samsung,i2c-sda-delay = <100>;
105 samsung,i2c-max-bus-freq = <66000>; 111 samsung,i2c-max-bus-freq = <66000>;
112 status = "okay";
106 113
107 hdmiddc@50 { 114 hdmiddc@50 {
108 compatible = "samsung,exynos4210-hdmiddc"; 115 compatible = "samsung,exynos4210-hdmiddc";
@@ -110,29 +117,10 @@
110 }; 117 };
111 }; 118 };
112 119
113 i2c@12C90000 {
114 status = "disabled";
115 };
116
117 i2c@12CA0000 {
118 status = "disabled";
119 };
120
121 i2c@12CB0000 {
122 status = "disabled";
123 };
124
125 i2c@12CC0000 {
126 status = "disabled";
127 };
128
129 i2c@12CD0000 {
130 status = "disabled";
131 };
132
133 i2c@12CE0000 { 120 i2c@12CE0000 {
134 samsung,i2c-sda-delay = <100>; 121 samsung,i2c-sda-delay = <100>;
135 samsung,i2c-max-bus-freq = <66000>; 122 samsung,i2c-max-bus-freq = <66000>;
123 status = "okay";
136 124
137 hdmiphy@38 { 125 hdmiphy@38 {
138 compatible = "samsung,exynos4212-hdmiphy"; 126 compatible = "samsung,exynos4212-hdmiphy";
@@ -181,6 +169,8 @@
181 }; 169 };
182 170
183 spi_1: spi@12d30000 { 171 spi_1: spi@12d30000 {
172 status = "okay";
173
184 w25q80bw@0 { 174 w25q80bw@0 {
185 #address-cells = <1>; 175 #address-cells = <1>;
186 #size-cells = <1>; 176 #size-cells = <1>;
@@ -206,10 +196,6 @@
206 }; 196 };
207 }; 197 };
208 198
209 spi_2: spi@12d40000 {
210 status = "disabled";
211 };
212
213 hdmi { 199 hdmi {
214 hpd-gpio = <&gpx3 7 0>; 200 hpd-gpio = <&gpx3 7 0>;
215 }; 201 };
@@ -271,5 +257,11 @@
271 compatible = "samsung,clock-xxti"; 257 compatible = "samsung,clock-xxti";
272 clock-frequency = <24000000>; 258 clock-frequency = <24000000>;
273 }; 259 };
260
261 codec_mclk: codec-mclk {
262 compatible = "fixed-clock";
263 #clock-cells = <0>;
264 clock-frequency = <16934000>;
265 };
274 }; 266 };
275}; 267};
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index a9395c426db4..7e45eea2d78f 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -10,7 +10,7 @@
10 10
11/dts-v1/; 11/dts-v1/;
12#include "exynos5250.dtsi" 12#include "exynos5250.dtsi"
13#include "cros5250-common.dtsi" 13#include "exynos5250-cros-common.dtsi"
14 14
15/ { 15/ {
16 model = "Google Snow"; 16 model = "Google Snow";
@@ -85,7 +85,7 @@
85 keypad,num-rows = <8>; 85 keypad,num-rows = <8>;
86 keypad,num-columns = <13>; 86 keypad,num-columns = <13>;
87 google,needs-ghost-filter; 87 google,needs-ghost-filter;
88 linux,keymap = <0x0001003a /* CAPSLK */ 88 linux,keymap = <0x0001007d /* L_META */
89 0x0002003b /* F1 */ 89 0x0002003b /* F1 */
90 0x00030030 /* B */ 90 0x00030030 /* B */
91 0x00040044 /* F10 */ 91 0x00040044 /* F10 */
@@ -130,6 +130,7 @@
130 0x04060024 /* J */ 130 0x04060024 /* J */
131 0x04080027 /* ; */ 131 0x04080027 /* ; */
132 0x04090026 /* L */ 132 0x04090026 /* L */
133 0x040a002b /* \ */
133 0x040b001c /* ENTER */ 134 0x040b001c /* ENTER */
134 135
135 0x0501002c /* Z */ 136 0x0501002c /* Z */
@@ -171,11 +172,20 @@
171 }; 172 };
172 }; 173 };
173 174
175 mmc@12200000 {
176 status = "okay";
177 };
178
179 mmc@12220000 {
180 status = "okay";
181 };
182
174 /* 183 /*
175 * On Snow we've got SIP WiFi and so can keep drive strengths low to 184 * On Snow we've got SIP WiFi and so can keep drive strengths low to
176 * reduce EMI. 185 * reduce EMI.
177 */ 186 */
178 mmc@12230000 { 187 mmc@12230000 {
188 status = "okay";
179 slot@0 { 189 slot@0 {
180 pinctrl-names = "default"; 190 pinctrl-names = "default";
181 pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>; 191 pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b98ffc3a5fe2..c341e55205cd 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -60,11 +60,13 @@
60 device_type = "cpu"; 60 device_type = "cpu";
61 compatible = "arm,cortex-a15"; 61 compatible = "arm,cortex-a15";
62 reg = <0>; 62 reg = <0>;
63 clock-frequency = <1700000000>;
63 }; 64 };
64 cpu@1 { 65 cpu@1 {
65 device_type = "cpu"; 66 device_type = "cpu";
66 compatible = "arm,cortex-a15"; 67 compatible = "arm,cortex-a15";
67 reg = <1>; 68 reg = <1>;
69 clock-frequency = <1700000000>;
68 }; 70 };
69 }; 71 };
70 72
@@ -242,6 +244,7 @@
242 clock-names = "i2c"; 244 clock-names = "i2c";
243 pinctrl-names = "default"; 245 pinctrl-names = "default";
244 pinctrl-0 = <&i2c0_bus>; 246 pinctrl-0 = <&i2c0_bus>;
247 status = "disabled";
245 }; 248 };
246 249
247 i2c_1: i2c@12C70000 { 250 i2c_1: i2c@12C70000 {
@@ -254,6 +257,7 @@
254 clock-names = "i2c"; 257 clock-names = "i2c";
255 pinctrl-names = "default"; 258 pinctrl-names = "default";
256 pinctrl-0 = <&i2c1_bus>; 259 pinctrl-0 = <&i2c1_bus>;
260 status = "disabled";
257 }; 261 };
258 262
259 i2c_2: i2c@12C80000 { 263 i2c_2: i2c@12C80000 {
@@ -266,6 +270,7 @@
266 clock-names = "i2c"; 270 clock-names = "i2c";
267 pinctrl-names = "default"; 271 pinctrl-names = "default";
268 pinctrl-0 = <&i2c2_bus>; 272 pinctrl-0 = <&i2c2_bus>;
273 status = "disabled";
269 }; 274 };
270 275
271 i2c_3: i2c@12C90000 { 276 i2c_3: i2c@12C90000 {
@@ -278,6 +283,7 @@
278 clock-names = "i2c"; 283 clock-names = "i2c";
279 pinctrl-names = "default"; 284 pinctrl-names = "default";
280 pinctrl-0 = <&i2c3_bus>; 285 pinctrl-0 = <&i2c3_bus>;
286 status = "disabled";
281 }; 287 };
282 288
283 i2c_4: i2c@12CA0000 { 289 i2c_4: i2c@12CA0000 {
@@ -290,6 +296,7 @@
290 clock-names = "i2c"; 296 clock-names = "i2c";
291 pinctrl-names = "default"; 297 pinctrl-names = "default";
292 pinctrl-0 = <&i2c4_bus>; 298 pinctrl-0 = <&i2c4_bus>;
299 status = "disabled";
293 }; 300 };
294 301
295 i2c_5: i2c@12CB0000 { 302 i2c_5: i2c@12CB0000 {
@@ -302,6 +309,7 @@
302 clock-names = "i2c"; 309 clock-names = "i2c";
303 pinctrl-names = "default"; 310 pinctrl-names = "default";
304 pinctrl-0 = <&i2c5_bus>; 311 pinctrl-0 = <&i2c5_bus>;
312 status = "disabled";
305 }; 313 };
306 314
307 i2c_6: i2c@12CC0000 { 315 i2c_6: i2c@12CC0000 {
@@ -314,6 +322,7 @@
314 clock-names = "i2c"; 322 clock-names = "i2c";
315 pinctrl-names = "default"; 323 pinctrl-names = "default";
316 pinctrl-0 = <&i2c6_bus>; 324 pinctrl-0 = <&i2c6_bus>;
325 status = "disabled";
317 }; 326 };
318 327
319 i2c_7: i2c@12CD0000 { 328 i2c_7: i2c@12CD0000 {
@@ -326,6 +335,7 @@
326 clock-names = "i2c"; 335 clock-names = "i2c";
327 pinctrl-names = "default"; 336 pinctrl-names = "default";
328 pinctrl-0 = <&i2c7_bus>; 337 pinctrl-0 = <&i2c7_bus>;
338 status = "disabled";
329 }; 339 };
330 340
331 i2c_8: i2c@12CE0000 { 341 i2c_8: i2c@12CE0000 {
@@ -336,6 +346,7 @@
336 #size-cells = <0>; 346 #size-cells = <0>;
337 clocks = <&clock 302>; 347 clocks = <&clock 302>;
338 clock-names = "i2c"; 348 clock-names = "i2c";
349 status = "disabled";
339 }; 350 };
340 351
341 i2c@121D0000 { 352 i2c@121D0000 {
@@ -345,10 +356,12 @@
345 #size-cells = <0>; 356 #size-cells = <0>;
346 clocks = <&clock 288>; 357 clocks = <&clock 288>;
347 clock-names = "i2c"; 358 clock-names = "i2c";
359 status = "disabled";
348 }; 360 };
349 361
350 spi_0: spi@12d20000 { 362 spi_0: spi@12d20000 {
351 compatible = "samsung,exynos4210-spi"; 363 compatible = "samsung,exynos4210-spi";
364 status = "disabled";
352 reg = <0x12d20000 0x100>; 365 reg = <0x12d20000 0x100>;
353 interrupts = <0 66 0>; 366 interrupts = <0 66 0>;
354 dmas = <&pdma0 5 367 dmas = <&pdma0 5
@@ -364,6 +377,7 @@
364 377
365 spi_1: spi@12d30000 { 378 spi_1: spi@12d30000 {
366 compatible = "samsung,exynos4210-spi"; 379 compatible = "samsung,exynos4210-spi";
380 status = "disabled";
367 reg = <0x12d30000 0x100>; 381 reg = <0x12d30000 0x100>;
368 interrupts = <0 67 0>; 382 interrupts = <0 67 0>;
369 dmas = <&pdma1 5 383 dmas = <&pdma1 5
@@ -379,6 +393,7 @@
379 393
380 spi_2: spi@12d40000 { 394 spi_2: spi@12d40000 {
381 compatible = "samsung,exynos4210-spi"; 395 compatible = "samsung,exynos4210-spi";
396 status = "disabled";
382 reg = <0x12d40000 0x100>; 397 reg = <0x12d40000 0x100>;
383 interrupts = <0 68 0>; 398 interrupts = <0 68 0>;
384 dmas = <&pdma0 7 399 dmas = <&pdma0 7
@@ -546,6 +561,15 @@
546 }; 561 };
547 }; 562 };
548 563
564 pwm: pwm@12dd0000 {
565 compatible = "samsung,exynos4210-pwm";
566 reg = <0x12dd0000 0x100>;
567 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
568 #pwm-cells = <3>;
569 clocks = <&clock 311>;
570 clock-names = "timers";
571 };
572
549 amba { 573 amba {
550 #address-cells = <1>; 574 #address-cells = <1>;
551 #size-cells = <1>; 575 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index e695aba5f73c..e62c8eb57438 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -64,7 +64,7 @@
64 samsung,pins = "gpx0-7"; 64 samsung,pins = "gpx0-7";
65 samsung,pin-function = <3>; 65 samsung,pin-function = <3>;
66 samsung,pin-pud = <0>; 66 samsung,pin-pud = <0>;
67 samaung,pin-drv = <0>; 67 samsung,pin-drv = <0>;
68 }; 68 };
69 }; 69 };
70 70
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 76f4e0bed039..11dd202c54bb 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -43,6 +43,9 @@
43 i2c10 = &hsi2c_10; 43 i2c10 = &hsi2c_10;
44 gsc0 = &gsc_0; 44 gsc0 = &gsc_0;
45 gsc1 = &gsc_1; 45 gsc1 = &gsc_1;
46 spi0 = &spi_0;
47 spi1 = &spi_1;
48 spi2 = &spi_2;
46 }; 49 };
47 50
48 cpus { 51 cpus {
@@ -271,6 +274,106 @@
271 status = "okay"; 274 status = "okay";
272 }; 275 };
273 276
277 amba {
278 #address-cells = <1>;
279 #size-cells = <1>;
280 compatible = "arm,amba-bus";
281 interrupt-parent = <&gic>;
282 ranges;
283
284 pdma0: pdma@121A0000 {
285 compatible = "arm,pl330", "arm,primecell";
286 reg = <0x121A0000 0x1000>;
287 interrupts = <0 34 0>;
288 clocks = <&clock 362>;
289 clock-names = "apb_pclk";
290 #dma-cells = <1>;
291 #dma-channels = <8>;
292 #dma-requests = <32>;
293 };
294
295 pdma1: pdma@121B0000 {
296 compatible = "arm,pl330", "arm,primecell";
297 reg = <0x121B0000 0x1000>;
298 interrupts = <0 35 0>;
299 clocks = <&clock 363>;
300 clock-names = "apb_pclk";
301 #dma-cells = <1>;
302 #dma-channels = <8>;
303 #dma-requests = <32>;
304 };
305
306 mdma0: mdma@10800000 {
307 compatible = "arm,pl330", "arm,primecell";
308 reg = <0x10800000 0x1000>;
309 interrupts = <0 33 0>;
310 clocks = <&clock 473>;
311 clock-names = "apb_pclk";
312 #dma-cells = <1>;
313 #dma-channels = <8>;
314 #dma-requests = <1>;
315 };
316
317 mdma1: mdma@11C10000 {
318 compatible = "arm,pl330", "arm,primecell";
319 reg = <0x11C10000 0x1000>;
320 interrupts = <0 124 0>;
321 clocks = <&clock 442>;
322 clock-names = "apb_pclk";
323 #dma-cells = <1>;
324 #dma-channels = <8>;
325 #dma-requests = <1>;
326 };
327 };
328
329 spi_0: spi@12d20000 {
330 compatible = "samsung,exynos4210-spi";
331 reg = <0x12d20000 0x100>;
332 interrupts = <0 66 0>;
333 dmas = <&pdma0 5
334 &pdma0 4>;
335 dma-names = "tx", "rx";
336 #address-cells = <1>;
337 #size-cells = <0>;
338 pinctrl-names = "default";
339 pinctrl-0 = <&spi0_bus>;
340 clocks = <&clock 271>, <&clock 135>;
341 clock-names = "spi", "spi_busclk0";
342 status = "disabled";
343 };
344
345 spi_1: spi@12d30000 {
346 compatible = "samsung,exynos4210-spi";
347 reg = <0x12d30000 0x100>;
348 interrupts = <0 67 0>;
349 dmas = <&pdma1 5
350 &pdma1 4>;
351 dma-names = "tx", "rx";
352 #address-cells = <1>;
353 #size-cells = <0>;
354 pinctrl-names = "default";
355 pinctrl-0 = <&spi1_bus>;
356 clocks = <&clock 272>, <&clock 136>;
357 clock-names = "spi", "spi_busclk0";
358 status = "disabled";
359 };
360
361 spi_2: spi@12d40000 {
362 compatible = "samsung,exynos4210-spi";
363 reg = <0x12d40000 0x100>;
364 interrupts = <0 68 0>;
365 dmas = <&pdma0 7
366 &pdma0 6>;
367 dma-names = "tx", "rx";
368 #address-cells = <1>;
369 #size-cells = <0>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&spi2_bus>;
372 clocks = <&clock 273>, <&clock 137>;
373 clock-names = "spi", "spi_busclk0";
374 status = "disabled";
375 };
376
274 serial@12C00000 { 377 serial@12C00000 {
275 clocks = <&clock 257>, <&clock 128>; 378 clocks = <&clock 257>, <&clock 128>;
276 clock-names = "uart", "clk_uart_baud0"; 379 clock-names = "uart", "clk_uart_baud0";
@@ -291,6 +394,15 @@
291 clock-names = "uart", "clk_uart_baud0"; 394 clock-names = "uart", "clk_uart_baud0";
292 }; 395 };
293 396
397 pwm: pwm@12dd0000 {
398 compatible = "samsung,exynos4210-pwm";
399 reg = <0x12dd0000 0x100>;
400 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
401 #pwm-cells = <3>;
402 clocks = <&clock 279>;
403 clock-names = "timers";
404 };
405
294 dp_phy: video-phy@10040728 { 406 dp_phy: video-phy@10040728 {
295 compatible = "samsung,exynos5250-dp-video-phy"; 407 compatible = "samsung,exynos5250-dp-video-phy";
296 reg = <0x10040728 4>; 408 reg = <0x10040728 4>;
@@ -500,4 +612,44 @@
500 clock-names = "gscl"; 612 clock-names = "gscl";
501 samsung,power-domain = <&gsc_pd>; 613 samsung,power-domain = <&gsc_pd>;
502 }; 614 };
615
616 tmu_cpu0: tmu@10060000 {
617 compatible = "samsung,exynos5420-tmu";
618 reg = <0x10060000 0x100>;
619 interrupts = <0 65 0>;
620 clocks = <&clock 318>;
621 clock-names = "tmu_apbif";
622 };
623
624 tmu_cpu1: tmu@10064000 {
625 compatible = "samsung,exynos5420-tmu";
626 reg = <0x10064000 0x100>;
627 interrupts = <0 183 0>;
628 clocks = <&clock 318>;
629 clock-names = "tmu_apbif";
630 };
631
632 tmu_cpu2: tmu@10068000 {
633 compatible = "samsung,exynos5420-tmu-ext-triminfo";
634 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
635 interrupts = <0 184 0>;
636 clocks = <&clock 318>, <&clock 318>;
637 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
638 };
639
640 tmu_cpu3: tmu@1006c000 {
641 compatible = "samsung,exynos5420-tmu-ext-triminfo";
642 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
643 interrupts = <0 185 0>;
644 clocks = <&clock 318>, <&clock 319>;
645 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
646 };
647
648 tmu_gpu: tmu@100a0000 {
649 compatible = "samsung,exynos5420-tmu-ext-triminfo";
650 reg = <0x100a0000 0x100>, <0x10068000 0x4>;
651 interrupts = <0 215 0>;
652 clocks = <&clock 319>, <&clock 318>;
653 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
654 };
503}; 655};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 8da107088ce4..02a0a1226cef 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -29,7 +29,7 @@
29 #clock-cells = <1>; 29 #clock-cells = <1>;
30 }; 30 };
31 31
32 gic:interrupt-controller@2E0000 { 32 gic: interrupt-controller@2E0000 {
33 compatible = "arm,cortex-a15-gic"; 33 compatible = "arm,cortex-a15-gic";
34 #interrupt-cells = <3>; 34 #interrupt-cells = <3>;
35 interrupt-controller; 35 interrupt-controller;
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 58d46a3d7b78..97ae4703cb78 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -36,7 +36,9 @@
36#include <plat/devs.h> 36#include <plat/devs.h>
37#include <plat/fb.h> 37#include <plat/fb.h>
38#include <linux/platform_data/mtd-nand-s3c2410.h> 38#include <linux/platform_data/mtd-nand-s3c2410.h>
39#include <linux/platform_data/mmc-sdhci-s3c.h>
39#include <plat/regs-serial.h> 40#include <plat/regs-serial.h>
41#include <plat/sdhci.h>
40#include <linux/platform_data/touchscreen-s3c2410.h> 42#include <linux/platform_data/touchscreen-s3c2410.h>
41 43
42#include <video/platform_lcd.h> 44#include <video/platform_lcd.h>
@@ -214,6 +216,13 @@ static struct platform_device mini6410_lcd_powerdev = {
214 .dev.platform_data = &mini6410_lcd_power_data, 216 .dev.platform_data = &mini6410_lcd_power_data,
215}; 217};
216 218
219static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
220 .max_width = 4,
221 .cd_type = S3C_SDHCI_CD_GPIO,
222 .ext_cd_gpio = S3C64XX_GPN(10),
223 .ext_cd_gpio_invert = true,
224};
225
217static struct platform_device *mini6410_devices[] __initdata = { 226static struct platform_device *mini6410_devices[] __initdata = {
218 &mini6410_device_eth, 227 &mini6410_device_eth,
219 &s3c_device_hsmmc0, 228 &s3c_device_hsmmc0,
@@ -321,6 +330,7 @@ static void __init mini6410_machine_init(void)
321 330
322 s3c_nand_set_platdata(&mini6410_nand_info); 331 s3c_nand_set_platdata(&mini6410_nand_info);
323 s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]); 332 s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
333 s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
324 s3c24xx_ts_set_platdata(NULL); 334 s3c24xx_ts_set_platdata(NULL);
325 335
326 /* configure nCS1 width to 16 bits */ 336 /* configure nCS1 width to 16 bits */
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index 4afc32f90b6d..f48dc0a4736c 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -145,6 +145,8 @@ static inline void arch_enable_uart_fifo(void)
145 if (!(fifocon & S3C2410_UFCON_RESETBOTH)) 145 if (!(fifocon & S3C2410_UFCON_RESETBOTH))
146 break; 146 break;
147 } 147 }
148
149 uart_wr(S3C2410_UFCON, S3C2410_UFCON_FIFOMODE);
148 } 150 }
149} 151}
150#else 152#else
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index ad5ff50c5f28..d967571d305e 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -530,7 +530,8 @@ static struct samsung_div_clock exynos4_div_clks[] __initdata = {
530 DIV(sclk_i2s1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6), 530 DIV(sclk_i2s1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6),
531 DIV(sclk_i2s2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6), 531 DIV(sclk_i2s2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6),
532 DIV(none, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4), 532 DIV(none, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4),
533 DIV(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8), 533 DIV_F(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8,
534 CLK_SET_RATE_PARENT, 0),
534 DIV(none, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4), 535 DIV(none, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4),
535 DIV(none, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4), 536 DIV(none, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4),
536 DIV(none, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4), 537 DIV(none, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4),
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-31 06:43:43 -0400