diff options
author | Ankur Kishore <a-kishore@ti.com> | 2013-10-12 06:14:21 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2013-10-14 00:46:38 -0400 |
commit | d3f5d551df68f3b1135f212ce61eaad21fe7b42d (patch) | |
tree | 021e0f55b067e94d0f341b218af7481e9c7c0a87 | |
parent | ace1e3ec4a2540c783e65884bb7be9cd45a0a295 (diff) |
ARM: OMAP2+: CM: cm_inst offset s16->u16
Most of the AM43x CM reg address offsets are with MSB bit '1' (on
16-bit value) leading to arithmetic miscalculations while calculating
CLOCK ENABLE register's address because cm_inst field was a type of
"const s16", so make it "const u16".
Also modify relevant functions so as to take care of the above.
[afzal@ti.com: fixup and cleanup]
Signed-off-by: Ankur Kishore <a-kishore@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm33xx.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm33xx.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cminst44xx.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cminst44xx.h | 26 |
5 files changed, 37 insertions, 37 deletions
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 4b03394fa0c5..5431b0cae665 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h | |||
@@ -132,7 +132,7 @@ struct clockdomain { | |||
132 | u8 _flags; | 132 | u8 _flags; |
133 | const u8 dep_bit; | 133 | const u8 dep_bit; |
134 | const u8 prcm_partition; | 134 | const u8 prcm_partition; |
135 | const s16 cm_inst; | 135 | const u16 cm_inst; |
136 | const u16 clkdm_offs; | 136 | const u16 clkdm_offs; |
137 | struct clkdm_dep *wkdep_srcs; | 137 | struct clkdm_dep *wkdep_srcs; |
138 | struct clkdm_dep *sleepdep_srcs; | 138 | struct clkdm_dep *sleepdep_srcs; |
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index 325a51576576..40a22e5649ae 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c | |||
@@ -48,13 +48,13 @@ | |||
48 | /* Private functions */ | 48 | /* Private functions */ |
49 | 49 | ||
50 | /* Read a register in a CM instance */ | 50 | /* Read a register in a CM instance */ |
51 | static inline u32 am33xx_cm_read_reg(s16 inst, u16 idx) | 51 | static inline u32 am33xx_cm_read_reg(u16 inst, u16 idx) |
52 | { | 52 | { |
53 | return __raw_readl(cm_base + inst + idx); | 53 | return __raw_readl(cm_base + inst + idx); |
54 | } | 54 | } |
55 | 55 | ||
56 | /* Write into a register in a CM */ | 56 | /* Write into a register in a CM */ |
57 | static inline void am33xx_cm_write_reg(u32 val, s16 inst, u16 idx) | 57 | static inline void am33xx_cm_write_reg(u32 val, u16 inst, u16 idx) |
58 | { | 58 | { |
59 | __raw_writel(val, cm_base + inst + idx); | 59 | __raw_writel(val, cm_base + inst + idx); |
60 | } | 60 | } |
@@ -138,7 +138,7 @@ static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs) | |||
138 | * @c must be the unshifted value for CLKTRCTRL - i.e., this function | 138 | * @c must be the unshifted value for CLKTRCTRL - i.e., this function |
139 | * will handle the shift itself. | 139 | * will handle the shift itself. |
140 | */ | 140 | */ |
141 | static void _clktrctrl_write(u8 c, s16 inst, u16 cdoffs) | 141 | static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs) |
142 | { | 142 | { |
143 | u32 v; | 143 | u32 v; |
144 | 144 | ||
@@ -158,7 +158,7 @@ static void _clktrctrl_write(u8 c, s16 inst, u16 cdoffs) | |||
158 | * Returns true if the clockdomain referred to by (@inst, @cdoffs) | 158 | * Returns true if the clockdomain referred to by (@inst, @cdoffs) |
159 | * is in hardware-supervised idle mode, or 0 otherwise. | 159 | * is in hardware-supervised idle mode, or 0 otherwise. |
160 | */ | 160 | */ |
161 | bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs) | 161 | bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs) |
162 | { | 162 | { |
163 | u32 v; | 163 | u32 v; |
164 | 164 | ||
@@ -177,7 +177,7 @@ bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs) | |||
177 | * Put a clockdomain referred to by (@inst, @cdoffs) into | 177 | * Put a clockdomain referred to by (@inst, @cdoffs) into |
178 | * hardware-supervised idle mode. No return value. | 178 | * hardware-supervised idle mode. No return value. |
179 | */ | 179 | */ |
180 | void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs) | 180 | void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs) |
181 | { | 181 | { |
182 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs); | 182 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs); |
183 | } | 183 | } |
@@ -191,7 +191,7 @@ void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs) | |||
191 | * software-supervised idle mode, i.e., controlled manually by the | 191 | * software-supervised idle mode, i.e., controlled manually by the |
192 | * Linux OMAP clockdomain code. No return value. | 192 | * Linux OMAP clockdomain code. No return value. |
193 | */ | 193 | */ |
194 | void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs) | 194 | void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs) |
195 | { | 195 | { |
196 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs); | 196 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs); |
197 | } | 197 | } |
@@ -204,7 +204,7 @@ void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs) | |||
204 | * Put a clockdomain referred to by (@inst, @cdoffs) into idle | 204 | * Put a clockdomain referred to by (@inst, @cdoffs) into idle |
205 | * No return value. | 205 | * No return value. |
206 | */ | 206 | */ |
207 | void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs) | 207 | void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs) |
208 | { | 208 | { |
209 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs); | 209 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs); |
210 | } | 210 | } |
@@ -217,7 +217,7 @@ void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs) | |||
217 | * Take a clockdomain referred to by (@inst, @cdoffs) out of idle, | 217 | * Take a clockdomain referred to by (@inst, @cdoffs) out of idle, |
218 | * waking it up. No return value. | 218 | * waking it up. No return value. |
219 | */ | 219 | */ |
220 | void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs) | 220 | void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs) |
221 | { | 221 | { |
222 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs); | 222 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs); |
223 | } | 223 | } |
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h index 9d1f4fcdebbb..757320b7c0b3 100644 --- a/arch/arm/mach-omap2/cm33xx.h +++ b/arch/arm/mach-omap2/cm33xx.h | |||
@@ -377,11 +377,11 @@ | |||
377 | 377 | ||
378 | 378 | ||
379 | #ifndef __ASSEMBLER__ | 379 | #ifndef __ASSEMBLER__ |
380 | extern bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs); | 380 | bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs); |
381 | extern void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs); | 381 | void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs); |
382 | extern void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs); | 382 | void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs); |
383 | extern void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs); | 383 | void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs); |
384 | extern void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs); | 384 | void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs); |
385 | 385 | ||
386 | #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) | 386 | #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) |
387 | extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, | 387 | extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, |
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index f0290f5566fe..e95722230a0e 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c | |||
@@ -111,7 +111,7 @@ static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) | |||
111 | /* Public functions */ | 111 | /* Public functions */ |
112 | 112 | ||
113 | /* Read a register in a CM instance */ | 113 | /* Read a register in a CM instance */ |
114 | u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) | 114 | u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx) |
115 | { | 115 | { |
116 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 116 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
117 | part == OMAP4430_INVALID_PRCM_PARTITION || | 117 | part == OMAP4430_INVALID_PRCM_PARTITION || |
@@ -120,7 +120,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) | |||
120 | } | 120 | } |
121 | 121 | ||
122 | /* Write into a register in a CM instance */ | 122 | /* Write into a register in a CM instance */ |
123 | void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) | 123 | void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx) |
124 | { | 124 | { |
125 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 125 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
126 | part == OMAP4430_INVALID_PRCM_PARTITION || | 126 | part == OMAP4430_INVALID_PRCM_PARTITION || |
@@ -129,7 +129,7 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) | |||
129 | } | 129 | } |
130 | 130 | ||
131 | /* Read-modify-write a register in CM1. Caller must lock */ | 131 | /* Read-modify-write a register in CM1. Caller must lock */ |
132 | u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, | 132 | u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst, |
133 | s16 idx) | 133 | s16 idx) |
134 | { | 134 | { |
135 | u32 v; | 135 | u32 v; |
@@ -142,12 +142,12 @@ u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, | |||
142 | return v; | 142 | return v; |
143 | } | 143 | } |
144 | 144 | ||
145 | u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, s16 inst, s16 idx) | 145 | u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx) |
146 | { | 146 | { |
147 | return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx); | 147 | return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx); |
148 | } | 148 | } |
149 | 149 | ||
150 | u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, s16 idx) | 150 | u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx) |
151 | { | 151 | { |
152 | return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx); | 152 | return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx); |
153 | } | 153 | } |
@@ -177,7 +177,7 @@ u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask) | |||
177 | * @c must be the unshifted value for CLKTRCTRL - i.e., this function | 177 | * @c must be the unshifted value for CLKTRCTRL - i.e., this function |
178 | * will handle the shift itself. | 178 | * will handle the shift itself. |
179 | */ | 179 | */ |
180 | static void _clktrctrl_write(u8 c, u8 part, s16 inst, u16 cdoffs) | 180 | static void _clktrctrl_write(u8 c, u8 part, u16 inst, u16 cdoffs) |
181 | { | 181 | { |
182 | u32 v; | 182 | u32 v; |
183 | 183 | ||
@@ -196,7 +196,7 @@ static void _clktrctrl_write(u8 c, u8 part, s16 inst, u16 cdoffs) | |||
196 | * Returns true if the clockdomain referred to by (@part, @inst, @cdoffs) | 196 | * Returns true if the clockdomain referred to by (@part, @inst, @cdoffs) |
197 | * is in hardware-supervised idle mode, or 0 otherwise. | 197 | * is in hardware-supervised idle mode, or 0 otherwise. |
198 | */ | 198 | */ |
199 | bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs) | 199 | bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs) |
200 | { | 200 | { |
201 | u32 v; | 201 | u32 v; |
202 | 202 | ||
@@ -216,7 +216,7 @@ bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs) | |||
216 | * Put a clockdomain referred to by (@part, @inst, @cdoffs) into | 216 | * Put a clockdomain referred to by (@part, @inst, @cdoffs) into |
217 | * hardware-supervised idle mode. No return value. | 217 | * hardware-supervised idle mode. No return value. |
218 | */ | 218 | */ |
219 | void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs) | 219 | void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs) |
220 | { | 220 | { |
221 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs); | 221 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs); |
222 | } | 222 | } |
@@ -231,7 +231,7 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs) | |||
231 | * software-supervised idle mode, i.e., controlled manually by the | 231 | * software-supervised idle mode, i.e., controlled manually by the |
232 | * Linux OMAP clockdomain code. No return value. | 232 | * Linux OMAP clockdomain code. No return value. |
233 | */ | 233 | */ |
234 | void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs) | 234 | void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs) |
235 | { | 235 | { |
236 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs); | 236 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs); |
237 | } | 237 | } |
@@ -245,7 +245,7 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs) | |||
245 | * Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle, | 245 | * Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle, |
246 | * waking it up. No return value. | 246 | * waking it up. No return value. |
247 | */ | 247 | */ |
248 | void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs) | 248 | void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs) |
249 | { | 249 | { |
250 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs); | 250 | _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs); |
251 | } | 251 | } |
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index bd7bab889745..7f56ea444bc4 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h | |||
@@ -11,11 +11,11 @@ | |||
11 | #ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H | 11 | #ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H |
12 | #define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H | 12 | #define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H |
13 | 13 | ||
14 | extern bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs); | 14 | bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs); |
15 | extern void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs); | 15 | void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs); |
16 | extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs); | 16 | void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs); |
17 | extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); | 17 | void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs); |
18 | extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); | 18 | void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs); |
19 | extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); | 19 | extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); |
20 | extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, | 20 | extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, |
21 | u16 clkctrl_offs); | 21 | u16 clkctrl_offs); |
@@ -27,14 +27,14 @@ extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, | |||
27 | * In an ideal world, we would not export these low-level functions, | 27 | * In an ideal world, we would not export these low-level functions, |
28 | * but this will probably take some time to fix properly | 28 | * but this will probably take some time to fix properly |
29 | */ | 29 | */ |
30 | extern u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx); | 30 | u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx); |
31 | extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); | 31 | void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx); |
32 | extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, | 32 | u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, |
33 | s16 inst, s16 idx); | 33 | u16 inst, s16 idx); |
34 | extern u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, s16 inst, | 34 | u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, |
35 | s16 idx); | 35 | s16 idx); |
36 | extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, | 36 | u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst, |
37 | s16 idx); | 37 | s16 idx); |
38 | extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, | 38 | extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, |
39 | u32 mask); | 39 | u32 mask); |
40 | 40 | ||