diff options
author | Dave Airlie <airlied@redhat.com> | 2014-07-10 21:24:13 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2014-07-10 21:24:13 -0400 |
commit | bf38b025d3f58f4c1273714ff1be5bfbf99574a4 (patch) | |
tree | 6452a8f28c36305eb2027a6d18fa471e3dac6cbf | |
parent | 2db38e06ecda80063d748df7bd79b7186c8831e0 (diff) | |
parent | 41959341ac7e33dd360c7a881d13566f9eca37b2 (diff) |
Merge branch 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
This new request drops the pageflipping fixes for now. Just a few small
fixes for dpm, DP, and a fix for a hang on boot evergreen.
* 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon/dpm: Reenabling SS on Cayman
drm/radeon: fix typo in ci_stop_dpm()
drm/radeon: fix typo in golden register setup on evergreen
drm/radeon: only print meaningful VM faults
drm/radeon/dp: return -EIO for flags not zero case
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_dp.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ci_dpm.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770_dpm.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 6 |
6 files changed, 18 insertions, 18 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index 35f4182c63b6..b1e11f8434e2 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c | |||
@@ -127,7 +127,7 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan, | |||
127 | /* flags not zero */ | 127 | /* flags not zero */ |
128 | if (args.v1.ucReplyStatus == 2) { | 128 | if (args.v1.ucReplyStatus == 2) { |
129 | DRM_DEBUG_KMS("dp_aux_ch flags not zero\n"); | 129 | DRM_DEBUG_KMS("dp_aux_ch flags not zero\n"); |
130 | r = -EBUSY; | 130 | r = -EIO; |
131 | goto done; | 131 | goto done; |
132 | } | 132 | } |
133 | 133 | ||
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index 10dae4106c08..584090ac3eb9 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c | |||
@@ -1179,7 +1179,7 @@ static int ci_stop_dpm(struct radeon_device *rdev) | |||
1179 | tmp &= ~GLOBAL_PWRMGT_EN; | 1179 | tmp &= ~GLOBAL_PWRMGT_EN; |
1180 | WREG32_SMC(GENERAL_PWRMGT, tmp); | 1180 | WREG32_SMC(GENERAL_PWRMGT, tmp); |
1181 | 1181 | ||
1182 | tmp = RREG32(SCLK_PWRMGT_CNTL); | 1182 | tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); |
1183 | tmp &= ~DYNAMIC_PM_EN; | 1183 | tmp &= ~DYNAMIC_PM_EN; |
1184 | WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); | 1184 | WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); |
1185 | 1185 | ||
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index dcd4518a9b08..0b2471107137 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -7676,14 +7676,16 @@ restart_ih: | |||
7676 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); | 7676 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); |
7677 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); | 7677 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); |
7678 | mc_client = RREG32(VM_CONTEXT1_PROTECTION_FAULT_MCCLIENT); | 7678 | mc_client = RREG32(VM_CONTEXT1_PROTECTION_FAULT_MCCLIENT); |
7679 | /* reset addr and status */ | ||
7680 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
7681 | if (addr == 0x0 && status == 0x0) | ||
7682 | break; | ||
7679 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); | 7683 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); |
7680 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", | 7684 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", |
7681 | addr); | 7685 | addr); |
7682 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", | 7686 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", |
7683 | status); | 7687 | status); |
7684 | cik_vm_decode_fault(rdev, status, addr, mc_client); | 7688 | cik_vm_decode_fault(rdev, status, addr, mc_client); |
7685 | /* reset addr and status */ | ||
7686 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
7687 | break; | 7689 | break; |
7688 | case 167: /* VCE */ | 7690 | case 167: /* VCE */ |
7689 | DRM_DEBUG("IH: VCE int: 0x%08x\n", src_data); | 7691 | DRM_DEBUG("IH: VCE int: 0x%08x\n", src_data); |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index e2f605224e8c..f7ece0ff431b 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -189,7 +189,7 @@ static const u32 evergreen_golden_registers[] = | |||
189 | 0x8c1c, 0xffffffff, 0x00001010, | 189 | 0x8c1c, 0xffffffff, 0x00001010, |
190 | 0x28350, 0xffffffff, 0x00000000, | 190 | 0x28350, 0xffffffff, 0x00000000, |
191 | 0xa008, 0xffffffff, 0x00010000, | 191 | 0xa008, 0xffffffff, 0x00010000, |
192 | 0x5cc, 0xffffffff, 0x00000001, | 192 | 0x5c4, 0xffffffff, 0x00000001, |
193 | 0x9508, 0xffffffff, 0x00000002, | 193 | 0x9508, 0xffffffff, 0x00000002, |
194 | 0x913c, 0x0000000f, 0x0000000a | 194 | 0x913c, 0x0000000f, 0x0000000a |
195 | }; | 195 | }; |
@@ -476,7 +476,7 @@ static const u32 cedar_golden_registers[] = | |||
476 | 0x8c1c, 0xffffffff, 0x00001010, | 476 | 0x8c1c, 0xffffffff, 0x00001010, |
477 | 0x28350, 0xffffffff, 0x00000000, | 477 | 0x28350, 0xffffffff, 0x00000000, |
478 | 0xa008, 0xffffffff, 0x00010000, | 478 | 0xa008, 0xffffffff, 0x00010000, |
479 | 0x5cc, 0xffffffff, 0x00000001, | 479 | 0x5c4, 0xffffffff, 0x00000001, |
480 | 0x9508, 0xffffffff, 0x00000002 | 480 | 0x9508, 0xffffffff, 0x00000002 |
481 | }; | 481 | }; |
482 | 482 | ||
@@ -635,7 +635,7 @@ static const u32 juniper_mgcg_init[] = | |||
635 | static const u32 supersumo_golden_registers[] = | 635 | static const u32 supersumo_golden_registers[] = |
636 | { | 636 | { |
637 | 0x5eb4, 0xffffffff, 0x00000002, | 637 | 0x5eb4, 0xffffffff, 0x00000002, |
638 | 0x5cc, 0xffffffff, 0x00000001, | 638 | 0x5c4, 0xffffffff, 0x00000001, |
639 | 0x7030, 0xffffffff, 0x00000011, | 639 | 0x7030, 0xffffffff, 0x00000011, |
640 | 0x7c30, 0xffffffff, 0x00000011, | 640 | 0x7c30, 0xffffffff, 0x00000011, |
641 | 0x6104, 0x01000300, 0x00000000, | 641 | 0x6104, 0x01000300, 0x00000000, |
@@ -719,7 +719,7 @@ static const u32 sumo_golden_registers[] = | |||
719 | static const u32 wrestler_golden_registers[] = | 719 | static const u32 wrestler_golden_registers[] = |
720 | { | 720 | { |
721 | 0x5eb4, 0xffffffff, 0x00000002, | 721 | 0x5eb4, 0xffffffff, 0x00000002, |
722 | 0x5cc, 0xffffffff, 0x00000001, | 722 | 0x5c4, 0xffffffff, 0x00000001, |
723 | 0x7030, 0xffffffff, 0x00000011, | 723 | 0x7030, 0xffffffff, 0x00000011, |
724 | 0x7c30, 0xffffffff, 0x00000011, | 724 | 0x7c30, 0xffffffff, 0x00000011, |
725 | 0x6104, 0x01000300, 0x00000000, | 725 | 0x6104, 0x01000300, 0x00000000, |
@@ -5066,14 +5066,16 @@ restart_ih: | |||
5066 | case 147: | 5066 | case 147: |
5067 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); | 5067 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); |
5068 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); | 5068 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); |
5069 | /* reset addr and status */ | ||
5070 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
5071 | if (addr == 0x0 && status == 0x0) | ||
5072 | break; | ||
5069 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); | 5073 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); |
5070 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", | 5074 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", |
5071 | addr); | 5075 | addr); |
5072 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", | 5076 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", |
5073 | status); | 5077 | status); |
5074 | cayman_vm_decode_fault(rdev, status, addr); | 5078 | cayman_vm_decode_fault(rdev, status, addr); |
5075 | /* reset addr and status */ | ||
5076 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
5077 | break; | 5079 | break; |
5078 | case 176: /* CP_INT in ring buffer */ | 5080 | case 176: /* CP_INT in ring buffer */ |
5079 | case 177: /* CP_INT in IB1 */ | 5081 | case 177: /* CP_INT in IB1 */ |
diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c index da041a43d82e..3c76e1dcdf04 100644 --- a/drivers/gpu/drm/radeon/rv770_dpm.c +++ b/drivers/gpu/drm/radeon/rv770_dpm.c | |||
@@ -2329,12 +2329,6 @@ void rv770_get_engine_memory_ss(struct radeon_device *rdev) | |||
2329 | pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, | 2329 | pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, |
2330 | ASIC_INTERNAL_MEMORY_SS, 0); | 2330 | ASIC_INTERNAL_MEMORY_SS, 0); |
2331 | 2331 | ||
2332 | /* disable ss, causes hangs on some cayman boards */ | ||
2333 | if (rdev->family == CHIP_CAYMAN) { | ||
2334 | pi->sclk_ss = false; | ||
2335 | pi->mclk_ss = false; | ||
2336 | } | ||
2337 | |||
2338 | if (pi->sclk_ss || pi->mclk_ss) | 2332 | if (pi->sclk_ss || pi->mclk_ss) |
2339 | pi->dynamic_ss = true; | 2333 | pi->dynamic_ss = true; |
2340 | else | 2334 | else |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 730cee2c34cf..eba0225259a4 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -6376,14 +6376,16 @@ restart_ih: | |||
6376 | case 147: | 6376 | case 147: |
6377 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); | 6377 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); |
6378 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); | 6378 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); |
6379 | /* reset addr and status */ | ||
6380 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
6381 | if (addr == 0x0 && status == 0x0) | ||
6382 | break; | ||
6379 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); | 6383 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); |
6380 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", | 6384 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", |
6381 | addr); | 6385 | addr); |
6382 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", | 6386 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", |
6383 | status); | 6387 | status); |
6384 | si_vm_decode_fault(rdev, status, addr); | 6388 | si_vm_decode_fault(rdev, status, addr); |
6385 | /* reset addr and status */ | ||
6386 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
6387 | break; | 6389 | break; |
6388 | case 176: /* RINGID0 CP_INT */ | 6390 | case 176: /* RINGID0 CP_INT */ |
6389 | radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); | 6391 | radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); |