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| author | Arnd Bergmann <arnd@arndb.de> | 2014-07-24 08:06:33 -0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-07-24 08:06:33 -0400 |
| commit | bf1d9879ea7f53f652baea47e5ff071a6ade9708 (patch) | |
| tree | fe3f85461aee22f975336099a0653c6255bcbeb1 | |
| parent | 683809f27ee3201eb36dcb6133cd328a412d7873 (diff) | |
| parent | 33753cd2ba41c72a0756edc5dc094d91602deda5 (diff) | |
Merge tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Two regression fixes for omaps and one fix for device
signaling" from Tony Lindgren:
- L2 cache regression fix for a warning about trying to access
a read-only register
- GPMC ECC software fallback regression fix for omap3
- Fix for dra7 pinctrl pull-up direction that causes signal issues
for anybody trying to use the internal pull up or down
* tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable()
pinctrl: dra: dt-bindings: Fix pull enable/disable
ARM: OMAP2+: l2c: squelch warning dump on power control setting
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm/mach-omap2/gpmc-nand.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 4 | ||||
| -rw-r--r-- | include/dt-bindings/pinctrl/dra.h | 7 |
3 files changed, 18 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 17cd39360afe..93914d220069 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c | |||
| @@ -50,6 +50,16 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) | |||
| 50 | soc_is_omap54xx() || soc_is_dra7xx()) | 50 | soc_is_omap54xx() || soc_is_dra7xx()) |
| 51 | return 1; | 51 | return 1; |
| 52 | 52 | ||
| 53 | if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW || | ||
| 54 | ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) { | ||
| 55 | if (cpu_is_omap24xx()) | ||
| 56 | return 0; | ||
| 57 | else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0)) | ||
| 58 | return 0; | ||
| 59 | else | ||
| 60 | return 1; | ||
| 61 | } | ||
| 62 | |||
| 53 | /* OMAP3xxx do not have ELM engine, so cannot support ECC schemes | 63 | /* OMAP3xxx do not have ELM engine, so cannot support ECC schemes |
| 54 | * which require H/W based ECC error detection */ | 64 | * which require H/W based ECC error detection */ |
| 55 | if ((cpu_is_omap34xx() || cpu_is_omap3630()) && | 65 | if ((cpu_is_omap34xx() || cpu_is_omap3630()) && |
| @@ -57,14 +67,6 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) | |||
| 57 | (ecc_opt == OMAP_ECC_BCH8_CODE_HW))) | 67 | (ecc_opt == OMAP_ECC_BCH8_CODE_HW))) |
| 58 | return 0; | 68 | return 0; |
| 59 | 69 | ||
| 60 | /* | ||
| 61 | * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1 | ||
| 62 | * and AM33xx derivates. Other chips may be added if confirmed to work. | ||
| 63 | */ | ||
| 64 | if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) && | ||
| 65 | (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) | ||
| 66 | return 0; | ||
| 67 | |||
| 68 | /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */ | 70 | /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */ |
| 69 | if (ecc_opt == OMAP_ECC_HAM1_CODE_HW) | 71 | if (ecc_opt == OMAP_ECC_HAM1_CODE_HW) |
| 70 | return 1; | 72 | return 1; |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 539e8106eb96..a0fe747634c1 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
| @@ -168,6 +168,10 @@ static void omap4_l2c310_write_sec(unsigned long val, unsigned reg) | |||
| 168 | smc_op = OMAP4_MON_L2X0_PREFETCH_INDEX; | 168 | smc_op = OMAP4_MON_L2X0_PREFETCH_INDEX; |
| 169 | break; | 169 | break; |
| 170 | 170 | ||
| 171 | case L310_POWER_CTRL: | ||
| 172 | pr_info_once("OMAP L2C310: ROM does not support power control setting\n"); | ||
| 173 | return; | ||
| 174 | |||
| 171 | default: | 175 | default: |
| 172 | WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg); | 176 | WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg); |
| 173 | return; | 177 | return; |
diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h index 002a2855c046..3d33794e4f3e 100644 --- a/include/dt-bindings/pinctrl/dra.h +++ b/include/dt-bindings/pinctrl/dra.h | |||
| @@ -30,7 +30,8 @@ | |||
| 30 | #define MUX_MODE14 0xe | 30 | #define MUX_MODE14 0xe |
| 31 | #define MUX_MODE15 0xf | 31 | #define MUX_MODE15 0xf |
| 32 | 32 | ||
| 33 | #define PULL_ENA (1 << 16) | 33 | #define PULL_ENA (0 << 16) |
| 34 | #define PULL_DIS (1 << 16) | ||
| 34 | #define PULL_UP (1 << 17) | 35 | #define PULL_UP (1 << 17) |
| 35 | #define INPUT_EN (1 << 18) | 36 | #define INPUT_EN (1 << 18) |
| 36 | #define SLEWCONTROL (1 << 19) | 37 | #define SLEWCONTROL (1 << 19) |
| @@ -38,10 +39,10 @@ | |||
| 38 | #define WAKEUP_EVENT (1 << 25) | 39 | #define WAKEUP_EVENT (1 << 25) |
| 39 | 40 | ||
| 40 | /* Active pin states */ | 41 | /* Active pin states */ |
| 41 | #define PIN_OUTPUT 0 | 42 | #define PIN_OUTPUT (0 | PULL_DIS) |
| 42 | #define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) | 43 | #define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) |
| 43 | #define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) | 44 | #define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) |
| 44 | #define PIN_INPUT INPUT_EN | 45 | #define PIN_INPUT (INPUT_EN | PULL_DIS) |
| 45 | #define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) | 46 | #define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) |
| 46 | #define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) | 47 | #define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) |
| 47 | #define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) | 48 | #define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) |
