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authorTony Lindgren <tony@atomide.com>2013-10-23 06:12:45 -0400
committerTony Lindgren <tony@atomide.com>2013-10-23 06:12:45 -0400
commitb4887e16375be312cf64642ac1d826186cb836bf (patch)
treef546243df5e8f4c9a7e90f707dfdce2585aa4478
parentd7c8f25965b6931de93f2b55b00f0f3fca995a21 (diff)
parentb306e7b819edd0515e18f5ca7e0d1cb4b0e4e58a (diff)
Merge tag 'for_3.13_super_late/dts_signed' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into omap-for-v3.13/dt
Add a lot of N900 nodes Add OPP table to OMAP5/DRA7 Add support for Newflow NanoBone board
Diffstat
-rw-r--r--MAINTAINERS6
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/am335x-nano.dts431
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi6
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts4
-rw-r--r--arch/arm/boot/dts/dra7.dtsi8
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts396
-rw-r--r--arch/arm/boot/dts/omap5-uevm.dts34
-rw-r--r--arch/arm/boot/dts/omap5.dtsi9
-rw-r--r--arch/arm/boot/dts/twl4030.dtsi49
10 files changed, 912 insertions, 32 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a0cbf3cf2c8..ba09af9391a0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6088,6 +6088,12 @@ L: linux-omap@vger.kernel.org
6088S: Maintained 6088S: Maintained
6089F: drivers/gpio/gpio-omap.c 6089F: drivers/gpio/gpio-omap.c
6090 6090
6091OMAP/NEWFLOW NANOBONE MACHINE SUPPORT
6092M: Mark Jackson <mpfj@newflow.co.uk>
6093L: linux-omap@vger.kernel.org
6094S: Maintained
6095F: arch/arm/boot/dts/am335x-nano.dts
6096
6091OMFS FILESYSTEM 6097OMFS FILESYSTEM
6092M: Bob Copeland <me@bobcopeland.com> 6098M: Bob Copeland <me@bobcopeland.com>
6093L: linux-karma-devel@lists.sourceforge.net 6099L: linux-karma-devel@lists.sourceforge.net
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9df7d2c15e7d..37c6ec974134 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
188 am335x-evmsk.dtb \ 188 am335x-evmsk.dtb \
189 am335x-bone.dtb \ 189 am335x-bone.dtb \
190 am335x-boneblack.dtb \ 190 am335x-boneblack.dtb \
191 am335x-nano.dtb \
191 am335x-base0033.dtb \ 192 am335x-base0033.dtb \
192 am3517-evm.dtb \ 193 am3517-evm.dtb \
193 am3517_mt_ventoux.dtb \ 194 am3517_mt_ventoux.dtb \
diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts
new file mode 100644
index 000000000000..9907b494b99c
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-nano.dts
@@ -0,0 +1,431 @@
1/*
2 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "am33xx.dtsi"
11
12/ {
13 model = "Newflow AM335x NanoBone";
14 compatible = "ti,am33xx";
15
16 cpus {
17 cpu@0 {
18 cpu0-supply = <&dcdc2_reg>;
19 };
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 };
26
27 leds {
28 compatible = "gpio-leds";
29
30 led@0 {
31 label = "nanobone:green:usr1";
32 gpios = <&gpio1 5 0>;
33 default-state = "off";
34 };
35 };
36};
37
38&am33xx_pinmux {
39 pinctrl-names = "default";
40 pinctrl-0 = <&misc_pins>;
41
42 misc_pins: misc_pins {
43 pinctrl-single,pins = <
44 0x15c (PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */
45 >;
46 };
47
48 gpmc_pins: gpmc_pins {
49 pinctrl-single,pins = <
50 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
51 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
52 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
53 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
54 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
55 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
56 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
57 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
58 0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
59 0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
60 0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
61 0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
62 0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
63 0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
64 0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
65 0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
66
67 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
68 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
69 0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */
70 0x84 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */
71 0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */
72
73 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
74 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
75 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
76 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */
77
78 0xa4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */
79 0xa8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */
80 0xac (PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */
81 0xb0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */
82 0xb4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */
83 0xb8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */
84 0xbc (PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */
85
86 0xe0 (PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */
87 0xe4 (PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */
88 0xe8 (PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */
89 >;
90 };
91
92 i2c0_pins: i2c0_pins {
93 pinctrl-single,pins = <
94 0x188 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */
95 0x18c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */
96 >;
97 };
98
99 uart0_pins: uart0_pins {
100 pinctrl-single,pins = <
101 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
102 0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */
103 >;
104 };
105
106 uart1_pins: uart1_pins {
107 pinctrl-single,pins = <
108 0x178 (PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
109 0x17c (PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
110 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
111 0x184 (PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
112 >;
113 };
114
115 uart2_pins: uart2_pins {
116 pinctrl-single,pins = <
117 0xc0 (PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */
118 0xc4 (PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */
119 0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
120 0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
121 >;
122 };
123
124 uart3_pins: uart3_pins {
125 pinctrl-single,pins = <
126 0xc8 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */
127 0xcc (PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */
128 0x160 (PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */
129 0x164 (PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
130 >;
131 };
132
133 uart4_pins: uart4_pins {
134 pinctrl-single,pins = <
135 0xd0 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */
136 0xd4 (PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */
137 0x168 (PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */
138 0x16c (PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */
139 >;
140 };
141
142 uart5_pins: uart5_pins {
143 pinctrl-single,pins = <
144 0xd8 (PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */
145 0x144 (PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */
146 >;
147 };
148
149 mmc1_pins: mmc1_pins {
150 pinctrl-single,pins = <
151 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
152 0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
153 0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
154 0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
155 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
156 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
157 0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
158 0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */
159 >;
160 };
161};
162
163&uart0 {
164 pinctrl-names = "default";
165 pinctrl-0 = <&uart0_pins>;
166 status = "okay";
167};
168
169&uart1 {
170 pinctrl-names = "default";
171 pinctrl-0 = <&uart1_pins>;
172 status = "okay";
173 rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
174 rs485-rts-active-high;
175 rs485-rx-during-tx;
176 rs485-rts-delay = <1 1>;
177 linux,rs485-enabled-at-boot-time;
178};
179
180&uart2 {
181 pinctrl-names = "default";
182 pinctrl-0 = <&uart2_pins>;
183 status = "okay";
184 rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
185 rs485-rts-active-high;
186 rs485-rts-delay = <1 1>;
187 linux,rs485-enabled-at-boot-time;
188};
189
190&uart3 {
191 pinctrl-names = "default";
192 pinctrl-0 = <&uart3_pins>;
193 status = "okay";
194};
195
196&uart4 {
197 pinctrl-names = "default";
198 pinctrl-0 = <&uart4_pins>;
199 status = "okay";
200};
201
202&uart5 {
203 pinctrl-names = "default";
204 pinctrl-0 = <&uart5_pins>;
205 status = "okay";
206};
207
208&i2c0 {
209 status = "okay";
210 pinctrl-names = "default";
211 clock-frequency = <400000>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&i2c0_pins>;
214
215 gpio@20 {
216 compatible = "mcp,mcp23017";
217 reg = <0x20>;
218 };
219
220 tps: tps@24 {
221 reg = <0x24>;
222 };
223
224 eeprom@53 {
225 compatible = "mcp,24c02";
226 reg = <0x53>;
227 pagesize = <8>;
228 };
229
230 rtc@68 {
231 compatible = "dallas,ds1307";
232 reg = <0x68>;
233 };
234};
235
236&elm {
237 status = "okay";
238};
239
240&gpmc {
241 compatible = "ti,am3352-gpmc";
242 ti,hwmods = "gpmc";
243 status = "okay";
244 gpmc,num-waitpins = <2>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&gpmc_pins>;
247
248 #address-cells = <2>;
249 #size-cells = <1>;
250 ranges = <0 0 0x08000000 0x08000000>; /* CS0: NOR 128M */
251
252 nor@0,0 {
253 reg = <0 0x00000000 0x08000000>;
254 compatible = "cfi-flash";
255 linux,mtd-name = "spansion,s29gl010p11t";
256 bank-width = <2>;
257
258 gpmc,mux-add-data = <2>;
259
260 gpmc,sync-clk-ps = <0>;
261 gpmc,cs-on-ns = <0>;
262 gpmc,cs-rd-off-ns = <160>;
263 gpmc,cs-wr-off-ns = <160>;
264 gpmc,adv-on-ns = <10>;
265 gpmc,adv-rd-off-ns = <30>;
266 gpmc,adv-wr-off-ns = <30>;
267 gpmc,oe-on-ns = <40>;
268 gpmc,oe-off-ns = <160>;
269 gpmc,we-on-ns = <40>;
270 gpmc,we-off-ns = <160>;
271 gpmc,rd-cycle-ns = <160>;
272 gpmc,wr-cycle-ns = <160>;
273 gpmc,access-ns = <150>;
274 gpmc,page-burst-access-ns = <10>;
275 gpmc,cycle2cycle-samecsen;
276 gpmc,cycle2cycle-delay-ns = <20>;
277 gpmc,wr-data-mux-bus-ns = <70>;
278 gpmc,wr-access-ns = <80>;
279
280 #address-cells = <1>;
281 #size-cells = <1>;
282
283 /*
284 MTD partition table
285 ===================
286 +------------+-->0x00000000-> U-Boot start
287 | |
288 | |-->0x000BFFFF-> U-Boot end
289 | |-->0x000C0000-> ENV1 start
290 | |
291 | |-->0x000DFFFF-> ENV1 end
292 | |-->0x000E0000-> ENV2 start
293 | |
294 | |-->0x000FFFFF-> ENV2 end
295 | |-->0x00100000-> Kernel start
296 | |
297 | |-->0x004FFFFF-> Kernel end
298 | |-->0x00500000-> File system start
299 | |
300 | |-->0x014FFFFF-> File system end
301 | |-->0x01500000-> User data start
302 | |
303 | |-->0x03FFFFFF-> User data end
304 | |-->0x04000000-> Data storage start
305 | |
306 +------------+-->0x08000000-> NOR end (Free end)
307 */
308 partition@0 {
309 label = "boot";
310 reg = <0x00000000 0x000c0000>; /* 768KB */
311 };
312
313 partition@1 {
314 label = "env1";
315 reg = <0x000c0000 0x00020000>; /* 128KB */
316 };
317
318 partition@2 {
319 label = "env2";
320 reg = <0x000e0000 0x00020000>; /* 128KB */
321 };
322
323 partition@3 {
324 label = "kernel";
325 reg = <0x00100000 0x00400000>; /* 4MB */
326 };
327
328 partition@4 {
329 label = "rootfs";
330 reg = <0x00500000 0x01000000>; /* 16MB */
331 };
332
333 partition@5 {
334 label = "user";
335 reg = <0x01500000 0x02b00000>; /* 43MB */
336 };
337
338 partition@6 {
339 label = "data";
340 reg = <0x04000000 0x04000000>; /* 64MB */
341 };
342 };
343};
344
345&mac {
346 dual_emac = <1>;
347};
348
349&cpsw_emac0 {
350 phy_id = <&davinci_mdio>, <0>;
351 dual_emac_res_vlan = <1>;
352};
353
354&cpsw_emac1 {
355 phy_id = <&davinci_mdio>, <1>;
356 dual_emac_res_vlan = <2>;
357};
358
359&mmc1 {
360 status = "okay";
361 vmmc-supply = <&ldo4_reg>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&mmc1_pins>;
364 bus-width = <4>;
365 cd-gpios = <&gpio3 8 0>;
366 wp-gpios = <&gpio3 18 0>;
367};
368
369#include "tps65217.dtsi"
370
371&tps {
372 regulators {
373 dcdc1_reg: regulator@0 {
374 /* +1.5V voltage with ±4% tolerance */
375 regulator-min-microvolt = <1450000>;
376 regulator-max-microvolt = <1550000>;
377 regulator-boot-on;
378 regulator-always-on;
379 };
380
381 dcdc2_reg: regulator@1 {
382 /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
383 regulator-name = "vdd_mpu";
384 regulator-min-microvolt = <915000>;
385 regulator-max-microvolt = <1140000>;
386 regulator-boot-on;
387 regulator-always-on;
388 };
389
390 dcdc3_reg: regulator@2 {
391 /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
392 regulator-name = "vdd_core";
393 regulator-min-microvolt = <915000>;
394 regulator-max-microvolt = <1140000>;
395 regulator-boot-on;
396 regulator-always-on;
397 };
398
399 ldo1_reg: regulator@3 {
400 /* +1.8V voltage with ±4% tolerance */
401 regulator-min-microvolt = <1750000>;
402 regulator-max-microvolt = <1870000>;
403 regulator-boot-on;
404 regulator-always-on;
405 };
406
407 ldo2_reg: regulator@4 {
408 /* +3.3V voltage with ±4% tolerance */
409 regulator-min-microvolt = <3175000>;
410 regulator-max-microvolt = <3430000>;
411 regulator-boot-on;
412 regulator-always-on;
413 };
414
415 ldo3_reg: regulator@5 {
416 /* +1.8V voltage with ±4% tolerance */
417 regulator-min-microvolt = <1750000>;
418 regulator-max-microvolt = <1870000>;
419 regulator-boot-on;
420 regulator-always-on;
421 };
422
423 ldo4_reg: regulator@6 {
424 /* +3.3V voltage with ±4% tolerance */
425 regulator-min-microvolt = <3175000>;
426 regulator-max-microvolt = <3430000>;
427 regulator-boot-on;
428 regulator-always-on;
429 };
430 };
431};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 97f501951564..0ca13ad92fa6 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -416,7 +416,7 @@
416 ti,hwmods = "usb_otg_hs"; 416 ti,hwmods = "usb_otg_hs";
417 status = "disabled"; 417 status = "disabled";
418 418
419 ctrl_mod: control@44e10000 { 419 usb_ctrl_mod: control@44e10000 {
420 compatible = "ti,am335x-usb-ctrl-module"; 420 compatible = "ti,am335x-usb-ctrl-module";
421 reg = <0x44e10620 0x10 421 reg = <0x44e10620 0x10
422 0x44e10648 0x4>; 422 0x44e10648 0x4>;
@@ -429,7 +429,7 @@
429 reg = <0x47401300 0x100>; 429 reg = <0x47401300 0x100>;
430 reg-names = "phy"; 430 reg-names = "phy";
431 status = "disabled"; 431 status = "disabled";
432 ti,ctrl_mod = <&ctrl_mod>; 432 ti,ctrl_mod = <&usb_ctrl_mod>;
433 }; 433 };
434 434
435 usb0: usb@47401000 { 435 usb0: usb@47401000 {
@@ -477,7 +477,7 @@
477 reg = <0x47401b00 0x100>; 477 reg = <0x47401b00 0x100>;
478 reg-names = "phy"; 478 reg-names = "phy";
479 status = "disabled"; 479 status = "disabled";
480 ti,ctrl_mod = <&ctrl_mod>; 480 ti,ctrl_mod = <&usb_ctrl_mod>;
481 }; 481 };
482 482
483 usb1: usb@47401800 { 483 usb1: usb@47401800 {
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 3abf5f41e5cc..5babba0a3a75 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -269,3 +269,7 @@
269 vmmc-supply = <&mmc2_3v3>; 269 vmmc-supply = <&mmc2_3v3>;
270 bus-width = <8>; 270 bus-width = <8>;
271}; 271};
272
273&cpu0 {
274 cpu0-supply = <&smps123_reg>;
275};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 98ff6553edbc..d0df4c4e8b0a 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -37,10 +37,16 @@
37 #address-cells = <1>; 37 #address-cells = <1>;
38 #size-cells = <0>; 38 #size-cells = <0>;
39 39
40 cpu@0 { 40 cpu0: cpu@0 {
41 device_type = "cpu"; 41 device_type = "cpu";
42 compatible = "arm,cortex-a15"; 42 compatible = "arm,cortex-a15";
43 reg = <0>; 43 reg = <0>;
44
45 operating-points = <
46 /* kHz uV */
47 1000000 1060000
48 1176000 1160000
49 >;
44 }; 50 };
45 cpu@1 { 51 cpu@1 {
46 device_type = "cpu"; 52 device_type = "cpu";
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index e13b697f8bce..c4f20bfe4cce 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -26,9 +26,116 @@
26 reg = <0x80000000 0x10000000>; /* 256 MB */ 26 reg = <0x80000000 0x10000000>; /* 256 MB */
27 }; 27 };
28 28
29 gpio_keys {
30 compatible = "gpio-keys";
31
32 camera_lens_cover {
33 label = "Camera Lens Cover";
34 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
35 linux,input-type = <5>; /* EV_SW */
36 linux,code = <0x09>; /* SW_CAMERA_LENS_COVER */
37 gpio-key,wakeup;
38 };
39
40 camera_focus {
41 label = "Camera Focus";
42 gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
43 linux,code = <0x210>; /* KEY_CAMERA_FOCUS */
44 gpio-key,wakeup;
45 };
46
47 camera_capture {
48 label = "Camera Capture";
49 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
50 linux,code = <0xd4>; /* KEY_CAMERA */
51 gpio-key,wakeup;
52 };
53
54 lock_button {
55 label = "Lock Button";
56 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
57 linux,code = <0x98>; /* KEY_SCREENLOCK */
58 gpio-key,wakeup;
59 };
60
61 keypad_slide {
62 label = "Keypad Slide";
63 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
64 linux,input-type = <5>; /* EV_SW */
65 linux,code = <0x0a>; /* SW_KEYPAD_SLIDE */
66 gpio-key,wakeup;
67 };
68
69 proximity_sensor {
70 label = "Proximity Sensor";
71 gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
72 linux,input-type = <5>; /* EV_SW */
73 linux,code = <0x0b>; /* SW_FRONT_PROXIMITY */
74 };
75 };
76
77};
78
79&omap3_pmx_core {
80 pinctrl-names = "default";
81
82 uart2_pins: pinmux_uart2_pins {
83 pinctrl-single,pins = <
84 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx */
85 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
86 >;
87 };
88
89 uart3_pins: pinmux_uart3_pins {
90 pinctrl-single,pins = <
91 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx */
92 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
93 >;
94 };
95
96 i2c1_pins: pinmux_i2c1_pins {
97 pinctrl-single,pins = <
98 0x18a (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
99 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
100 >;
101 };
102
103 i2c2_pins: pinmux_i2c2_pins {
104 pinctrl-single,pins = <
105 0x18e (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
106 0x190 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
107 >;
108 };
109
110 i2c3_pins: pinmux_i2c3_pins {
111 pinctrl-single,pins = <
112 0x192 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
113 0x194 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
114 >;
115 };
116
117 mmc1_pins: pinmux_mmc1_pins {
118 pinctrl-single,pins = <
119 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
120 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
121 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
122 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
123 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
124 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
125 >;
126 };
127
128 display_pins: pinmux_display_pins {
129 pinctrl-single,pins = <
130 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
131 >;
132 };
29}; 133};
30 134
31&i2c1 { 135&i2c1 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&i2c1_pins>;
138
32 clock-frequency = <2200000>; 139 clock-frequency = <2200000>;
33 140
34 twl: twl@48 { 141 twl: twl@48 {
@@ -39,6 +146,98 @@
39}; 146};
40 147
41#include "twl4030.dtsi" 148#include "twl4030.dtsi"
149#include "twl4030_omap3.dtsi"
150
151&vaux1 {
152 regulator-name = "V28";
153 regulator-min-microvolt = <2800000>;
154 regulator-max-microvolt = <2800000>;
155 regulator-always-on; /* due battery cover sensor */
156};
157
158&vaux2 {
159 regulator-name = "VCSI";
160 regulator-min-microvolt = <1800000>;
161 regulator-max-microvolt = <1800000>;
162};
163
164&vaux3 {
165 regulator-name = "VMMC2_30";
166 regulator-min-microvolt = <2800000>;
167 regulator-max-microvolt = <3000000>;
168};
169
170&vaux4 {
171 regulator-name = "VCAM_ANA_28";
172 regulator-min-microvolt = <2800000>;
173 regulator-max-microvolt = <2800000>;
174};
175
176&vmmc1 {
177 regulator-name = "VMMC1";
178 regulator-min-microvolt = <1850000>;
179 regulator-max-microvolt = <3150000>;
180};
181
182&vmmc2 {
183 regulator-name = "V28_A";
184 regulator-min-microvolt = <2800000>;
185 regulator-max-microvolt = <3000000>;
186 regulator-always-on; /* due VIO leak to AIC34 VDDs */
187};
188
189&vpll1 {
190 regulator-name = "VPLL";
191 regulator-min-microvolt = <1800000>;
192 regulator-max-microvolt = <1800000>;
193 regulator-always-on;
194};
195
196&vpll2 {
197 regulator-name = "VSDI_CSI";
198 regulator-min-microvolt = <1800000>;
199 regulator-max-microvolt = <1800000>;
200 regulator-always-on;
201};
202
203&vsim {
204 regulator-name = "VMMC2_IO_18";
205 regulator-min-microvolt = <1800000>;
206 regulator-max-microvolt = <1800000>;
207};
208
209&vio {
210 regulator-name = "VIO";
211 regulator-min-microvolt = <1800000>;
212 regulator-max-microvolt = <1800000>;
213
214};
215
216&vintana1 {
217 regulator-name = "VINTANA1";
218 /* fixed to 1500000 */
219 regulator-always-on;
220};
221
222&vintana2 {
223 regulator-name = "VINTANA2";
224 regulator-min-microvolt = <2750000>;
225 regulator-max-microvolt = <2750000>;
226 regulator-always-on;
227};
228
229&vintdig {
230 regulator-name = "VINTDIG";
231 /* fixed to 1500000 */
232 regulator-always-on;
233};
234
235&twl {
236 twl_audio: audio {
237 compatible = "ti,twl4030-audio";
238 ti,enable-vibra = <1>;
239 };
240};
42 241
43&twl_gpio { 242&twl_gpio {
44 ti,pullups = <0x0>; 243 ti,pullups = <0x0>;
@@ -46,15 +245,117 @@
46}; 245};
47 246
48&i2c2 { 247&i2c2 {
49 clock-frequency = <400000>; 248 pinctrl-names = "default";
249 pinctrl-0 = <&i2c2_pins>;
250
251 clock-frequency = <100000>;
252
253 tlv320aic3x: tlv320aic3x@18 {
254 compatible = "ti,tlv320aic3x";
255 reg = <0x18>;
256 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
257 ai3x-gpio-func = <
258 0 /* AIC3X_GPIO1_FUNC_DISABLED */
259 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
260 >;
261
262 AVDD-supply = <&vmmc2>;
263 DRVDD-supply = <&vmmc2>;
264 IOVDD-supply = <&vio>;
265 DVDD-supply = <&vio>;
266 };
267
268 tlv320aic3x_aux: tlv320aic3x@19 {
269 compatible = "ti,tlv320aic3x";
270 reg = <0x19>;
271 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
272
273 AVDD-supply = <&vmmc2>;
274 DRVDD-supply = <&vmmc2>;
275 IOVDD-supply = <&vio>;
276 DVDD-supply = <&vio>;
277 };
278
279 lp5523: lp5523@32 {
280 compatible = "national,lp5523";
281 reg = <0x32>;
282 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
283 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
284
285 chan0 {
286 chan-name = "lp5523:kb1";
287 led-cur = /bits/ 8 <50>;
288 max-cur = /bits/ 8 <100>;
289 };
290
291 chan1 {
292 chan-name = "lp5523:kb2";
293 led-cur = /bits/ 8 <50>;
294 max-cur = /bits/ 8 <100>;
295 };
296
297 chan2 {
298 chan-name = "lp5523:kb3";
299 led-cur = /bits/ 8 <50>;
300 max-cur = /bits/ 8 <100>;
301 };
302
303 chan3 {
304 chan-name = "lp5523:kb4";
305 led-cur = /bits/ 8 <50>;
306 max-cur = /bits/ 8 <100>;
307 };
308
309 chan4 {
310 chan-name = "lp5523:b";
311 led-cur = /bits/ 8 <50>;
312 max-cur = /bits/ 8 <100>;
313 };
314
315 chan5 {
316 chan-name = "lp5523:g";
317 led-cur = /bits/ 8 <50>;
318 max-cur = /bits/ 8 <100>;
319 };
320
321 chan6 {
322 chan-name = "lp5523:r";
323 led-cur = /bits/ 8 <50>;
324 max-cur = /bits/ 8 <100>;
325 };
326
327 chan7 {
328 chan-name = "lp5523:kb5";
329 led-cur = /bits/ 8 <50>;
330 max-cur = /bits/ 8 <100>;
331 };
332
333 chan8 {
334 chan-name = "lp5523:kb6";
335 led-cur = /bits/ 8 <50>;
336 max-cur = /bits/ 8 <100>;
337 };
338 };
339
340 bq27200: bq27200@55 {
341 compatible = "ti,bq27200";
342 reg = <0x55>;
343 };
50}; 344};
51 345
52&i2c3 { 346&i2c3 {
53 clock-frequency = <100000>; 347 pinctrl-names = "default";
348 pinctrl-0 = <&i2c3_pins>;
349
350 clock-frequency = <400000>;
54}; 351};
55 352
56&mmc1 { 353&mmc1 {
57 status = "disabled"; 354 pinctrl-names = "default";
355 pinctrl-0 = <&mmc1_pins>;
356 vmmc-supply = <&vmmc1>;
357 bus-width = <4>;
358 cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
58}; 359};
59 360
60&mmc2 { 361&mmc2 {
@@ -65,6 +366,78 @@
65 status = "disabled"; 366 status = "disabled";
66}; 367};
67 368
369&gpmc {
370 ranges = <0 0 0x04000000 0x10000000>; /* 256MB */
371
372 /* gpio-irq for dma: 65 */
373
374 onenand@0,0 {
375 #address-cells = <1>;
376 #size-cells = <1>;
377 reg = <0 0 0x10000000>;
378
379 gpmc,sync-read;
380 gpmc,sync-write;
381 gpmc,burst-length = <16>;
382 gpmc,burst-read;
383 gpmc,burst-wrap;
384 gpmc,burst-write;
385 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
386 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
387 gpmc,cs-on-ns = <0>;
388 gpmc,cs-rd-off-ns = <87>;
389 gpmc,cs-wr-off-ns = <87>;
390 gpmc,adv-on-ns = <0>;
391 gpmc,adv-rd-off-ns = <10>;
392 gpmc,adv-wr-off-ns = <10>;
393 gpmc,oe-on-ns = <15>;
394 gpmc,oe-off-ns = <87>;
395 gpmc,we-on-ns = <0>;
396 gpmc,we-off-ns = <87>;
397 gpmc,rd-cycle-ns = <112>;
398 gpmc,wr-cycle-ns = <112>;
399 gpmc,access-ns = <81>;
400 gpmc,page-burst-access-ns = <15>;
401 gpmc,bus-turnaround-ns = <0>;
402 gpmc,cycle2cycle-delay-ns = <0>;
403 gpmc,wait-monitoring-ns = <0>;
404 gpmc,clk-activation-ns = <5>;
405 gpmc,wr-data-mux-bus-ns = <30>;
406 gpmc,wr-access-ns = <81>;
407 gpmc,sync-clk-ps = <15000>;
408
409 /*
410 * MTD partition table corresponding to Nokia's
411 * Maemo 5 (Fremantle) release.
412 */
413 partition@0 {
414 label = "bootloader";
415 reg = <0x00000000 0x00020000>;
416 read-only;
417 };
418 partition@1 {
419 label = "config";
420 reg = <0x00020000 0x00060000>;
421 };
422 partition@2 {
423 label = "log";
424 reg = <0x00080000 0x00040000>;
425 };
426 partition@3 {
427 label = "kernel";
428 reg = <0x000c0000 0x00200000>;
429 };
430 partition@4 {
431 label = "initfs";
432 reg = <0x002c0000 0x00200000>;
433 };
434 partition@5 {
435 label = "rootfs";
436 reg = <0x004c0000 0x0fb40000>;
437 };
438 };
439};
440
68&mcspi1 { 441&mcspi1 {
69 /* 442 /*
70 * For some reason, touchscreen is necessary for screen to work at 443 * For some reason, touchscreen is necessary for screen to work at
@@ -81,6 +454,9 @@
81 compatible = "acx565akm"; 454 compatible = "acx565akm";
82 spi-max-frequency = <6000000>; 455 spi-max-frequency = <6000000>;
83 reg = <2>; 456 reg = <2>;
457
458 pinctrl-names = "default";
459 pinctrl-0 = <&display_pins>;
84 }; 460 };
85}; 461};
86 462
@@ -92,3 +468,17 @@
92 mode = <2>; 468 mode = <2>;
93 power = <50>; 469 power = <50>;
94}; 470};
471
472&uart1 {
473 status = "disabled";
474};
475
476&uart2 {
477 pinctrl-names = "default";
478 pinctrl-0 = <&uart2_pins>;
479};
480
481&uart3 {
482 pinctrl-names = "default";
483 pinctrl-0 = <&uart3_pins>;
484};
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index e06a04a63664..002fa70180a5 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -62,7 +62,6 @@
62 pinctrl-0 = < 62 pinctrl-0 = <
63 &twl6040_pins 63 &twl6040_pins
64 &mcpdm_pins 64 &mcpdm_pins
65 &dmic_pins
66 &mcbsp1_pins 65 &mcbsp1_pins
67 &mcbsp2_pins 66 &mcbsp2_pins
68 &usbhost_pins 67 &usbhost_pins
@@ -71,7 +70,7 @@
71 70
72 twl6040_pins: pinmux_twl6040_pins { 71 twl6040_pins: pinmux_twl6040_pins {
73 pinctrl-single,pins = < 72 pinctrl-single,pins = <
74 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */ 73 0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
75 >; 74 >;
76 }; 75 };
77 76
@@ -85,15 +84,6 @@
85 >; 84 >;
86 }; 85 };
87 86
88 dmic_pins: pinmux_dmic_pins {
89 pinctrl-single,pins = <
90 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */
91 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */
92 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */
93 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */
94 >;
95 };
96
97 mcbsp1_pins: pinmux_mcbsp1_pins { 87 mcbsp1_pins: pinmux_mcbsp1_pins {
98 pinctrl-single,pins = < 88 pinctrl-single,pins = <
99 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */ 89 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
@@ -131,25 +121,25 @@
131 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */ 121 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
132 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */ 122 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
133 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */ 123 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
134 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */ 124 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
135 >; 125 >;
136 }; 126 };
137 127
138 mcspi3_pins: pinmux_mcspi3_pins { 128 mcspi3_pins: pinmux_mcspi3_pins {
139 pinctrl-single,pins = < 129 pinctrl-single,pins = <
140 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ 130 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
141 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ 131 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
142 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ 132 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
143 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ 133 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
144 >; 134 >;
145 }; 135 };
146 136
147 mcspi4_pins: pinmux_mcspi4_pins { 137 mcspi4_pins: pinmux_mcspi4_pins {
148 pinctrl-single,pins = < 138 pinctrl-single,pins = <
149 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ 139 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */
150 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ 140 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */
151 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ 141 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */
152 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ 142 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */
153 >; 143 >;
154 }; 144 };
155 145
@@ -501,3 +491,7 @@
501 pinctrl-names = "default"; 491 pinctrl-names = "default";
502 pinctrl-0 = <&uart5_pins>; 492 pinctrl-0 = <&uart5_pins>;
503}; 493};
494
495&cpu0 {
496 cpu0-supply = <&smps123_reg>;
497};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 2cb72ba1dd05..154d92fae1d5 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -38,10 +38,17 @@
38 #address-cells = <1>; 38 #address-cells = <1>;
39 #size-cells = <0>; 39 #size-cells = <0>;
40 40
41 cpu@0 { 41 cpu0: cpu@0 {
42 device_type = "cpu"; 42 device_type = "cpu";
43 compatible = "arm,cortex-a15"; 43 compatible = "arm,cortex-a15";
44 reg = <0x0>; 44 reg = <0x0>;
45
46 operating-points = <
47 /* kHz uV */
48 500000 880000
49 1000000 1060000
50 1500000 1250000
51 >;
45 }; 52 };
46 cpu@1 { 53 cpu@1 {
47 device_type = "cpu"; 54 device_type = "cpu";
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index ae6a17aed9ee..af7fa40fd216 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -23,6 +23,22 @@
23 compatible = "ti,twl4030-wdt"; 23 compatible = "ti,twl4030-wdt";
24 }; 24 };
25 25
26 vaux1: regulator-vaux1 {
27 compatible = "ti,twl4030-vaux1";
28 };
29
30 vaux2: regulator-vaux2 {
31 compatible = "ti,twl4030-vaux2";
32 };
33
34 vaux3: regulator-vaux3 {
35 compatible = "ti,twl4030-vaux3";
36 };
37
38 vaux4: regulator-vaux4 {
39 compatible = "ti,twl4030-vaux4";
40 };
41
26 vcc: regulator-vdd1 { 42 vcc: regulator-vdd1 {
27 compatible = "ti,twl4030-vdd1"; 43 compatible = "ti,twl4030-vdd1";
28 regulator-min-microvolt = <600000>; 44 regulator-min-microvolt = <600000>;
@@ -35,10 +51,20 @@
35 regulator-max-microvolt = <1800000>; 51 regulator-max-microvolt = <1800000>;
36 }; 52 };
37 53
38 vpll2: regulator-vpll2 { 54 vio: regulator-vio {
39 compatible = "ti,twl4030-vpll2"; 55 compatible = "ti,twl4030-vio";
40 regulator-min-microvolt = <1800000>; 56 };
41 regulator-max-microvolt = <1800000>; 57
58 vintana1: regulator-vintana1 {
59 compatible = "ti,twl4030-vintana1";
60 };
61
62 vintana2: regulator-vintana2 {
63 compatible = "ti,twl4030-vintana2";
64 };
65
66 vintdig: regulator-vintdig {
67 compatible = "ti,twl4030-vintdig";
42 }; 68 };
43 69
44 vmmc1: regulator-vmmc1 { 70 vmmc1: regulator-vmmc1 {
@@ -65,6 +91,16 @@
65 compatible = "ti,twl4030-vusb3v1"; 91 compatible = "ti,twl4030-vusb3v1";
66 }; 92 };
67 93
94 vpll1: regulator-vpll1 {
95 compatible = "ti,twl4030-vpll1";
96 };
97
98 vpll2: regulator-vpll2 {
99 compatible = "ti,twl4030-vpll2";
100 regulator-min-microvolt = <1800000>;
101 regulator-max-microvolt = <1800000>;
102 };
103
68 vsim: regulator-vsim { 104 vsim: regulator-vsim {
69 compatible = "ti,twl4030-vsim"; 105 compatible = "ti,twl4030-vsim";
70 regulator-min-microvolt = <1800000>; 106 regulator-min-microvolt = <1800000>;
@@ -97,4 +133,9 @@
97 compatible = "ti,twl4030-pwmled"; 133 compatible = "ti,twl4030-pwmled";
98 #pwm-cells = <2>; 134 #pwm-cells = <2>;
99 }; 135 };
136
137 twl_pwrbutton: pwrbutton {
138 compatible = "ti,twl4030-pwrbutton";
139 interrupts = <8>;
140 };
100}; 141};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-22 05:13:47 -0400