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authorTony Lindgren <tony@atomide.com>2013-10-17 18:15:22 -0400
committerTony Lindgren <tony@atomide.com>2013-10-22 08:34:49 -0400
commitd7c8f25965b6931de93f2b55b00f0f3fca995a21 (patch)
treefaa358fe03ddb9f4185815714808a6203b9bc3ec
parentfbc364773febd9eaf4e3b01c1178d81d8060907e (diff)
ARM: dts: Add missing reg, interrupt and dma entries for omap3
Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/boot/dts/omap3.dtsi49
-rw-r--r--arch/arm/boot/dts/omap36xx.dtsi4
2 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 493b6d4373d1..27e0eb9a3cc7 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -40,6 +40,7 @@
40 40
41 pmu { 41 pmu {
42 compatible = "arm,cortex-a8-pmu"; 42 compatible = "arm,cortex-a8-pmu";
43 reg = <0x54000000 0x800000>;
43 interrupts = <3>; 44 interrupts = <3>;
44 ti,hwmods = "debugss"; 45 ti,hwmods = "debugss";
45 }; 46 };
@@ -74,6 +75,8 @@
74 */ 75 */
75 ocp { 76 ocp {
76 compatible = "simple-bus"; 77 compatible = "simple-bus";
78 reg = <0x68000000 0x10000>;
79 interrupts = <9 10>;
77 #address-cells = <1>; 80 #address-cells = <1>;
78 #size-cells = <1>; 81 #size-cells = <1>;
79 ranges; 82 ranges;
@@ -192,24 +195,40 @@
192 195
193 uart1: serial@4806a000 { 196 uart1: serial@4806a000 {
194 compatible = "ti,omap3-uart"; 197 compatible = "ti,omap3-uart";
198 reg = <0x4806a000 0x2000>;
199 interrupts = <72>;
200 dmas = <&sdma 49 &sdma 50>;
201 dma-names = "tx", "rx";
195 ti,hwmods = "uart1"; 202 ti,hwmods = "uart1";
196 clock-frequency = <48000000>; 203 clock-frequency = <48000000>;
197 }; 204 };
198 205
199 uart2: serial@4806c000 { 206 uart2: serial@4806c000 {
200 compatible = "ti,omap3-uart"; 207 compatible = "ti,omap3-uart";
208 reg = <0x4806c000 0x400>;
209 interrupts = <73>;
210 dmas = <&sdma 51 &sdma 52>;
211 dma-names = "tx", "rx";
201 ti,hwmods = "uart2"; 212 ti,hwmods = "uart2";
202 clock-frequency = <48000000>; 213 clock-frequency = <48000000>;
203 }; 214 };
204 215
205 uart3: serial@49020000 { 216 uart3: serial@49020000 {
206 compatible = "ti,omap3-uart"; 217 compatible = "ti,omap3-uart";
218 reg = <0x49020000 0x400>;
219 interrupts = <74>;
220 dmas = <&sdma 53 &sdma 54>;
221 dma-names = "tx", "rx";
207 ti,hwmods = "uart3"; 222 ti,hwmods = "uart3";
208 clock-frequency = <48000000>; 223 clock-frequency = <48000000>;
209 }; 224 };
210 225
211 i2c1: i2c@48070000 { 226 i2c1: i2c@48070000 {
212 compatible = "ti,omap3-i2c"; 227 compatible = "ti,omap3-i2c";
228 reg = <0x48070000 0x80>;
229 interrupts = <56>;
230 dmas = <&sdma 27 &sdma 28>;
231 dma-names = "tx", "rx";
213 #address-cells = <1>; 232 #address-cells = <1>;
214 #size-cells = <0>; 233 #size-cells = <0>;
215 ti,hwmods = "i2c1"; 234 ti,hwmods = "i2c1";
@@ -217,6 +236,10 @@
217 236
218 i2c2: i2c@48072000 { 237 i2c2: i2c@48072000 {
219 compatible = "ti,omap3-i2c"; 238 compatible = "ti,omap3-i2c";
239 reg = <0x48072000 0x80>;
240 interrupts = <57>;
241 dmas = <&sdma 29 &sdma 30>;
242 dma-names = "tx", "rx";
220 #address-cells = <1>; 243 #address-cells = <1>;
221 #size-cells = <0>; 244 #size-cells = <0>;
222 ti,hwmods = "i2c2"; 245 ti,hwmods = "i2c2";
@@ -224,6 +247,10 @@
224 247
225 i2c3: i2c@48060000 { 248 i2c3: i2c@48060000 {
226 compatible = "ti,omap3-i2c"; 249 compatible = "ti,omap3-i2c";
250 reg = <0x48060000 0x80>;
251 interrupts = <61>;
252 dmas = <&sdma 25 &sdma 26>;
253 dma-names = "tx", "rx";
227 #address-cells = <1>; 254 #address-cells = <1>;
228 #size-cells = <0>; 255 #size-cells = <0>;
229 ti,hwmods = "i2c3"; 256 ti,hwmods = "i2c3";
@@ -231,6 +258,8 @@
231 258
232 mcspi1: spi@48098000 { 259 mcspi1: spi@48098000 {
233 compatible = "ti,omap2-mcspi"; 260 compatible = "ti,omap2-mcspi";
261 reg = <0x48098000 0x100>;
262 interrupts = <65>;
234 #address-cells = <1>; 263 #address-cells = <1>;
235 #size-cells = <0>; 264 #size-cells = <0>;
236 ti,hwmods = "mcspi1"; 265 ti,hwmods = "mcspi1";
@@ -249,6 +278,8 @@
249 278
250 mcspi2: spi@4809a000 { 279 mcspi2: spi@4809a000 {
251 compatible = "ti,omap2-mcspi"; 280 compatible = "ti,omap2-mcspi";
281 reg = <0x4809a000 0x100>;
282 interrupts = <66>;
252 #address-cells = <1>; 283 #address-cells = <1>;
253 #size-cells = <0>; 284 #size-cells = <0>;
254 ti,hwmods = "mcspi2"; 285 ti,hwmods = "mcspi2";
@@ -262,6 +293,8 @@
262 293
263 mcspi3: spi@480b8000 { 294 mcspi3: spi@480b8000 {
264 compatible = "ti,omap2-mcspi"; 295 compatible = "ti,omap2-mcspi";
296 reg = <0x480b8000 0x100>;
297 interrupts = <91>;
265 #address-cells = <1>; 298 #address-cells = <1>;
266 #size-cells = <0>; 299 #size-cells = <0>;
267 ti,hwmods = "mcspi3"; 300 ti,hwmods = "mcspi3";
@@ -275,6 +308,8 @@
275 308
276 mcspi4: spi@480ba000 { 309 mcspi4: spi@480ba000 {
277 compatible = "ti,omap2-mcspi"; 310 compatible = "ti,omap2-mcspi";
311 reg = <0x480ba000 0x100>;
312 interrupts = <48>;
278 #address-cells = <1>; 313 #address-cells = <1>;
279 #size-cells = <0>; 314 #size-cells = <0>;
280 ti,hwmods = "mcspi4"; 315 ti,hwmods = "mcspi4";
@@ -283,8 +318,17 @@
283 dma-names = "tx0", "rx0"; 318 dma-names = "tx0", "rx0";
284 }; 319 };
285 320
321 hdqw1w: 1w@480b2000 {
322 compatible = "ti,omap3-1w";
323 reg = <0x480b2000 0x1000>;
324 interrupts = <58>;
325 ti,hwmods = "hdq1w";
326 };
327
286 mmc1: mmc@4809c000 { 328 mmc1: mmc@4809c000 {
287 compatible = "ti,omap3-hsmmc"; 329 compatible = "ti,omap3-hsmmc";
330 reg = <0x4809c000 0x200>;
331 interrupts = <83>;
288 ti,hwmods = "mmc1"; 332 ti,hwmods = "mmc1";
289 ti,dual-volt; 333 ti,dual-volt;
290 dmas = <&sdma 61>, <&sdma 62>; 334 dmas = <&sdma 61>, <&sdma 62>;
@@ -293,6 +337,8 @@
293 337
294 mmc2: mmc@480b4000 { 338 mmc2: mmc@480b4000 {
295 compatible = "ti,omap3-hsmmc"; 339 compatible = "ti,omap3-hsmmc";
340 reg = <0x480b4000 0x200>;
341 interrupts = <86>;
296 ti,hwmods = "mmc2"; 342 ti,hwmods = "mmc2";
297 dmas = <&sdma 47>, <&sdma 48>; 343 dmas = <&sdma 47>, <&sdma 48>;
298 dma-names = "tx", "rx"; 344 dma-names = "tx", "rx";
@@ -300,6 +346,8 @@
300 346
301 mmc3: mmc@480ad000 { 347 mmc3: mmc@480ad000 {
302 compatible = "ti,omap3-hsmmc"; 348 compatible = "ti,omap3-hsmmc";
349 reg = <0x480ad000 0x200>;
350 interrupts = <94>;
303 ti,hwmods = "mmc3"; 351 ti,hwmods = "mmc3";
304 dmas = <&sdma 77>, <&sdma 78>; 352 dmas = <&sdma 77>, <&sdma 78>;
305 dma-names = "tx", "rx"; 353 dma-names = "tx", "rx";
@@ -307,6 +355,7 @@
307 355
308 wdt2: wdt@48314000 { 356 wdt2: wdt@48314000 {
309 compatible = "ti,omap3-wdt"; 357 compatible = "ti,omap3-wdt";
358 reg = <0x48314000 0x80>;
310 ti,hwmods = "wd_timer2"; 359 ti,hwmods = "wd_timer2";
311 }; 360 };
312 361
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index f8b3765eb9be..380c22eb468e 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -31,6 +31,10 @@
31 ocp { 31 ocp {
32 uart4: serial@49042000 { 32 uart4: serial@49042000 {
33 compatible = "ti,omap3-uart"; 33 compatible = "ti,omap3-uart";
34 reg = <0x49042000 0x400>;
35 interrupts = <80>;
36 dmas = <&sdma 81 &sdma 82>;
37 dma-names = "tx", "rx";
34 ti,hwmods = "uart4"; 38 ti,hwmods = "uart4";
35 clock-frequency = <48000000>; 39 clock-frequency = <48000000>;
36 }; 40 };