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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2015-01-05 17:24:08 -0500
committerSimon Horman <horms+renesas@verge.net.au>2015-02-23 16:30:55 -0500
commitb324252cc18d52d5752942a8574c22229153c58f (patch)
tree21f580868c9421e8d8145ffb1786400e1c3bd0b6
parent6a7742b4eea5de4af68bb62c20ca56e38b8e5b8b (diff)
ARM: shmobile: r8a7791: add CAN clocks
The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in the device tree, along with the USB_EXTAL clock from which clkp2 is derived. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi23
-rw-r--r--include/dt-bindings/clock/r8a7791-clock.h1
2 files changed, 22 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index afba8af1a5e4..1ebffef5b908 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -862,15 +862,34 @@
862 status = "disabled"; 862 status = "disabled";
863 }; 863 };
864 864
865 /* External USB clock - can be overridden by the board */
866 usb_extal_clk: usb_extal_clk {
867 compatible = "fixed-clock";
868 #clock-cells = <0>;
869 clock-frequency = <48000000>;
870 clock-output-names = "usb_extal";
871 };
872
873 /* External CAN clock */
874 can_clk: can_clk {
875 compatible = "fixed-clock";
876 #clock-cells = <0>;
877 /* This value must be overridden by the board. */
878 clock-frequency = <0>;
879 clock-output-names = "can_clk";
880 status = "disabled";
881 };
882
865 /* Special CPG clocks */ 883 /* Special CPG clocks */
866 cpg_clocks: cpg_clocks@e6150000 { 884 cpg_clocks: cpg_clocks@e6150000 {
867 compatible = "renesas,r8a7791-cpg-clocks", 885 compatible = "renesas,r8a7791-cpg-clocks",
868 "renesas,rcar-gen2-cpg-clocks"; 886 "renesas,rcar-gen2-cpg-clocks";
869 reg = <0 0xe6150000 0 0x1000>; 887 reg = <0 0xe6150000 0 0x1000>;
870 clocks = <&extal_clk>; 888 clocks = <&extal_clk &usb_extal_clk>;
871 #clock-cells = <1>; 889 #clock-cells = <1>;
872 clock-output-names = "main", "pll0", "pll1", "pll3", 890 clock-output-names = "main", "pll0", "pll1", "pll3",
873 "lb", "qspi", "sdh", "sd0", "z"; 891 "lb", "qspi", "sdh", "sd0", "z",
892 "rcan";
874 }; 893 };
875 894
876 /* Variable factor clocks */ 895 /* Variable factor clocks */
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index f096f3f6c16a..a45a36307895 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -20,6 +20,7 @@
20#define R8A7791_CLK_SDH 6 20#define R8A7791_CLK_SDH 6
21#define R8A7791_CLK_SD0 7 21#define R8A7791_CLK_SD0 7
22#define R8A7791_CLK_Z 8 22#define R8A7791_CLK_Z 8
23#define R8A7791_CLK_RCAN 9
23 24
24/* MSTP0 */ 25/* MSTP0 */
25#define R8A7791_CLK_MSIOF0 0 26#define R8A7791_CLK_MSIOF0 0