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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2015-01-05 16:34:42 -0500
committerSimon Horman <horms+renesas@verge.net.au>2015-02-23 16:30:54 -0500
commit6a7742b4eea5de4af68bb62c20ca56e38b8e5b8b (patch)
tree69ca0854301ef094452a9cca40b348a8a4db7acc
parent41650f406cdc4a420d5c08e1b407f6420323a04b (diff)
ARM: shmobile: r8a7790: add CAN DT support
Define the generic R8A7790 parts of the CAN0/1 device nodes. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index e872854b4ba9..cd7fc05f5e99 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -792,6 +792,26 @@
792 }; 792 };
793 }; 793 };
794 794
795 can0: can@e6e80000 {
796 compatible = "renesas,can-r8a7790";
797 reg = <0 0xe6e80000 0 0x1000>;
798 interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>;
799 clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
800 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
801 clock-names = "clkp1", "clkp2", "can_clk";
802 status = "disabled";
803 };
804
805 can1: can@e6e88000 {
806 compatible = "renesas,can-r8a7790";
807 reg = <0 0xe6e88000 0 0x1000>;
808 interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH>;
809 clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
810 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
811 clock-names = "clkp1", "clkp2", "can_clk";
812 status = "disabled";
813 };
814
795 clocks { 815 clocks {
796 #address-cells = <2>; 816 #address-cells = <2>;
797 #size-cells = <2>; 817 #size-cells = <2>;