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authorJeffrey Deans <jeffrey.deans@imgtec.com>2014-07-17 04:20:55 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-08-01 18:06:40 -0400
commitb0a88ae50220b60d6e9686fc5f5a200151217037 (patch)
tree8eceb0d4986358d6f04165ac61efba154c0f115b
parentc975048165a973dc5b0aef76514045b69062db41 (diff)
MIPS: GIC: Remove GIC_FLAG_IPI
irq-gic.c:gic_get_int() masks out interrupts from the pending set which aren’t in the pcpu_mask. Only interrupts marked with GIC_FLAG_IPI were set in pcpu_mask, meaning that peripheral interrupts also had to be marked as IPIs. Remove the use of GIC_FLAG_IPI and allow the flags member of struct gic_intr_map to be zero. Signed-off-by: Jeffrey Deans <jeffrey.deans@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7374/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/gic.h3
-rw-r--r--arch/mips/kernel/irq-gic.c7
-rw-r--r--arch/mips/mti-malta/malta-int.c2
3 files changed, 5 insertions, 7 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 80804c16bb9d..394d366b8fc1 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -317,8 +317,7 @@ struct gic_intr_map {
317 unsigned int polarity; /* Polarity : +/- */ 317 unsigned int polarity; /* Polarity : +/- */
318 unsigned int trigtype; /* Trigger : Edge/Levl */ 318 unsigned int trigtype; /* Trigger : Edge/Levl */
319 unsigned int flags; /* Misc flags */ 319 unsigned int flags; /* Misc flags */
320#define GIC_FLAG_IPI 0x01 320#define GIC_FLAG_TRANSPARENT 0x01
321#define GIC_FLAG_TRANSPARENT 0x02
322}; 321};
323 322
324/* 323/*
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index a1dea3ea59a0..71cf45a335b6 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -311,9 +311,10 @@ static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
311 311
312 /* Init Intr Masks */ 312 /* Init Intr Masks */
313 GIC_CLR_INTR_MASK(intr); 313 GIC_CLR_INTR_MASK(intr);
314
314 /* Initialise per-cpu Interrupt software masks */ 315 /* Initialise per-cpu Interrupt software masks */
315 if (flags & GIC_FLAG_IPI) 316 set_bit(intr, pcpu_masks[cpu].pcpu_mask);
316 set_bit(intr, pcpu_masks[cpu].pcpu_mask); 317
317 if ((flags & GIC_FLAG_TRANSPARENT) && (cpu_has_veic == 0)) 318 if ((flags & GIC_FLAG_TRANSPARENT) && (cpu_has_veic == 0))
318 GIC_SET_INTR_MASK(intr); 319 GIC_SET_INTR_MASK(intr);
319 if (trigtype == GIC_TRIG_EDGE) 320 if (trigtype == GIC_TRIG_EDGE)
@@ -352,8 +353,6 @@ static void __init gic_basic_init(int numintrs, int numvpes,
352 cpu = intrmap[i].cpunum; 353 cpu = intrmap[i].cpunum;
353 if (cpu == GIC_UNUSED) 354 if (cpu == GIC_UNUSED)
354 continue; 355 continue;
355 if (cpu == 0 && i != 0 && intrmap[i].flags == 0)
356 continue;
357 gic_setup_intr(i, 356 gic_setup_intr(i,
358 intrmap[i].cpunum, 357 intrmap[i].cpunum,
359 intrmap[i].pin + pin_offset, 358 intrmap[i].pin + pin_offset,
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index ecc2785f7858..4ab919141737 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -427,7 +427,7 @@ static void __init fill_ipi_map1(int baseintr, int cpu, int cpupin)
427 gic_intr_map[intr].pin = cpupin; 427 gic_intr_map[intr].pin = cpupin;
428 gic_intr_map[intr].polarity = GIC_POL_POS; 428 gic_intr_map[intr].polarity = GIC_POL_POS;
429 gic_intr_map[intr].trigtype = GIC_TRIG_EDGE; 429 gic_intr_map[intr].trigtype = GIC_TRIG_EDGE;
430 gic_intr_map[intr].flags = GIC_FLAG_IPI; 430 gic_intr_map[intr].flags = 0;
431 ipi_map[cpu] |= (1 << (cpupin + 2)); 431 ipi_map[cpu] |= (1 << (cpupin + 2));
432} 432}
433 433