diff options
author | Jeffrey Deans <jeffrey.deans@imgtec.com> | 2014-07-17 04:20:54 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-08-01 18:06:40 -0400 |
commit | c975048165a973dc5b0aef76514045b69062db41 (patch) | |
tree | 3d0ec03da2030a523f50908676adeb5640ceb2d5 | |
parent | 822350bc90c5069e9ab39f8720e2ef06af736124 (diff) |
MIPS: GIC: Move GIC_NUM_INTRS into platform irq.h
The value of GIC_NUM_INTRS is platform-specific. Using a default value
from gic.h will result in incorrect behaviour on some systems, so
require a suitable definition to be present in the platform's irq.h.
Signed-off-by: Jeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7373/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/include/asm/gic.h | 4 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-malta/irq.h | 1 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-sead3/irq.h | 1 |
3 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index 5b0e6a4b2c30..80804c16bb9d 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h | |||
@@ -14,6 +14,8 @@ | |||
14 | #include <linux/bitmap.h> | 14 | #include <linux/bitmap.h> |
15 | #include <linux/threads.h> | 15 | #include <linux/threads.h> |
16 | 16 | ||
17 | #include <irq.h> | ||
18 | |||
17 | #undef GICISBYTELITTLEENDIAN | 19 | #undef GICISBYTELITTLEENDIAN |
18 | 20 | ||
19 | /* Constants */ | 21 | /* Constants */ |
@@ -22,8 +24,6 @@ | |||
22 | #define GIC_TRIG_EDGE 1 | 24 | #define GIC_TRIG_EDGE 1 |
23 | #define GIC_TRIG_LEVEL 0 | 25 | #define GIC_TRIG_LEVEL 0 |
24 | 26 | ||
25 | #define GIC_NUM_INTRS (24 + NR_CPUS * 2) | ||
26 | |||
27 | #define MSK(n) ((1 << (n)) - 1) | 27 | #define MSK(n) ((1 << (n)) - 1) |
28 | #define REG32(addr) (*(volatile unsigned int *) (addr)) | 28 | #define REG32(addr) (*(volatile unsigned int *) (addr)) |
29 | #define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS) | 29 | #define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS) |
diff --git a/arch/mips/include/asm/mach-malta/irq.h b/arch/mips/include/asm/mach-malta/irq.h index 47cfe64efbb0..f2c13d211abb 100644 --- a/arch/mips/include/asm/mach-malta/irq.h +++ b/arch/mips/include/asm/mach-malta/irq.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define __ASM_MACH_MIPS_IRQ_H | 2 | #define __ASM_MACH_MIPS_IRQ_H |
3 | 3 | ||
4 | 4 | ||
5 | #define GIC_NUM_INTRS (24 + NR_CPUS * 2) | ||
5 | #define NR_IRQS 256 | 6 | #define NR_IRQS 256 |
6 | 7 | ||
7 | #include_next <irq.h> | 8 | #include_next <irq.h> |
diff --git a/arch/mips/include/asm/mach-sead3/irq.h b/arch/mips/include/asm/mach-sead3/irq.h index 5d154cfbcf4c..d8106f75b9af 100644 --- a/arch/mips/include/asm/mach-sead3/irq.h +++ b/arch/mips/include/asm/mach-sead3/irq.h | |||
@@ -1,6 +1,7 @@ | |||
1 | #ifndef __ASM_MACH_MIPS_IRQ_H | 1 | #ifndef __ASM_MACH_MIPS_IRQ_H |
2 | #define __ASM_MACH_MIPS_IRQ_H | 2 | #define __ASM_MACH_MIPS_IRQ_H |
3 | 3 | ||
4 | #define GIC_NUM_INTRS (24 + NR_CPUS * 2) | ||
4 | #define NR_IRQS 256 | 5 | #define NR_IRQS 256 |
5 | 6 | ||
6 | 7 | ||