diff options
author | Jonas Gorski <jogo@openwrt.org> | 2013-03-21 10:03:20 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-07 19:19:03 -0400 |
commit | ab8ed9820f5645d0b5b81ef17bbcbd1cdd43a4fa (patch) | |
tree | 7e3554f0f7d5d3cc8b36a628167d66337e0e291c | |
parent | a156ba61f0b959a803d7a6941a52c5453524c99b (diff) |
MIPS: BCM63XX: add flash detection for BCM6362
BCM6362 support booting from SPI flash and NAND.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5012/
Acked-by: John Crispin <blogic@openwrt.org>
-rw-r--r-- | arch/mips/bcm63xx/dev-flash.c | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 |
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/bcm63xx/dev-flash.c b/arch/mips/bcm63xx/dev-flash.c index 58371c7deac2..588d1ec622e4 100644 --- a/arch/mips/bcm63xx/dev-flash.c +++ b/arch/mips/bcm63xx/dev-flash.c | |||
@@ -77,6 +77,12 @@ static int __init bcm63xx_detect_flash_type(void) | |||
77 | return BCM63XX_FLASH_TYPE_PARALLEL; | 77 | return BCM63XX_FLASH_TYPE_PARALLEL; |
78 | else | 78 | else |
79 | return BCM63XX_FLASH_TYPE_SERIAL; | 79 | return BCM63XX_FLASH_TYPE_SERIAL; |
80 | case BCM6362_CPU_ID: | ||
81 | val = bcm_misc_readl(MISC_STRAPBUS_6362_REG); | ||
82 | if (val & STRAPBUS_6362_BOOT_SEL_SERIAL) | ||
83 | return BCM63XX_FLASH_TYPE_SERIAL; | ||
84 | else | ||
85 | return BCM63XX_FLASH_TYPE_NAND; | ||
80 | case BCM6368_CPU_ID: | 86 | case BCM6368_CPU_ID: |
81 | val = bcm_gpio_readl(GPIO_STRAPBUS_REG); | 87 | val = bcm_gpio_readl(GPIO_STRAPBUS_REG); |
82 | switch (val & STRAPBUS_6368_BOOT_SEL_MASK) { | 88 | switch (val & STRAPBUS_6368_BOOT_SEL_MASK) { |
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index 243bab96f3f7..3203fe49b34d 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | |||
@@ -1372,6 +1372,7 @@ | |||
1372 | 1372 | ||
1373 | #define MISC_STRAPBUS_6362_REG 0x14 | 1373 | #define MISC_STRAPBUS_6362_REG 0x14 |
1374 | #define STRAPBUS_6362_FCVO_SHIFT 1 | 1374 | #define STRAPBUS_6362_FCVO_SHIFT 1 |
1375 | #define STRAPBUS_6362_HSSPI_CLK_FAST (1 << 13) | ||
1375 | #define STRAPBUS_6362_FCVO_MASK (0x1f << STRAPBUS_6362_FCVO_SHIFT) | 1376 | #define STRAPBUS_6362_FCVO_MASK (0x1f << STRAPBUS_6362_FCVO_SHIFT) |
1376 | #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15) | 1377 | #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15) |
1377 | #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15) | 1378 | #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15) |