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authorSebastien Guiriec <s-guiriec@ti.com>2012-10-23 04:37:11 -0400
committerBenoit Cousson <b-cousson@ti.com>2012-10-29 11:56:34 -0400
commit8e80f66069d54fd22e1a8e452a760f511f501b48 (patch)
tree03d660ee05ad4fe64fc330c41c20cda4620d05c7
parentd7118bbd5095982ddc179387e9fd7d0524fdcf10 (diff)
ARM: dts: omap5: Update UART with address space and interrupts
Add base address and interrupt line inside Device Tree data for OMAP5. Fix as well the wrong compatible string on UART5 & 6. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com> [b-cousson@ti.com: Update the changelog to reflect the fixes done in the patch] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
-rw-r--r--arch/arm/boot/dts/omap5.dtsi16
1 files changed, 14 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 9abcff75e8b7..7cc47ad849b3 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -237,36 +237,48 @@
237 237
238 uart1: serial@4806a000 { 238 uart1: serial@4806a000 {
239 compatible = "ti,omap4-uart"; 239 compatible = "ti,omap4-uart";
240 reg = <0x4806a000 0x100>;
241 interrupts = <0 72 0x4>;
240 ti,hwmods = "uart1"; 242 ti,hwmods = "uart1";
241 clock-frequency = <48000000>; 243 clock-frequency = <48000000>;
242 }; 244 };
243 245
244 uart2: serial@4806c000 { 246 uart2: serial@4806c000 {
245 compatible = "ti,omap4-uart"; 247 compatible = "ti,omap4-uart";
248 reg = <0x4806c000 0x100>;
249 interrupts = <0 73 0x4>;
246 ti,hwmods = "uart2"; 250 ti,hwmods = "uart2";
247 clock-frequency = <48000000>; 251 clock-frequency = <48000000>;
248 }; 252 };
249 253
250 uart3: serial@48020000 { 254 uart3: serial@48020000 {
251 compatible = "ti,omap4-uart"; 255 compatible = "ti,omap4-uart";
256 reg = <0x48020000 0x100>;
257 interrupts = <0 74 0x4>;
252 ti,hwmods = "uart3"; 258 ti,hwmods = "uart3";
253 clock-frequency = <48000000>; 259 clock-frequency = <48000000>;
254 }; 260 };
255 261
256 uart4: serial@4806e000 { 262 uart4: serial@4806e000 {
257 compatible = "ti,omap4-uart"; 263 compatible = "ti,omap4-uart";
264 reg = <0x4806e000 0x100>;
265 interrupts = <0 70 0x4>;
258 ti,hwmods = "uart4"; 266 ti,hwmods = "uart4";
259 clock-frequency = <48000000>; 267 clock-frequency = <48000000>;
260 }; 268 };
261 269
262 uart5: serial@48066000 { 270 uart5: serial@48066000 {
263 compatible = "ti,omap5-uart"; 271 compatible = "ti,omap4-uart";
272 reg = <0x48066000 0x100>;
273 interrupts = <0 105 0x4>;
264 ti,hwmods = "uart5"; 274 ti,hwmods = "uart5";
265 clock-frequency = <48000000>; 275 clock-frequency = <48000000>;
266 }; 276 };
267 277
268 uart6: serial@48068000 { 278 uart6: serial@48068000 {
269 compatible = "ti,omap6-uart"; 279 compatible = "ti,omap4-uart";
280 reg = <0x48068000 0x100>;
281 interrupts = <0 106 0x4>;
270 ti,hwmods = "uart6"; 282 ti,hwmods = "uart6";
271 clock-frequency = <48000000>; 283 clock-frequency = <48000000>;
272 }; 284 };